From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.13846.1617354804437675999 for ; Fri, 02 Apr 2021 02:13:24 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pranav.madhu@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F100F11B3; Fri, 2 Apr 2021 02:13:18 -0700 (PDT) Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8CEC13F792; Fri, 2 Apr 2021 02:13:17 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar Subject: [edk2-platforms][PATCH V1 1/8] Platform/Sgi: Helper macros for PPTT Table Date: Fri, 2 Apr 2021 14:42:01 +0530 Message-Id: <20210402091208.16752-2-pranav.madhu@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210402091208.16752-1-pranav.madhu@arm.com> References: <20210402091208.16752-1-pranav.madhu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Add helper macros for the creation for PPTT table. These macros help with initializing processor hierarchy node structure, cache type structure and ID structure. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 163 +++++++++++++++++++- 1 file changed, 162 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/S= giPkg/Include/SgiAcpiHeader.h index 8d715de173c9..7ceb090a78e9 100644 --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. +* Copyright (c) 2018-2021, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -20,6 +20,132 @@ #define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ') #define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099 =20 +#define CORE_COUNT FixedPcdGet32 (PcdCoreCount) +#define CLUSTER_COUNT FixedPcdGet32 (PcdClusterCount) + +#pragma pack(1) +// PPTT processor core structure +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core; + UINT32 Offset[2]; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE DCache; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE ICache; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache; +} RD_PPTT_CORE; + +// PPTT processor cluster structure +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + UINT32 Offset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L3Cache; + RD_PPTT_CORE Core[CORE_COUNT]; +} RD_PPTT_CLUSTER; + +// PPTT processor cluster structure without cache +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + UINT32 Offset; + RD_PPTT_CORE Core[CORE_COUNT]; +} RD_PPTT_MINIMAL_CLUSTER; + +// PPTT processor package structure +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + UINT32 Offset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc; + RD_PPTT_MINIMAL_CLUSTER Cluster[CLUSTER_COUNT]; +} RD_PPTT_SLC_PACKAGE; +#pragma pack () + +// +// PPTT processor structure flags for different SoC components as define= d in +// ACPI 6.3 specification +// + +// Processor structure flags for SoC package +#define PPTT_PROCESSOR_PACKAGE_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for cluster +#define PPTT_PROCESSOR_CLUSTER_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for single-thread core +#define PPTT_PROCESSOR_CORE_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ + } + +// Processor structure flags for multi-thread core +#define PPTT_PROCESSOR_CORE_THREADED_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for CPU thread +#define PPTT_PROCESSOR_THREAD_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ + } + +// PPTT cache structure flags as defined in ACPI 6.3 Specification +#define PPTT_CACHE_STRUCTURE_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID, = \ + EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID, = \ + EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID, = \ + EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID, = \ + EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID, = \ + EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID, = \ + EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID = \ + } + +// PPTT cache attributes for data cache +#define PPTT_DATA_CACHE_ATTR = \ + { = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + } + +// PPTT cache attributes for instruction cache +#define PPTT_INST_CACHE_ATTR = \ + { = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + } + +// PPTT cache attributes for unified cache +#define PPTT_UNIFIED_CACHE_ATTR = \ + { = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + } + // A macro to initialise the common header part of EFI ACPI tables as de= fined by // EFI_ACPI_DESCRIPTION_HEADER structure. #define ARM_ACPI_HEADER(Signature, Type, Revision) { \ @@ -119,4 +245,39 @@ ACPIProcessorUID, Flags, ClockDomain = \ } =20 +// EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR +#define EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT(Length, Flag, Parent,= \ + ACPIProcessorID, NumberOfPrivateResource) = \ + { = \ + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type 0 */ = \ + Length, /* Length */ = \ + { = \ + EFI_ACPI_RESERVED_BYTE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + }, = \ + Flag, /* Processor flags= */ \ + Parent, /* Ref to parent n= ode */ \ + ACPIProcessorID, /* UID, as per MAD= T */ \ + NumberOfPrivateResource /* Resource count = */ \ + } + +// EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE +#define EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT(Flag, NextLevelCache, Siz= e, \ + NoOfSets, Associativity, Attributes, LineSize) = \ + { = \ + EFI_ACPI_6_3_PPTT_TYPE_CACHE, /* Type 1 */ = \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), /* Length */ = \ + { = \ + EFI_ACPI_RESERVED_BYTE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + }, = \ + Flag, /* Cache flags */ = \ + NextLevelCache, /* Ref to next lev= el */ \ + Size, /* Size in bytes *= / \ + NoOfSets, /* Num of sets */ = \ + Associativity, /* Num of ways */ = \ + Attributes, /* Cache attribute= s */ \ + LineSize /* Line size in by= tes */ \ + } + #endif /* __SGI_ACPI_HEADER__ */ --=20 2.17.1