* [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure.
@ 2021-04-08 6:35 Jason Lou
2021-04-08 13:56 ` Ni, Ray
0 siblings, 1 reply; 3+ messages in thread
From: Jason Lou @ 2021-04-08 6:35 UTC (permalink / raw)
To: devel; +Cc: Jason, Michael D Kinney, Liming Gao, Zhiguang Liu, Ray Ni
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3309
Define new element(Hybird) in CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS
(07h) data structure.
Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
MdePkg/Include/Register/Intel/Cpuid.h | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Register/Intel/Cpuid.h
index 19af99b6af..e7c0fd17e7 100644
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -1550,9 +1550,17 @@ typedef union {
///
UINT32 AVX512_4FMAPS:1;
///
- /// [Bit 25:4] Reserved.
+ /// [Bit 14:4] Reserved.
///
- UINT32 Reserved2:22;
+ UINT32 Reserved2:11;
+ ///
+ /// [Bit 15] Hybrid. If 1, the processor is identified as a hybrid part.
+ ///
+ UINT32 Hybrid:1;
+ ///
+ /// [Bit 25:16] Reserved.
+ ///
+ UINT32 Reserved3:10;
///
/// [Bit 26] Enumerates support for indirect branch restricted speculation
/// (IBRS) and the indirect branch pre-dictor barrier (IBPB). Processors
@@ -1581,7 +1589,7 @@ typedef union {
///
/// [Bit 30] Reserved.
///
- UINT32 Reserved3:1;
+ UINT32 Reserved4:1;
///
/// [Bit 31] Enumerates support for Speculative Store Bypass Disable (SSBD).
/// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. They allow
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure.
2021-04-08 6:35 [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure Jason Lou
@ 2021-04-08 13:56 ` Ni, Ray
2021-04-08 14:49 ` [edk2-devel] " Jason Lou
0 siblings, 1 reply; 3+ messages in thread
From: Ni, Ray @ 2021-04-08 13:56 UTC (permalink / raw)
To: Lou, Yun, devel@edk2.groups.io
Cc: Kinney, Michael D, Liming Gao, Liu, Zhiguang
Since Reserved2 and Reserved3 are changed, please use new name Reserved4, 5, 6.
> -----Original Message-----
> From: Lou, Yun <yun.lou@intel.com>
> Sent: Thursday, April 8, 2021 2:35 PM
> To: devel@edk2.groups.io
> Cc: Lou, Yun <yun.lou@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
> Liu, Zhiguang <zhiguang.liu@intel.com>; Ni, Ray <ray.ni@intel.com>
> Subject: [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID
> Leaf(07h) data structure.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3309
>
> Define new element(Hybird) in
> CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS
> (07h) data structure.
>
> Signed-off-by: Jason Lou <yun.lou@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> ---
> MdePkg/Include/Register/Intel/Cpuid.h | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/MdePkg/Include/Register/Intel/Cpuid.h
> b/MdePkg/Include/Register/Intel/Cpuid.h
> index 19af99b6af..e7c0fd17e7 100644
> --- a/MdePkg/Include/Register/Intel/Cpuid.h
> +++ b/MdePkg/Include/Register/Intel/Cpuid.h
> @@ -1550,9 +1550,17 @@ typedef union {
> ///
>
> UINT32 AVX512_4FMAPS:1;
>
> ///
>
> - /// [Bit 25:4] Reserved.
>
> + /// [Bit 14:4] Reserved.
>
> ///
>
> - UINT32 Reserved2:22;
>
> + UINT32 Reserved2:11;
>
> + ///
>
> + /// [Bit 15] Hybrid. If 1, the processor is identified as a hybrid part.
>
> + ///
>
> + UINT32 Hybrid:1;
>
> + ///
>
> + /// [Bit 25:16] Reserved.
>
> + ///
>
> + UINT32 Reserved3:10;
>
> ///
>
> /// [Bit 26] Enumerates support for indirect branch restricted speculation
>
> /// (IBRS) and the indirect branch pre-dictor barrier (IBPB). Processors
>
> @@ -1581,7 +1589,7 @@ typedef union {
> ///
>
> /// [Bit 30] Reserved.
>
> ///
>
> - UINT32 Reserved3:1;
>
> + UINT32 Reserved4:1;
>
> ///
>
> /// [Bit 31] Enumerates support for Speculative Store Bypass Disable
> (SSBD).
>
> /// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. They
> allow
>
> --
> 2.28.0.windows.1
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-04-08 6:35 [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure Jason Lou
2021-04-08 13:56 ` Ni, Ray
2021-04-08 14:49 ` [edk2-devel] " Jason Lou
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