From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web11.29388.1618217139925576318 for ; Mon, 12 Apr 2021 01:45:40 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: ray.ni@intel.com) IronPort-SDR: gFSoPnH7siKNlOg10eI7cqSBiHhZoKpLgz3ozIT0ohhM1DsfU/ADXTzw/0llFWtrY5x90mAuTk BFqdEm4p+GMw== X-IronPort-AV: E=McAfee;i="6000,8403,9951"; a="258117873" X-IronPort-AV: E=Sophos;i="5.82,216,1613462400"; d="scan'208";a="258117873" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2021 01:45:37 -0700 IronPort-SDR: /x3b92kS1I+gXh0wL7w8ZeYVae+iBma2LPaKMJizf4LjYHV2tHagiSFADwPhDzS8e9ff2dgeQ6 O1I9/0u82n0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,216,1613462400"; d="scan'208";a="417293230" Received: from ray-dev.ccr.corp.intel.com ([10.239.158.87]) by fmsmga008.fm.intel.com with ESMTP; 12 Apr 2021 01:45:35 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Rangasai V Chaganty Subject: [PATCH] IntelSiliconPkg/ShadowMicrocode: Fix build failure Date: Mon, 12 Apr 2021 16:45:25 +0800 Message-Id: <20210412084525.1655-1-ray.ni@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The commit 7e4c6f982a0accd5aa86337b46d20199db989aeb updated ShadowMicrocode module to consume MicrocodeLib. But the change caused the build failure. The patch fixed the build failure and also verified the change in real platform. Signed-off-by: Ray Ni Cc: Rangasai V Chaganty --- .../Feature/ShadowMicrocode/ShadowMicrocodePei.c | 3 +-- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 1 + 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMi= crocodePei.c b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/Shadow= MicrocodePei.c index 4e4b69a0ca..7f4a3f8fbd 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocode= Pei.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocode= Pei.c @@ -291,7 +291,6 @@ ShadowMicrocode ( UINTN MaxPatchNumber;=0D CPU_MICROCODE_HEADER *MicrocodeEntryPoint;=0D UINTN PatchCount;=0D - UINTN DataSize;=0D UINTN TotalSize;=0D UINTN TotalLoadSize;=0D =0D @@ -342,7 +341,7 @@ ShadowMicrocode ( if (FitEntry[Index].Type =3D=3D FIT_TYPE_01_MICROCODE) {=0D MicrocodeEntryPoint =3D (CPU_MICROCODE_HEADER *) (UINTN) FitEntry[In= dex].Address;=0D TotalSize =3D GetMicrocodeLength (MicrocodeEntryPoint);=0D - if (IsValidMicrocode (MicrocodeEntryPoint, TotalSize, MicrocodeCpuId= , CpuIdCount, FALSE)) {=0D + if (IsValidMicrocode (MicrocodeEntryPoint, TotalSize, 0, MicrocodeCp= uId, CpuIdCount, FALSE)) {=0D PatchInfoBuffer[PatchCount].Address =3D (UINTN) MicrocodeEntryPoin= t;=0D PatchInfoBuffer[PatchCount].Size =3D TotalSize;=0D TotalLoadSize +=3D TotalSize;=0D diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dsc index edc79c9b9c..5e0de7e19a 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -39,6 +39,7 @@ MicrocodeFlashAccessLib|IntelSiliconPkg/Feature/Capsule/Library/Microcod= eFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf=0D PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignmentLi= b/PeiGetVtdPmrAlignmentLib.inf=0D TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf=0D + MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf=0D =0D [LibraryClasses.common.PEIM]=0D PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf=0D --=20 2.27.0.windows.1