* [edk2-platforms][PATCH v1 01/35] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 02/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
` (34 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel
Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
Deepika Kethi Reddy, Kathappan Esakkithevar
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Removes extra IntelSiliconPkg.dec entry in PeiPolicyUpdateLib.inf.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
1 file changed, 1 deletion(-)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 014967c7f65a..fd51e2b8c40b 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -52,7 +52,6 @@ [Packages]
SecurityPkg/SecurityPkg.dec
IntelSiliconPkg/IntelSiliconPkg.dec
MinPlatformPkg/MinPlatformPkg.dec
- IntelSiliconPkg/IntelSiliconPkg.dec
[FixedPcd]
gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 02/35] WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 01/35] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 03/35] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF Michael Kubacki
` (33 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Removes extra IntelSiliconPkg.dec entry in PeiPolicyUpdateLib.inf.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
1 file changed, 1 deletion(-)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 252f92f48736..b36dc2b4097c 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -52,7 +52,6 @@ [Packages]
SecurityPkg/SecurityPkg.dec
IntelSiliconPkg/IntelSiliconPkg.dec
MinPlatformPkg/MinPlatformPkg.dec
- IntelSiliconPkg/IntelSiliconPkg.dec
[FixedPcd]
gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 03/35] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 01/35] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 02/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 04/35] IntelSiliconPkg: Add BIOS area base address and size PCDs Michael Kubacki
` (32 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel
Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
Deepika Kethi Reddy, Kathappan Esakkithevar
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
gEfiMemoryTypeInformationGuid is used in PeiSaPolicyUpdatePreMem.c
but not in the [Guids] section in PeiPolicyUpdateLib.inf.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 +
1 file changed, 1 insertion(+)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index fd51e2b8c40b..5213253f7313 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -270,3 +270,4 @@ [Ppis]
[Guids]
gTianoLogoGuid ## CONSUMES
gSiConfigGuid ## CONSUMES
+ gEfiMemoryTypeInformationGuid ## PRODUCES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 04/35] IntelSiliconPkg: Add BIOS area base address and size PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (2 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 03/35] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 05/35] IntelSiliconPkg: Add microcode FV PCDs Michael Kubacki
` (31 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Adds the following PCDs to IntelSiliconPkg.dec to consolidate the
PCD to a single silicon declaration file. This allows libraries
and modules in IntelSiliconPkg to be able to use this PCD.
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 4a2cbca5c1d8..787dcf38c486 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -84,6 +84,10 @@ [PcdsFeatureFlag]
# @Prompt Shadow all microcode update patches.
gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode|FALSE|BOOLEAN|0x00000006
+[PcdsFixedAtBuild]
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x00000007
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x00000008
+
[PcdsFixedAtBuild, PcdsPatchableInModule]
## Error code for VTd error.<BR><BR>
# EDKII_ERROR_CODE_VTD_ERROR = (EFI_IO_BUS_UNSPECIFIED | (EFI_OEM_SPECIFIC | 0x00000000)) = 0x02008000<BR>
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 05/35] IntelSiliconPkg: Add microcode FV PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (3 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 04/35] IntelSiliconPkg: Add BIOS area base address and size PCDs Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 06/35] IntelSiliconPkg: Add PCH SPI PPI Michael Kubacki
` (30 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Adds the following PCDs to IntelSiliconPkg.dec to consolidate the
PCD to a single silicon declaration file. This allows libraries
modules in IntelSiliconPkg to be able to use this PCD.
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 787dcf38c486..ff5f9e9ec4f0 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -87,6 +87,9 @@ [PcdsFeatureFlag]
[PcdsFixedAtBuild]
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x00000007
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x00000008
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x00000009
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x0000000A
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x0000000B
[PcdsFixedAtBuild, PcdsPatchableInModule]
## Error code for VTd error.<BR><BR>
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 06/35] IntelSiliconPkg: Add PCH SPI PPI
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (4 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 05/35] IntelSiliconPkg: Add microcode FV PCDs Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 07/35] IntelSiliconPkg: Add PCH SPI Protocol Michael Kubacki
` (29 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
This SPI PPI definition is intended to serve as the single
definition for Intel platform and silicon packages.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++
2 files changed, 28 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
new file mode 100644
index 000000000000..b2410bd17300
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
@@ -0,0 +1,25 @@
+/** @file
+ This file defines the PCH SPI PPI which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI_PPI_H_
+#define _PCH_SPI_PPI_H_
+
+#include <Protocol/Spi.h>
+
+//
+// Extern the GUID for PPI users.
+//
+extern EFI_GUID gPchSpiPpiGuid;
+
+/**
+ Reuse the PCH_SPI_PROTOCOL definitions
+ This is possible becaues the PPI implementation does not rely on a PeiService pointer,
+ as it uses EDKII Glue Lib to do IO accesses
+**/
+typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index ff5f9e9ec4f0..4a1eee3a5077 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -67,6 +67,9 @@ [Guids]
gEdkiiMicrocodeStorageTypeFlashGuid = { 0x2cba01b3, 0xd391, 0x4598, { 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } }
[Ppis]
+ ## Include/Ppi/Spi.h
+ gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}}
+
gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 07/35] IntelSiliconPkg: Add PCH SPI Protocol
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (5 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 06/35] IntelSiliconPkg: Add PCH SPI PPI Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 08/35] IntelSiliconPkg: Add SpiFlashCommonLib Michael Kubacki
` (28 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
These SPI Protocol definitions are intended to serve as the single
definitions for Intel platform and silicon packages.
1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 5 +
2 files changed, 306 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
new file mode 100644
index 000000000000..c13dc5a5f5f5
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
@@ -0,0 +1,301 @@
+/** @file
+ This file defines the PCH SPI Protocol which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI_PROTOCOL_H_
+#define _PCH_SPI_PROTOCOL_H_
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gPchSpiProtocolGuid;
+extern EFI_GUID gPchSmmSpiProtocolGuid;
+
+//
+// Forward reference for ANSI C compatibility
+//
+typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
+
+//
+// SPI protocol data structures and definitions
+//
+
+/**
+ Flash Region Type
+**/
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbE,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionSecondaryBios,
+ FlashRegionuCodePatch,
+ FlashRegionEC,
+ FlashRegionDeviceExpansion2,
+ FlashRegionIE,
+ FlashRegion10Gbe_A,
+ FlashRegion10Gbe_B,
+ FlashRegion13,
+ FlashRegion14,
+ FlashRegion15,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+//
+// Protocol member functions
+//
+
+/**
+ Read data from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
+ @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Write data to the flash part. Remark: Erase may be needed before write to the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
+ @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ IN UINT8 *Buffer
+ );
+
+/**
+ Erase some area on the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_ERASE) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ IN UINT32 Address,
+ IN UINT32 ByteCount
+ );
+
+/**
+ Read SFDP data from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] ComponentNumber The Componen Number for chip select
+ @param[in] Address The starting byte address for SFDP data read.
+ @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
+ @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT8 ComponentNumber,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ OUT UINT8 *SfdpData
+ );
+
+/**
+ Read Jedec Id from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] ComponentNumber The Componen Number for chip select
+ @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
+ @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT8 ComponentNumber,
+ IN UINT32 ByteCount,
+ OUT UINT8 *JedecId
+ );
+
+/**
+ Write the status register in the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
+ @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 ByteCount,
+ IN UINT8 *StatusValue
+ );
+
+/**
+ Read status register in the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
+ @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 ByteCount,
+ OUT UINT8 *StatusValue
+ );
+
+/**
+ Get the SPI region base and size, based on the enum type
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
+ @param[out] RegionSize The size for the Region 'n'
+
+ @retval EFI_SUCCESS Read success
+ @retval EFI_INVALID_PARAMETER Invalid region type given
+ @retval EFI_DEVICE_ERROR The region is not used
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ OUT UINT32 *BaseAddress,
+ OUT UINT32 *RegionSize
+ );
+
+/**
+ Read PCH Soft Strap Values
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
+ @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
+ @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
+ If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 SoftStrapAddr,
+ IN UINT32 ByteCount,
+ OUT VOID *SoftStrapValue
+ );
+
+/**
+ Read CPU Soft Strap Values
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
+ @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
+ @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
+ If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 SoftStrapAddr,
+ IN UINT32 ByteCount,
+ OUT VOID *SoftStrapValue
+ );
+
+/**
+ These protocols/PPI allows a platform module to perform SPI operations through the
+ Intel PCH SPI Host Controller Interface.
+**/
+struct _PCH_SPI_PROTOCOL {
+ /**
+ This member specifies the revision of this structure. This field is used to
+ indicate backwards compatible changes to the protocol.
+ **/
+ UINT8 Revision;
+ PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
+ PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
+ PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
+ PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
+ PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
+ PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
+ PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
+ PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
+ PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
+ PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
+};
+
+/**
+ PCH SPI PPI/PROTOCOL revision number
+
+ Revision 1: Initial version
+**/
+#define PCH_SPI_SERVICES_REVISION 1
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 4a1eee3a5077..a2958b7eca23 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -74,6 +74,11 @@ [Ppis]
gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
[Protocols]
+ ## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface
+ # Include/Protocol/Spi.h
+ gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26, 0x9d, 0xe, 0xf3, 0x4a}}
+ gPchSmmSpiProtocolGuid = {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
+
gEdkiiPlatformVTdPolicyProtocolGuid = { 0x3d17e448, 0x466, 0x4e20, { 0x99, 0x9f, 0xb2, 0xe1, 0x34, 0x88, 0xee, 0x22 }}
## Protocol for device security policy.
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 08/35] IntelSiliconPkg: Add SpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (6 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 07/35] IntelSiliconPkg: Add PCH SPI Protocol Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 09/35] IntelSiliconPkg: Add SmmSpiFlashCommonLib Michael Kubacki
` (27 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Adds the SpiFlashCommonLib interface to IntelSiliconPkg. The initial
library instance added in this change is the NULL instance.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c | 101 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h | 98 +++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 1 +
Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf | 28 ++++++
5 files changed, 232 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
new file mode 100644
index 000000000000..c5f46829869c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
@@ -0,0 +1,101 @@
+/** @file
+ Null Library instance of SPI Flash Common Library Class
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/SpiFlashCommonLib.h>
+
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the read.
+ @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ ASSERT(FALSE);
+ return EFI_SUCCESS;
+}
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the write.
+ @param[in,out] NumBytes On input, the number of bytes to write. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ ASSERT(FALSE);
+ return EFI_SUCCESS;
+}
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block to be erased.
+ This library assume that caller guarantee that the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
+ On output, the actual number of bytes erased.
+
+ @retval EFI_SUCCESS. Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ )
+{
+ ASSERT(FALSE);
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h
new file mode 100644
index 000000000000..ef62ba238d71
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h
@@ -0,0 +1,98 @@
+/** @file
+ The header file includes the common header files, defines
+ internal structure and functions used by SpiFlashCommonLib.
+
+ Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SPI_FLASH_COMMON_LIB_H__
+#define __SPI_FLASH_COMMON_LIB_H__
+
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ );
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the read.
+ @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the write.
+ @param[in,out] NumBytes On input, the number of bytes to write. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ );
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block to be erased.
+ This library assume that caller garantee that the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
+ On output, the actual number of bytes erased.
+
+ @retval EFI_SUCCESS. Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ );
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index a2958b7eca23..6549017540e5 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -42,6 +42,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
#
AslUpdateLib|Include/Library/AslUpdateLib.h
+ ## @libraryclass Provides services to perform SPI flash actions
+ #
+ SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
+
[Guids]
## GUID for Package token space
# {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735}
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index 5e0de7e19a74..fd63b7019f1c 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -93,6 +93,7 @@ [Components]
IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.inf
IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.inf
IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
+ IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
[BuildOptions]
*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
new file mode 100644
index 000000000000..f2d9e4f21d4b
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
@@ -0,0 +1,28 @@
+### @file
+# NULL instance of Spi Flash Common Library Class
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = SpiFlashCommonLibNull
+ FILE_GUID = F35BBEE7-A681-443E-BB15-07AF9FABBDED
+ VERSION_STRING = 1.0
+ MODULE_TYPE = BASE
+ LIBRARY_CLASS = SpiFlashCommonLib
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Sources]
+ SpiFlashCommonLibNull.c
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 09/35] IntelSiliconPkg: Add SmmSpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (7 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 08/35] IntelSiliconPkg: Add SpiFlashCommonLib Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
` (26 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Adds the SMM instance of SpiFlashCommonLib. The code is based on
refactoring existing library instances into a consolidated version
with no functional impact.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c | 58 ++++++
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 209 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 5 +
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 48 +++++
4 files changed, 320 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
new file mode 100644
index 000000000000..7941b8f8720c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
@@ -0,0 +1,58 @@
+/** @file
+ SMM Library instance of SPI Flash Common Library Class
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/SmmServicesTableLib.h>
+#include <Protocol/Spi.h>
+#include <Library/DebugLib.h>
+
+extern PCH_SPI_PROTOCOL *mSpiProtocol;
+
+extern UINTN mBiosAreaBaseAddress;
+extern UINTN mBiosSize;
+extern UINTN mBiosOffset;
+
+/**
+ The library constructuor.
+
+ The function does the necessary initialization work for this library
+ instance.
+
+ @param[in] ImageHandle The firmware allocated handle for the UEFI image.
+ @param[in] SystemTable A pointer to the EFI system table.
+
+ @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
+ It will ASSERT on error for debug version.
+ @retval EFI_ERROR Please reference LocateProtocol for error code details.
+**/
+EFI_STATUS
+EFIAPI
+SmmSpiFlashCommonLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT32 BaseAddr;
+ UINT32 RegionSize;
+
+ mBiosAreaBaseAddress = (UINTN)PcdGet32 (PcdBiosAreaBaseAddress);
+ mBiosSize = (UINTN)PcdGet32 (PcdBiosSize);
+
+ //
+ // Locate the SMM SPI protocol.
+ //
+ Status = gSmst->SmmLocateProtocol (
+ &gPchSmmSpiProtocolGuid,
+ NULL,
+ (VOID **) &mSpiProtocol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAddr, &RegionSize);
+ mBiosOffset = BaseAddr;
+ return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
new file mode 100644
index 000000000000..daebaf8e5e33
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
@@ -0,0 +1,209 @@
+/** @file
+ Wrap PCH_SPI_PROTOCOL to provide some library level interfaces
+ for module use.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/SpiFlashCommonLib.h>
+#include <Library/IoLib.h>
+#include <Protocol/Spi.h>
+
+PCH_SPI_PROTOCOL *mSpiProtocol;
+
+//
+// Variables for boottime and runtime usage.
+//
+UINTN mBiosAreaBaseAddress = 0;
+UINTN mBiosSize = 0;
+UINTN mBiosOffset = 0;
+
+/**
+ Enable block protection on the Serial Flash device.
+
+ @retval EFI_SUCCESS Opertion is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Read NumBytes bytes of data from the address specified by
+ PAddress into Buffer.
+
+ @param[in] Address The starting physical address of the read.
+ @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
+ of bytes actually read.
+ @param[out] Buffer The destination data buffer for the read.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ ASSERT ((NumBytes != NULL) && (Buffer != NULL));
+ if ((NumBytes == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // This function is implemented specifically for those platforms
+ // at which the SPI device is memory mapped for read. So this
+ // function just do a memory copy for Spi Flash Read.
+ //
+ CopyMem (Buffer, (VOID *) Address, *NumBytes);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Write NumBytes bytes of data from Buffer to the address specified by
+ PAddresss.
+
+ @param[in] Address The starting physical address of the write.
+ @param[in,out] NumBytes On input, the number of bytes to write. On output,
+ the actual number of bytes written.
+ @param[in] Buffer The source data buffer for the write.
+
+ @retval EFI_SUCCESS Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+ IN UINTN Address,
+ IN OUT UINT32 *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINTN Offset;
+ UINT32 Length;
+ UINT32 RemainingBytes;
+
+ ASSERT ((NumBytes != NULL) && (Buffer != NULL));
+ if ((NumBytes == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ASSERT (Address >= mBiosAreaBaseAddress);
+ if (Address < mBiosAreaBaseAddress) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Offset = Address - mBiosAreaBaseAddress;
+
+ ASSERT ((*NumBytes + Offset) <= mBiosSize);
+ if ((*NumBytes + Offset) > mBiosSize) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EFI_SUCCESS;
+ RemainingBytes = *NumBytes;
+
+
+ while (RemainingBytes > 0) {
+ if (RemainingBytes > SECTOR_SIZE_4KB) {
+ Length = SECTOR_SIZE_4KB;
+ } else {
+ Length = RemainingBytes;
+ }
+ Status = mSpiProtocol->FlashWrite (
+ mSpiProtocol,
+ FlashRegionBios,
+ (UINT32) Offset,
+ Length,
+ Buffer
+ );
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+ RemainingBytes -= Length;
+ Offset += Length;
+ Buffer += Length;
+ }
+
+ //
+ // Actual number of bytes written
+ //
+ *NumBytes -= RemainingBytes;
+
+ return Status;
+}
+
+/**
+ Erase the block starting at Address.
+
+ @param[in] Address The starting physical address of the block to be erased.
+ This library assume that caller garantee that the PAddress
+ is at the starting address of this block.
+ @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
+ On output, the actual number of bytes erased.
+
+ @retval EFI_SUCCESS. Operation is successful.
+ @retval EFI_DEVICE_ERROR If there is any device errors.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+ IN UINTN Address,
+ IN UINTN *NumBytes
+ )
+{
+ EFI_STATUS Status;
+ UINTN Offset;
+ UINTN RemainingBytes;
+
+ ASSERT (NumBytes != NULL);
+ if (NumBytes == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ASSERT (Address >= mBiosAreaBaseAddress);
+ if (Address < mBiosAreaBaseAddress) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Offset = Address - mBiosAreaBaseAddress;
+
+ ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
+ if ((*NumBytes % SECTOR_SIZE_4KB) != 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ASSERT ((*NumBytes + Offset) <= mBiosSize);
+ if ((*NumBytes + Offset) > mBiosSize) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EFI_SUCCESS;
+ RemainingBytes = *NumBytes;
+
+
+ Status = mSpiProtocol->FlashErase (
+ mSpiProtocol,
+ FlashRegionBios,
+ (UINT32) Offset,
+ (UINT32) RemainingBytes
+ );
+ return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index fd63b7019f1c..7eb9c9def60a 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -59,6 +59,10 @@ [LibraryClasses.common.DXE_DRIVER]
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+[LibraryClasses.common.DXE_SMM_DRIVER]
+ MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
+ SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
+
###################################################################################################
#
# Components Section - list of the modules and components that will be processed by compilation
@@ -94,6 +98,7 @@ [Components]
IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.inf
IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
+ IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
[BuildOptions]
*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
new file mode 100644
index 000000000000..f6a06351ace5
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
@@ -0,0 +1,48 @@
+## @file
+# SMM Library instance of Spi Flash Common Library Class
+#
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = SmmSpiFlashCommonLib
+ FILE_GUID = 99721728-C39D-4600-BD38-71E8238FEEF2
+ VERSION_STRING = 1.0
+ MODULE_TYPE = DXE_SMM_DRIVER
+ LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
+ CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ MemoryAllocationLib
+ SmmServicesTableLib
+ UefiLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+
+[Sources]
+ SmmSpiFlashCommonLib.c
+ SpiFlashCommon.c
+
+[Protocols]
+ gPchSmmSpiProtocolGuid ## CONSUMES
+
+[Depex.X64.DXE_SMM_DRIVER]
+ gPchSmmSpiProtocolGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (8 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 09/35] IntelSiliconPkg: Add SmmSpiFlashCommonLib Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 11:17 ` Ni, Ray
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 11/35] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
` (25 subsequent siblings)
35 siblings, 1 reply; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Adds a Traditional MM and Standalone MM SPI FVB Service driver to
IntelSiliconPkg. These drivers produce the firmware volume block
protocol for SPI flash devices compliant with the Intel Serial
Flash Interface Compatibility Specification.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c | 94 ++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c | 903 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c | 271 ++++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c | 32 +
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c | 32 +
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h | 158 ++++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h | 22 +
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 68 ++
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf | 67 ++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 11 +
10 files changed, 1658 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
new file mode 100644
index 000000000000..7f2678fa9e5a
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
@@ -0,0 +1,94 @@
+/**@file
+ Defines data structure that is the volume header found.
+ These data is intent to decouple FVB driver with FV header.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+#define FIRMWARE_BLOCK_SIZE 0x10000
+#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
+
+#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVariableBase)
+#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
+ EFI_FV_BLOCK_MAP_ENTRY End[1];
+} EFI_FVB2_MEDIA_INFO;
+
+//
+// This data structure contains a template of all correct FV headers, which is used to restore
+// Fv header if it's corrupted.
+//
+EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
+ //
+ // Systen NvStorage FVB
+ //
+ {
+ NV_STORAGE_BASE_ADDRESS,
+ {
+ {0,}, //ZeroVector[16]
+ EFI_SYSTEM_NV_DATA_FV_GUID,
+ FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
+ EFI_FVH_SIGNATURE,
+ 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
+ sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
+ 0, //CheckSum which will be calucated dynamically.
+ 0, //ExtHeaderOffset
+ {0,}, //Reserved[1]
+ 2, //Revision
+ {
+ {
+ SYSTEM_NV_BLOCK_NUM,
+ FVB_MEDIA_BLOCK_SIZE,
+ }
+ }
+ },
+ {
+ {
+ 0,
+ 0
+ }
+ }
+ }
+};
+
+EFI_STATUS
+GetFvbInfo (
+ IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
+ OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
+ )
+{
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
+
+ for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB2_MEDIA_INFO); Index++) {
+ if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
+ FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
+
+ //
+ // Update the checksum value of FV header.
+ //
+ FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader, FvHeader->HeaderLength);
+
+ *FvbInfo = FvHeader;
+
+ DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
+ DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
+ DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
+ DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[0].NumBlocks));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)->BlockMap[0].Length));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[1].NumBlocks));
+ DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbInfo)->BlockMap[1].Length));
+
+ return EFI_SUCCESS;
+ }
+ }
+ return EFI_NOT_FOUND;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
new file mode 100644
index 000000000000..dab818e98087
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
@@ -0,0 +1,903 @@
+/** @file
+ Common driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+//
+// Global variable for this FVB driver which contains
+// the private data of all firmware volume block instances
+//
+FVB_GLOBAL mFvbModuleGlobal;
+
+//
+// This platform driver knows there are multiple FVs on FD.
+// Now we only provide FVs on Variable region and MicorCode region for performance issue.
+//
+FV_INFO mPlatformFvBaseAddress[] = {
+ {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
+ {0, 0}
+};
+
+FV_INFO mPlatformDefaultBaseAddress[] = {
+ {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
+ {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
+ {0, 0}
+};
+
+FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
+ {
+ {
+ HARDWARE_DEVICE_PATH,
+ HW_MEMMAP_DP,
+ {
+ (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
+ (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
+ }
+ },
+ EfiMemoryMappedIO,
+ (EFI_PHYSICAL_ADDRESS) 0,
+ (EFI_PHYSICAL_ADDRESS) 0,
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ END_DEVICE_PATH_LENGTH,
+ 0
+ }
+ }
+};
+
+FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
+ {
+ {
+ MEDIA_DEVICE_PATH,
+ MEDIA_PIWG_FW_VOL_DP,
+ {
+ (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
+ (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
+ }
+ },
+ { 0 }
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ END_DEVICE_PATH_LENGTH,
+ 0
+ }
+ }
+};
+
+//
+// Template structure used when installing FVB protocol
+//
+EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
+ FvbProtocolGetAttributes,
+ FvbProtocolSetAttributes,
+ FvbProtocolGetPhysicalAddress,
+ FvbProtocolGetBlockSize,
+ FvbProtocolRead,
+ FvbProtocolWrite,
+ FvbProtocolEraseBlocks,
+ NULL
+};
+
+/**
+ Get the EFI_FVB_ATTRIBUTES_2 of a FV.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
+
+ @return Attributes of the FV identified by FvbInstance.
+
+**/
+EFI_FVB_ATTRIBUTES_2
+FvbGetVolumeAttributes (
+ IN EFI_FVB_INSTANCE *FvbInstance
+ )
+{
+ return FvbInstance->FvHeader.Attributes;
+}
+
+/**
+ Retrieves the starting address of an LBA in an FV. It also
+ return a few other attribut of the FV.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
+ @param[in] Lba The logical block address
+ @param[out] LbaAddress On output, contains the physical starting address
+ of the Lba
+ @param[out] LbaLength On output, contains the length of the block
+ @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
+ number of consecutive blocks starting with Lba is
+ returned. All blocks in this range have a size of
+ BlockSize
+
+ @retval EFI_SUCCESS Successfully returns
+ @retval EFI_INVALID_PARAMETER Instance not found
+
+**/
+EFI_STATUS
+FvbGetLbaAddress (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba,
+ OUT UINTN *LbaAddress,
+ OUT UINTN *LbaLength,
+ OUT UINTN *NumOfBlocks
+ )
+{
+ UINT32 NumBlocks;
+ UINT32 BlockLength;
+ UINTN Offset;
+ EFI_LBA StartLba;
+ EFI_LBA NextLba;
+ EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
+
+ StartLba = 0;
+ Offset = 0;
+ BlockMap = &(FvbInstance->FvHeader.BlockMap[0]);
+
+ //
+ // Parse the blockmap of the FV to find which map entry the Lba belongs to
+ //
+ while (TRUE) {
+ NumBlocks = BlockMap->NumBlocks;
+ BlockLength = BlockMap->Length;
+
+ if ( NumBlocks == 0 || BlockLength == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ NextLba = StartLba + NumBlocks;
+
+ //
+ // The map entry found
+ //
+ if (Lba >= StartLba && Lba < NextLba) {
+ Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
+ if (LbaAddress ) {
+ *LbaAddress = FvbInstance->FvBase + Offset;
+ }
+
+ if (LbaLength ) {
+ *LbaLength = BlockLength;
+ }
+
+ if (NumOfBlocks ) {
+ *NumOfBlocks = (UINTN)(NextLba - Lba);
+ }
+ return EFI_SUCCESS;
+ }
+
+ StartLba = NextLba;
+ Offset = Offset + NumBlocks * BlockLength;
+ BlockMap++;
+ }
+}
+
+/**
+ Reads specified number of bytes into a buffer from the specified block.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
+ @param[in] Lba The logical block address to be read from
+ @param[in] BlockOffset Offset into the block at which to begin reading
+ @param[in] NumBytes Pointer that on input contains the total size of
+ the buffer. On output, it contains the total number
+ of bytes read
+ @param[in] Buffer Pointer to a caller allocated buffer that will be
+ used to hold the data read
+
+
+ @retval EFI_SUCCESS The firmware volume was read successfully and
+ contents are in Buffer
+ @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
+ NumBytes contains the total number of bytes returned
+ in Buffer
+ @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
+ could not be read
+ @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
+
+**/
+EFI_STATUS
+FvbReadBlock (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba,
+ IN UINTN BlockOffset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ UINTN LbaAddress;
+ UINTN LbaLength;
+ EFI_STATUS Status;
+ BOOLEAN BadBufferSize = FALSE;
+
+ if ((NumBytes == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (*NumBytes == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ Attributes = FvbGetVolumeAttributes (FvbInstance);
+
+ if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ if (BlockOffset > LbaLength) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (LbaLength < (*NumBytes + BlockOffset)) {
+ DEBUG ((DEBUG_INFO,
+ "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
+ *NumBytes,
+ (UINT32)(LbaLength - BlockOffset))
+ );
+ *NumBytes = (UINT32) (LbaLength - BlockOffset);
+ BadBufferSize = TRUE;
+ }
+
+ Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
+
+ if (!EFI_ERROR (Status) && BadBufferSize) {
+ return EFI_BAD_BUFFER_SIZE;
+ } else {
+ return Status;
+ }
+}
+
+/**
+ Writes specified number of bytes from the input buffer to the block.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
+ @param[in] Lba The starting logical block index to write to
+ @param[in] BlockOffset Offset into the block at which to begin writing
+ @param[in] NumBytes Pointer that on input contains the total size of
+ the buffer. On output, it contains the total number
+ of bytes actually written
+ @param[in] Buffer Pointer to a caller allocated buffer that contains
+ the source for the write
+ @retval EFI_SUCCESS The firmware volume was written successfully
+ @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
+ NumBytes contains the total number of bytes
+ actually written
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
+ could not be written
+ @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
+
+**/
+EFI_STATUS
+FvbWriteBlock (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba,
+ IN UINTN BlockOffset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ UINTN LbaAddress;
+ UINTN LbaLength;
+ EFI_STATUS Status;
+ BOOLEAN BadBufferSize = FALSE;
+
+ if ((NumBytes == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (*NumBytes == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ //
+ // Check if the FV is write enabled
+ //
+ Attributes = FvbGetVolumeAttributes (FvbInstance);
+ if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ //
+ // Perform boundary checks and adjust NumBytes
+ //
+ if (BlockOffset > LbaLength) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (LbaLength < (*NumBytes + BlockOffset)) {
+ DEBUG ((DEBUG_INFO,
+ "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
+ *NumBytes,
+ (UINT32)(LbaLength - BlockOffset))
+ );
+ *NumBytes = (UINT32) (LbaLength - BlockOffset);
+ BadBufferSize = TRUE;
+ }
+
+ Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = SpiFlashLock ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), *NumBytes);
+
+ if (!EFI_ERROR (Status) && BadBufferSize) {
+ return EFI_BAD_BUFFER_SIZE;
+ } else {
+ return Status;
+ }
+}
+
+
+
+/**
+ Erases and initializes a firmware volume block.
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
+ @param[in] Lba The logical block index to be erased
+
+ @retval EFI_SUCCESS The erase request was successfully completed
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
+ could not be written. Firmware device may have been
+ partially erased
+ @retval EFI_INVALID_PARAMETER Instance not found
+
+**/
+EFI_STATUS
+FvbEraseBlock (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN EFI_LBA Lba
+ )
+{
+
+ EFI_FVB_ATTRIBUTES_2 Attributes;
+ UINTN LbaAddress;
+ UINTN LbaLength;
+ EFI_STATUS Status;
+
+ //
+ // Check if the FV is write enabled
+ //
+ Attributes = FvbGetVolumeAttributes (FvbInstance);
+
+ if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ //
+ // Get the starting address of the block for erase.
+ //
+ Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = SpiFlashLock ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
+
+ return Status;
+}
+
+/**
+ Modifies the current settings of the firmware volume according to the
+ input parameter, and returns the new setting of the volume
+
+ @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
+ @param[in] Attributes On input, it is a pointer to EFI_FVB_ATTRIBUTES_2
+ containing the desired firmware volume settings.
+ On successful return, it contains the new settings
+ of the firmware volume
+
+ @retval EFI_SUCCESS Successfully returns
+ @retval EFI_ACCESS_DENIED The volume setting is locked and cannot be modified
+ @retval EFI_INVALID_PARAMETER Instance not found, or The attributes requested are
+ in conflict with the capabilities as declared in the
+ firmware volume header
+
+**/
+EFI_STATUS
+FvbSetVolumeAttributes (
+ IN EFI_FVB_INSTANCE *FvbInstance,
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ )
+{
+ EFI_FVB_ATTRIBUTES_2 OldAttributes;
+ EFI_FVB_ATTRIBUTES_2 *AttribPtr;
+ EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
+ UINT32 Capabilities;
+ UINT32 OldStatus, NewStatus;
+
+ AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attributes);
+ OldAttributes = *AttribPtr;
+ Capabilities = OldAttributes & EFI_FVB2_CAPABILITIES;
+ OldStatus = OldAttributes & EFI_FVB2_STATUS;
+ NewStatus = *Attributes & EFI_FVB2_STATUS;
+
+ UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP | \
+ EFI_FVB2_READ_ENABLED_CAP | \
+ EFI_FVB2_WRITE_DISABLED_CAP | \
+ EFI_FVB2_WRITE_ENABLED_CAP | \
+ EFI_FVB2_LOCK_CAP | \
+ EFI_FVB2_STICKY_WRITE | \
+ EFI_FVB2_MEMORY_MAPPED | \
+ EFI_FVB2_ERASE_POLARITY | \
+ EFI_FVB2_READ_LOCK_CAP | \
+ EFI_FVB2_WRITE_LOCK_CAP | \
+ EFI_FVB2_ALIGNMENT;
+
+ //
+ // Some attributes of FV is read only can *not* be set
+ //
+ if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAttributes)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If firmware volume is locked, no status bit can be updated
+ //
+ if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
+ if ( OldStatus ^ NewStatus ) {
+ return EFI_ACCESS_DENIED;
+ }
+ }
+
+ //
+ // Test read disable
+ //
+ if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
+ if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test read enable
+ //
+ if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
+ if (NewStatus & EFI_FVB2_READ_STATUS) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test write disable
+ //
+ if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
+ if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test write enable
+ //
+ if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
+ if (NewStatus & EFI_FVB2_WRITE_STATUS) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Test lock
+ //
+ if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
+ if (NewStatus & EFI_FVB2_LOCK_STATUS) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ *AttribPtr = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
+ *AttribPtr = (*AttribPtr) | NewStatus;
+ *Attributes = *AttribPtr;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Check the integrity of firmware volume header
+
+ @param[in] FvHeader A pointer to a firmware volume header
+
+ @retval TRUE The firmware volume is consistent
+ @retval FALSE The firmware volume has corrupted.
+
+**/
+BOOLEAN
+IsFvHeaderValid (
+ IN EFI_PHYSICAL_ADDRESS FvBase,
+ IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
+ )
+{
+ if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
+ if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
+ return FALSE;
+ }
+ } else {
+ if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
+ return FALSE;
+ }
+ }
+ if ( (FvHeader->Revision != EFI_FVH_REVISION) ||
+ (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
+ (FvHeader->FvLength == ((UINTN) -1)) ||
+ ((FvHeader->HeaderLength & 0x01 ) !=0) ) {
+ return FALSE;
+ }
+
+ if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != 0) {
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+//
+// FVB protocol APIs
+//
+
+/**
+ Retrieves the physical address of the device.
+
+ @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
+ @param[out] Address Output buffer containing the address.
+
+ retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetPhysicalAddress (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+ *Address = FvbInstance->FvBase;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Retrieve the size of a logical block
+
+ @param[in] This Calling context
+ @param[in] Lba Indicates which block to return the size for.
+ @param[out] BlockSize A pointer to a caller allocated UINTN in which
+ the size of the block is returned
+ @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
+ number of consecutive blocks starting with Lba is
+ returned. All blocks in this range have a size of
+ BlockSize
+
+ @retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetBlockSize (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumOfBlocks
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x%x\n",
+ Lba,
+ BlockSize,
+ NumOfBlocks)
+ );
+
+ return FvbGetLbaAddress (
+ FvbInstance,
+ Lba,
+ NULL,
+ BlockSize,
+ NumOfBlocks
+ );
+}
+
+/**
+ Retrieves Volume attributes. No polarity translations are done.
+
+ @param[in] This Calling context
+ @param[out] Attributes Output buffer which contains attributes
+
+ @retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+ *Attributes = FvbGetVolumeAttributes (FvbInstance);
+
+ DEBUG ((DEBUG_INFO,
+ "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
+ This,
+ *Attributes)
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets Volume attributes. No polarity translations are done.
+
+ @param[in] This Calling context
+ @param[out] Attributes Output buffer which contains attributes
+
+ @retval EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolSetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ )
+{
+ EFI_STATUS Status;
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n",
+ This,
+ *Attributes)
+ );
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+ Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n",
+ This,
+ *Attributes)
+ );
+
+ return Status;
+}
+
+/**
+ The EraseBlock() function erases one or more blocks as denoted by the
+ variable argument list. The entire parameter list of blocks must be verified
+ prior to erasing any blocks. If a block is requested that does not exist
+ within the associated firmware volume (it has a larger index than the last
+ block of the firmware volume), the EraseBlock() function must return
+ EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
+
+ @param[in] This Calling context
+ @param[in] ... Starting LBA followed by Number of Lba to erase.
+ a -1 to terminate the list.
+
+ @retval EFI_SUCCESS The erase request was successfully completed
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
+ could not be written. Firmware device may have been
+ partially erased
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolEraseBlocks (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+ UINTN NumOfBlocks;
+ VA_LIST Args;
+ EFI_LBA StartingLba;
+ UINTN NumOfLba;
+ EFI_STATUS Status;
+
+ DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+ NumOfBlocks = FvbInstance->NumOfBlocks;
+
+ VA_START (Args, This);
+
+ do {
+ StartingLba = VA_ARG (Args, EFI_LBA);
+ if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
+ break;
+ }
+
+ NumOfLba = VA_ARG (Args, UINT32);
+
+ //
+ // Check input parameters
+ //
+ if (NumOfLba == 0) {
+ VA_END (Args);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
+ return EFI_INVALID_PARAMETER;
+ }
+ } while ( 1 );
+
+ VA_END (Args);
+
+ VA_START (Args, This);
+ do {
+ StartingLba = VA_ARG (Args, EFI_LBA);
+ if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
+ break;
+ }
+
+ NumOfLba = VA_ARG (Args, UINT32);
+
+ while ( NumOfLba > 0 ) {
+ Status = FvbEraseBlock (FvbInstance, StartingLba);
+ if ( EFI_ERROR(Status)) {
+ VA_END (Args);
+ return Status;
+ }
+ StartingLba ++;
+ NumOfLba --;
+ }
+
+ } while ( 1 );
+
+ VA_END (Args);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Writes data beginning at Lba:Offset from FV. The write terminates either
+ when *NumBytes of data have been written, or when a block boundary is
+ reached. *NumBytes is updated to reflect the actual number of bytes
+ written. The write opertion does not include erase. This routine will
+ attempt to write only the specified bytes. If the writes do not stick,
+ it will return an error.
+
+ @param[in] This Calling context
+ @param[in] Lba Block in which to begin write
+ @param[in] Offset Offset in the block at which to begin write
+ @param[in,out] NumBytes On input, indicates the requested write size. On
+ output, indicates the actual number of bytes written
+ @param[in] Buffer Buffer containing source data for the write.
+
+ @retval EFI_SUCCESS The firmware volume was written successfully
+ @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
+ NumBytes contains the total number of bytes
+ actually written
+ @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
+ could not be written
+ @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolWrite (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
+ Lba,
+ Offset,
+ *NumBytes,
+ Buffer)
+ );
+
+ return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
+}
+
+/**
+ Reads data beginning at Lba:Offset from FV. The Read terminates either
+ when *NumBytes of data have been read, or when a block boundary is
+ reached. *NumBytes is updated to reflect the actual number of bytes
+ written. The write opertion does not include erase. This routine will
+ attempt to write only the specified bytes. If the writes do not stick,
+ it will return an error.
+
+ @param[in] This Calling context
+ @param[in] Lba Block in which to begin write
+ @param[in] Offset Offset in the block at which to begin write
+ @param[in,out] NumBytes On input, indicates the requested write size. On
+ output, indicates the actual number of bytes written
+ @param[in] Buffer Buffer containing source data for the write.
+
+ @retval EFI_SUCCESS The firmware volume was read successfully and
+ contents are in Buffer
+ @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
+ NumBytes contains the total number of bytes returned
+ in Buffer
+ @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
+ @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
+ could not be read
+ @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolRead (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+ EFI_STATUS Status;
+
+ FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+ Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
+ DEBUG((DEBUG_INFO,
+ "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
+ Lba,
+ Offset,
+ *NumBytes,
+ Buffer)
+ );
+
+ return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
new file mode 100644
index 000000000000..42a0828c6fae
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
@@ -0,0 +1,271 @@
+/** @file
+ MM driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include <Library/MmServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Protocol/SmmFirmwareVolumeBlock.h>
+
+/**
+ The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
+ for each FV in the system.
+
+ @param[in] FvbInstance The pointer to a FW volume instance structure,
+ which contains the information about one FV.
+
+ @retval VOID
+
+**/
+VOID
+InstallFvbProtocol (
+ IN EFI_FVB_INSTANCE *FvbInstance
+ )
+{
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
+ EFI_STATUS Status;
+ EFI_HANDLE FvbHandle;
+
+ ASSERT (FvbInstance != NULL);
+ if (FvbInstance == NULL) {
+ return;
+ }
+
+ CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
+
+ FvHeader = &FvbInstance->FvHeader;
+ if (FvHeader == NULL) {
+ return;
+ }
+
+ //
+ // Set up the devicepath
+ //
+ DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\n", FvbInstance->FvBase));
+ if (FvHeader->ExtHeaderOffset == 0) {
+ //
+ // FV does not contains extension header, then produce MEMMAP_DEVICE_PATH
+ //
+ FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
+ if (FvbInstance->DevicePath == NULL) {
+ DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMAP_DEVICE_PATH failed\n"));
+ return;
+ }
+ ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.StartingAddress = FvbInstance->FvBase;
+ ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.EndingAddress = FvbInstance->FvBase + FvHeader->FvLength - 1;
+ } else {
+ FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
+ if (FvbInstance->DevicePath == NULL) {
+ DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PIWG_DEVICE_PATH failed\n"));
+ return;
+ }
+ CopyGuid (
+ &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName,
+ (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
+ );
+ }
+
+ //
+ // LocateDevicePath fails so install a new interface and device path
+ //
+ FvbHandle = NULL;
+
+ Status = gMmst->MmInstallProtocolInterface (
+ &FvbHandle,
+ &gEfiSmmFirmwareVolumeBlockProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &(FvbInstance->FvbProtocol)
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gMmst->MmInstallProtocolInterface (
+ &FvbHandle,
+ &gEfiDevicePathProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &(FvbInstance->DevicePath)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ The function does the necessary initialization work for
+ Firmware Volume Block Driver.
+
+**/
+VOID
+FvbInitialize (
+ VOID
+ )
+{
+ EFI_FVB_INSTANCE *FvbInstance;
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
+ EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ UINTN Idx;
+ UINT32 MaxLbaSize;
+ UINT32 BytesWritten;
+ UINTN BytesErased;
+
+ mPlatformFvBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
+ mPlatformFvBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
+ mPlatformFvBaseAddress[1].FvBase = PcdGet32(PcdFlashMicrocodeFvBase);
+ mPlatformFvBaseAddress[1].FvSize = PcdGet32(PcdFlashMicrocodeFvSize);
+ mPlatformDefaultBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
+ mPlatformDefaultBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
+ mPlatformDefaultBaseAddress[1].FvBase = PcdGet32(PcdFlashMicrocodeFvBase);
+ mPlatformDefaultBaseAddress[1].FvSize = PcdGet32(PcdFlashMicrocodeFvSize);
+
+ //
+ // We will only continue with FVB installation if the
+ // SPI is the active BIOS state
+ //
+ {
+ //
+ // Make sure all FVB are valid and/or fix if possible
+ //
+ for (Idx = 0;; Idx++) {
+ if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
+ break;
+ }
+
+ BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
+ FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+ if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+ BytesWritten = 0;
+ BytesErased = 0;
+ DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
+ Status = GetFvbInfo (BaseAddress, &FvHeader);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x. GetFvbInfo Status %r\n", BaseAddress, Status));
+ continue;
+ }
+ DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\n", BaseAddress));
+ //
+ // Spi erase
+ //
+ BytesErased = (UINTN) FvHeader->BlockMap->Length;
+ Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", Status));
+ continue;
+ }
+ if (BytesErased != FvHeader->BlockMap->Length) {
+ DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader->BlockMap->Length\n"));
+ DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n", BytesErased, FvHeader->BlockMap->Length));
+ continue;
+ }
+ BytesWritten = FvHeader->HeaderLength;
+ Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT8*)FvHeader);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status));
+ continue;
+ }
+ if (BytesWritten != FvHeader->HeaderLength) {
+ DEBUG ((DEBUG_WARN, "ERROR - BytesWritten != HeaderLength\n"));
+ DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength = 0x%X\n", BytesWritten, FvHeader->HeaderLength));
+ continue;
+ }
+ Status = SpiFlashLock ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status));
+ continue;
+ }
+ DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n", BaseAddress));
+ //
+ // Clear cache for this range.
+ //
+ WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, FvHeader->BlockMap->Length);
+ }
+ }
+
+ //
+ // Calculate the total size for all firmware volume block instances
+ //
+ BufferSize = 0;
+ for (Idx = 0; ; Idx++) {
+ if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
+ break;
+ }
+ BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
+ FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+ if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+ DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
+ continue;
+ }
+
+ BufferSize += (FvHeader->HeaderLength +
+ sizeof (EFI_FVB_INSTANCE) -
+ sizeof (EFI_FIRMWARE_VOLUME_HEADER)
+ );
+ }
+
+ mFvbModuleGlobal.FvbInstance = (EFI_FVB_INSTANCE *) AllocateRuntimeZeroPool (BufferSize);
+ if (mFvbModuleGlobal.FvbInstance == NULL) {
+ ASSERT (FALSE);
+ return;
+ }
+
+ MaxLbaSize = 0;
+ FvbInstance = mFvbModuleGlobal.FvbInstance;
+ mFvbModuleGlobal.NumFv = 0;
+
+ for (Idx = 0; ; Idx++) {
+ if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
+ break;
+ }
+ BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
+ FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+ if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+ DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
+ continue;
+ }
+
+ FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
+ CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength);
+
+ FvHeader = &(FvbInstance->FvHeader);
+ FvbInstance->FvBase = (UINTN)BaseAddress;
+
+ //
+ // Process the block map for each FV
+ //
+ FvbInstance->NumOfBlocks = 0;
+ for (PtrBlockMapEntry = FvHeader->BlockMap;
+ PtrBlockMapEntry->NumBlocks != 0;
+ PtrBlockMapEntry++) {
+ //
+ // Get the maximum size of a block.
+ //
+ if (MaxLbaSize < PtrBlockMapEntry->Length) {
+ MaxLbaSize = PtrBlockMapEntry->Length;
+ }
+ FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
+ }
+
+ //
+ // Add a FVB Protocol Instance
+ //
+ InstallFvbProtocol (FvbInstance);
+ mFvbModuleGlobal.NumFv++;
+
+ //
+ // Move on to the next FvbInstance
+ //
+ FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) +
+ FvHeader->HeaderLength +
+ (sizeof (EFI_FVB_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
+
+ }
+ }
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
new file mode 100644
index 000000000000..252c818d6551
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
@@ -0,0 +1,32 @@
+/** @file
+ MM driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include "SpiFvbServiceMm.h"
+
+/**
+ The driver Standalone MM entry point.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] MmSystemTable A pointer to the MM system table.
+
+ @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFvbStandaloneMmInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_MM_SYSTEM_TABLE *MmSystemTable
+ )
+{
+ FvbInitialize ();
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
new file mode 100644
index 000000000000..1c2dac70e3c6
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
@@ -0,0 +1,32 @@
+/** @file
+ MM driver source for several Serial Flash devices
+ which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include "SpiFvbServiceMm.h"
+
+/**
+ The driver Traditional MM entry point.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable A pointer to the EFI system table.
+
+ @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFvbTraditionalMmInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ FvbInitialize ();
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
new file mode 100644
index 000000000000..e9d69e985814
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
@@ -0,0 +1,158 @@
+/** @file
+ Common source definitions used in serial flash drivers
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SPI_FVB_SERVICE_COMMON_H
+#define _SPI_FVB_SERVICE_COMMON_H
+
+#include <Guid/EventGroup.h>
+#include <Guid/FirmwareFileSystem2.h>
+#include <Guid/SystemNvDataGuid.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/IoLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HobLib.h>
+
+#include <Library/SpiFlashCommonLib.h>
+
+//
+// Define two helper macro to extract the Capability field or Status field in FVB
+// bit fields
+//
+#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
+ EFI_FVB2_READ_ENABLED_CAP | \
+ EFI_FVB2_WRITE_DISABLED_CAP | \
+ EFI_FVB2_WRITE_ENABLED_CAP | \
+ EFI_FVB2_LOCK_CAP \
+ )
+
+#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
+
+#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
+
+typedef struct {
+ UINT32 Signature;
+ UINTN FvBase;
+ UINTN NumOfBlocks;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
+ EFI_FIRMWARE_VOLUME_HEADER FvHeader;
+} EFI_FVB_INSTANCE;
+
+typedef struct {
+ EFI_FVB_INSTANCE *FvbInstance;
+ UINT32 NumFv;
+} FVB_GLOBAL;
+
+//
+// Fvb Protocol instance data
+//
+#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, FVB_INSTANCE_SIGNATURE)
+
+typedef struct {
+ MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevPath;
+} FV_PIWG_DEVICE_PATH;
+
+typedef struct {
+ MEMMAP_DEVICE_PATH MemMapDevPath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevPath;
+} FV_MEMMAP_DEVICE_PATH;
+
+typedef struct {
+ UINT32 FvBase;
+ UINT32 FvSize;
+} FV_INFO;
+
+//
+// Protocol APIs
+//
+EFI_STATUS
+EFIAPI
+FvbProtocolGetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolSetAttributes (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolGetPhysicalAddress (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolGetBlockSize (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumOfBlocks
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolRead (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ OUT UINT8 *Buffer
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolWrite (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolEraseBlocks (
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+ );
+
+BOOLEAN
+IsFvHeaderValid (
+ IN EFI_PHYSICAL_ADDRESS FvBase,
+ IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
+ );
+
+EFI_STATUS
+GetFvbInfo (
+ IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
+ OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
+ );
+
+extern FVB_GLOBAL mFvbModuleGlobal;
+extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
+extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
+extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
+extern FV_INFO mPlatformFvBaseAddress[];
+extern FV_INFO mPlatformDefaultBaseAddress[];
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
new file mode 100644
index 000000000000..36af1130c8ee
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
@@ -0,0 +1,22 @@
+/** @file
+ Definitions common to MM implementation in this driver.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SPI_FVB_SERVICE_MM_H_
+#define _SPI_FVB_SERVICE_MM_H_
+
+/**
+ The function does the necessary initialization work for
+ Firmware Volume Block Driver.
+
+**/
+VOID
+FvbInitialize (
+ VOID
+ );
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
new file mode 100644
index 000000000000..bf1306f00201
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
@@ -0,0 +1,68 @@
+### @file
+# Component description file for the Serial Flash device Runtime driver.
+#
+# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = SpiFvbServiceSmm
+ FILE_GUID = 68A10D85-6858-4402-B070-028B3EA21747
+ VERSION_STRING = 1.0
+ MODULE_TYPE = DXE_SMM_DRIVER
+ PI_SPECIFICATION_VERSION = 1.10
+ ENTRY_POINT = SpiFvbTraditionalMmInitialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[LibraryClasses]
+ PcdLib
+ MemoryAllocationLib
+ CacheMaintenanceLib
+ BaseMemoryLib
+ DebugLib
+ BaseLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ SpiFlashCommonLib
+ MmServicesTableLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+
+[Sources]
+ FvbInfo.c
+ SpiFvbServiceCommon.h
+ SpiFvbServiceCommon.c
+ SpiFvbServiceMm.h
+ SpiFvbServiceMm.c
+ SpiFvbServiceTraditionalMm.c
+
+[Protocols]
+ gEfiDevicePathProtocolGuid ## PRODUCES
+ gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
+
+[Guids]
+ gEfiFirmwareFileSystem2Guid ## CONSUMES
+ gEfiSystemNvDataFvGuid ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
new file mode 100644
index 000000000000..b66233968247
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
@@ -0,0 +1,67 @@
+### @file
+# Component description file for the Serial Flash device Standalone MM driver.
+#
+# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = SpiFvbServiceStandaloneMm
+ FILE_GUID = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
+ VERSION_STRING = 1.0
+ MODULE_TYPE = MM_STANDALONE
+ PI_SPECIFICATION_VERSION = 0x00010032
+ ENTRY_POINT = SpiFvbStandaloneMmInitialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+ DebugLib
+ MemoryAllocationLib
+ PcdLib
+ MmServicesTableLib
+ SpiFlashCommonLib
+ StandaloneMmDriverEntryPoint
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+
+[Sources]
+ FvbInfo.c
+ SpiFvbServiceCommon.h
+ SpiFvbServiceCommon.c
+ SpiFvbServiceMm.h
+ SpiFvbServiceMm.c
+ SpiFvbServiceStandaloneMm.c
+
+[Protocols]
+ gEfiDevicePathProtocolGuid ## PRODUCES
+ gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
+
+[Guids]
+ gEfiFirmwareFileSystem2Guid ## CONSUMES
+ gEfiSystemNvDataFvGuid ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index 7eb9c9def60a..7e446c97a5fb 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -40,6 +40,9 @@ [LibraryClasses]
PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignmentLib/PeiGetVtdPmrAlignmentLib.inf
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
[LibraryClasses.common.PEIM]
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
@@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER]
[LibraryClasses.common.DXE_SMM_DRIVER]
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
+ MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
+[LibraryClasses.common.MM_STANDALONE]
+ MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf
+ MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
+ StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
+
###################################################################################################
#
# Components Section - list of the modules and components that will be processed by compilation
@@ -86,6 +95,8 @@ [Components]
IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.inf
IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/SamplePlatformDevicePolicyDxe.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf
IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* Re: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
@ 2021-04-16 11:17 ` Ni, Ray
2021-04-20 3:00 ` Guo Dong
0 siblings, 1 reply; 44+ messages in thread
From: Ni, Ray @ 2021-04-16 11:17 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io, Dong, Guo
Cc: Chaganty, Rangasai V
Guo,
I remember you mentioned to me there is a standard way to manipulate the flash storage because there is a HW between the SW and the real flash that does the command translation.
Is this change related to the standard way what you mentioned to me?
If yes, can you please help to review and provide comments?
Michael,
Having a universal implementation for SPI access is wonderful! Can you please share the documentation that explain the Intel Serial Flash Interface Compatibility spec?
> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Friday, April 16, 2021 10:31 AM
> To: devel@edk2.groups.io
> Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services
>
> From: Michael Kubacki <michael.kubacki@microsoft.com>
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>
> Adds a Traditional MM and Standalone MM SPI FVB Service driver to
> IntelSiliconPkg. These drivers produce the firmware volume block
> protocol for SPI flash devices compliant with the Intel Serial
> Flash Interface Compatibility Specification.
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> ---
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c | 94 ++
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c | 903 ++++++++++++++++++++
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c | 271 ++++++
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c | 32 +
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c | 32 +
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h | 158 ++++
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h | 22 +
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 68 ++
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf | 67 ++
> Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 11 +
> 10 files changed, 1658 insertions(+)
>
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> new file mode 100644
> index 000000000000..7f2678fa9e5a
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> @@ -0,0 +1,94 @@
> +/**@file
> + Defines data structure that is the volume header found.
> + These data is intent to decouple FVB driver with FV header.
> +
> +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SpiFvbServiceCommon.h"
> +
> +#define FIRMWARE_BLOCK_SIZE 0x10000
> +#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
> +
> +#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVariableBase)
> +#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+
> FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/
> FVB_MEDIA_BLOCK_SIZE)
> +
> +typedef struct {
> + EFI_PHYSICAL_ADDRESS BaseAddress;
> + EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
> + EFI_FV_BLOCK_MAP_ENTRY End[1];
> +} EFI_FVB2_MEDIA_INFO;
> +
> +//
> +// This data structure contains a template of all correct FV headers, which is used to restore
> +// Fv header if it's corrupted.
> +//
> +EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
> + //
> + // Systen NvStorage FVB
> + //
> + {
> + NV_STORAGE_BASE_ADDRESS,
> + {
> + {0,}, //ZeroVector[16]
> + EFI_SYSTEM_NV_DATA_FV_GUID,
> + FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
> + EFI_FVH_SIGNATURE,
> + 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
> + sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
> + 0, //CheckSum which will be calucated dynamically.
> + 0, //ExtHeaderOffset
> + {0,}, //Reserved[1]
> + 2, //Revision
> + {
> + {
> + SYSTEM_NV_BLOCK_NUM,
> + FVB_MEDIA_BLOCK_SIZE,
> + }
> + }
> + },
> + {
> + {
> + 0,
> + 0
> + }
> + }
> + }
> +};
> +
> +EFI_STATUS
> +GetFvbInfo (
> + IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
> + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
> + )
> +{
> + UINTN Index;
> + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
> +
> + for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB2_MEDIA_INFO); Index++) {
> + if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
> + FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
> +
> + //
> + // Update the checksum value of FV header.
> + //
> + FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader, FvHeader->HeaderLength);
> +
> + *FvbInfo = FvHeader;
> +
> + DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
> + DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
> + DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
> + DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum));
> + DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[0].NumBlocks));
> + DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)->BlockMap[0].Length));
> + DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[1].NumBlocks));
> + DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbInfo)->BlockMap[1].Length));
> +
> + return EFI_SUCCESS;
> + }
> + }
> + return EFI_NOT_FOUND;
> +}
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
> new file mode 100644
> index 000000000000..dab818e98087
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
> @@ -0,0 +1,903 @@
> +/** @file
> + Common driver source for several Serial Flash devices
> + which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
> +
> +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SpiFvbServiceCommon.h"
> +
> +//
> +// Global variable for this FVB driver which contains
> +// the private data of all firmware volume block instances
> +//
> +FVB_GLOBAL mFvbModuleGlobal;
> +
> +//
> +// This platform driver knows there are multiple FVs on FD.
> +// Now we only provide FVs on Variable region and MicorCode region for performance issue.
> +//
> +FV_INFO mPlatformFvBaseAddress[] = {
> + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
> + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
> + {0, 0}
> +};
> +
> +FV_INFO mPlatformDefaultBaseAddress[] = {
> + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
> + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
> + {0, 0}
> +};
> +
> +FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
> + {
> + {
> + HARDWARE_DEVICE_PATH,
> + HW_MEMMAP_DP,
> + {
> + (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
> + (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
> + }
> + },
> + EfiMemoryMappedIO,
> + (EFI_PHYSICAL_ADDRESS) 0,
> + (EFI_PHYSICAL_ADDRESS) 0,
> + },
> + {
> + END_DEVICE_PATH_TYPE,
> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + {
> + END_DEVICE_PATH_LENGTH,
> + 0
> + }
> + }
> +};
> +
> +FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
> + {
> + {
> + MEDIA_DEVICE_PATH,
> + MEDIA_PIWG_FW_VOL_DP,
> + {
> + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
> + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
> + }
> + },
> + { 0 }
> + },
> + {
> + END_DEVICE_PATH_TYPE,
> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + {
> + END_DEVICE_PATH_LENGTH,
> + 0
> + }
> + }
> +};
> +
> +//
> +// Template structure used when installing FVB protocol
> +//
> +EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
> + FvbProtocolGetAttributes,
> + FvbProtocolSetAttributes,
> + FvbProtocolGetPhysicalAddress,
> + FvbProtocolGetBlockSize,
> + FvbProtocolRead,
> + FvbProtocolWrite,
> + FvbProtocolEraseBlocks,
> + NULL
> +};
> +
> +/**
> + Get the EFI_FVB_ATTRIBUTES_2 of a FV.
> +
> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
> +
> + @return Attributes of the FV identified by FvbInstance.
> +
> +**/
> +EFI_FVB_ATTRIBUTES_2
> +FvbGetVolumeAttributes (
> + IN EFI_FVB_INSTANCE *FvbInstance
> + )
> +{
> + return FvbInstance->FvHeader.Attributes;
> +}
> +
> +/**
> + Retrieves the starting address of an LBA in an FV. It also
> + return a few other attribut of the FV.
> +
> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
> + @param[in] Lba The logical block address
> + @param[out] LbaAddress On output, contains the physical starting address
> + of the Lba
> + @param[out] LbaLength On output, contains the length of the block
> + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
> + number of consecutive blocks starting with Lba is
> + returned. All blocks in this range have a size of
> + BlockSize
> +
> + @retval EFI_SUCCESS Successfully returns
> + @retval EFI_INVALID_PARAMETER Instance not found
> +
> +**/
> +EFI_STATUS
> +FvbGetLbaAddress (
> + IN EFI_FVB_INSTANCE *FvbInstance,
> + IN EFI_LBA Lba,
> + OUT UINTN *LbaAddress,
> + OUT UINTN *LbaLength,
> + OUT UINTN *NumOfBlocks
> + )
> +{
> + UINT32 NumBlocks;
> + UINT32 BlockLength;
> + UINTN Offset;
> + EFI_LBA StartLba;
> + EFI_LBA NextLba;
> + EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
> +
> + StartLba = 0;
> + Offset = 0;
> + BlockMap = &(FvbInstance->FvHeader.BlockMap[0]);
> +
> + //
> + // Parse the blockmap of the FV to find which map entry the Lba belongs to
> + //
> + while (TRUE) {
> + NumBlocks = BlockMap->NumBlocks;
> + BlockLength = BlockMap->Length;
> +
> + if ( NumBlocks == 0 || BlockLength == 0) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + NextLba = StartLba + NumBlocks;
> +
> + //
> + // The map entry found
> + //
> + if (Lba >= StartLba && Lba < NextLba) {
> + Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
> + if (LbaAddress ) {
> + *LbaAddress = FvbInstance->FvBase + Offset;
> + }
> +
> + if (LbaLength ) {
> + *LbaLength = BlockLength;
> + }
> +
> + if (NumOfBlocks ) {
> + *NumOfBlocks = (UINTN)(NextLba - Lba);
> + }
> + return EFI_SUCCESS;
> + }
> +
> + StartLba = NextLba;
> + Offset = Offset + NumBlocks * BlockLength;
> + BlockMap++;
> + }
> +}
> +
> +/**
> + Reads specified number of bytes into a buffer from the specified block.
> +
> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
> + @param[in] Lba The logical block address to be read from
> + @param[in] BlockOffset Offset into the block at which to begin reading
> + @param[in] NumBytes Pointer that on input contains the total size of
> + the buffer. On output, it contains the total number
> + of bytes read
> + @param[in] Buffer Pointer to a caller allocated buffer that will be
> + used to hold the data read
> +
> +
> + @retval EFI_SUCCESS The firmware volume was read successfully and
> + contents are in Buffer
> + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
> + NumBytes contains the total number of bytes returned
> + in Buffer
> + @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
> + could not be read
> + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
> +
> +**/
> +EFI_STATUS
> +FvbReadBlock (
> + IN EFI_FVB_INSTANCE *FvbInstance,
> + IN EFI_LBA Lba,
> + IN UINTN BlockOffset,
> + IN OUT UINTN *NumBytes,
> + IN UINT8 *Buffer
> + )
> +{
> + EFI_FVB_ATTRIBUTES_2 Attributes;
> + UINTN LbaAddress;
> + UINTN LbaLength;
> + EFI_STATUS Status;
> + BOOLEAN BadBufferSize = FALSE;
> +
> + if ((NumBytes == NULL) || (Buffer == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> + if (*NumBytes == 0) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
> + if (EFI_ERROR(Status)) {
> + return Status;
> + }
> +
> + Attributes = FvbGetVolumeAttributes (FvbInstance);
> +
> + if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
> + return EFI_ACCESS_DENIED;
> + }
> +
> + if (BlockOffset > LbaLength) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if (LbaLength < (*NumBytes + BlockOffset)) {
> + DEBUG ((DEBUG_INFO,
> + "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
> + *NumBytes,
> + (UINT32)(LbaLength - BlockOffset))
> + );
> + *NumBytes = (UINT32) (LbaLength - BlockOffset);
> + BadBufferSize = TRUE;
> + }
> +
> + Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
> +
> + if (!EFI_ERROR (Status) && BadBufferSize) {
> + return EFI_BAD_BUFFER_SIZE;
> + } else {
> + return Status;
> + }
> +}
> +
> +/**
> + Writes specified number of bytes from the input buffer to the block.
> +
> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
> + @param[in] Lba The starting logical block index to write to
> + @param[in] BlockOffset Offset into the block at which to begin writing
> + @param[in] NumBytes Pointer that on input contains the total size of
> + the buffer. On output, it contains the total number
> + of bytes actually written
> + @param[in] Buffer Pointer to a caller allocated buffer that contains
> + the source for the write
> + @retval EFI_SUCCESS The firmware volume was written successfully
> + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
> + NumBytes contains the total number of bytes
> + actually written
> + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
> + could not be written
> + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
> +
> +**/
> +EFI_STATUS
> +FvbWriteBlock (
> + IN EFI_FVB_INSTANCE *FvbInstance,
> + IN EFI_LBA Lba,
> + IN UINTN BlockOffset,
> + IN OUT UINTN *NumBytes,
> + IN UINT8 *Buffer
> + )
> +{
> + EFI_FVB_ATTRIBUTES_2 Attributes;
> + UINTN LbaAddress;
> + UINTN LbaLength;
> + EFI_STATUS Status;
> + BOOLEAN BadBufferSize = FALSE;
> +
> + if ((NumBytes == NULL) || (Buffer == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> + if (*NumBytes == 0) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
> + if (EFI_ERROR(Status)) {
> + return Status;
> + }
> +
> + //
> + // Check if the FV is write enabled
> + //
> + Attributes = FvbGetVolumeAttributes (FvbInstance);
> + if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
> + return EFI_ACCESS_DENIED;
> + }
> +
> + //
> + // Perform boundary checks and adjust NumBytes
> + //
> + if (BlockOffset > LbaLength) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if (LbaLength < (*NumBytes + BlockOffset)) {
> + DEBUG ((DEBUG_INFO,
> + "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
> + *NumBytes,
> + (UINT32)(LbaLength - BlockOffset))
> + );
> + *NumBytes = (UINT32) (LbaLength - BlockOffset);
> + BadBufferSize = TRUE;
> + }
> +
> + Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + Status = SpiFlashLock ();
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), *NumBytes);
> +
> + if (!EFI_ERROR (Status) && BadBufferSize) {
> + return EFI_BAD_BUFFER_SIZE;
> + } else {
> + return Status;
> + }
> +}
> +
> +
> +
> +/**
> + Erases and initializes a firmware volume block.
> +
> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
> + @param[in] Lba The logical block index to be erased
> +
> + @retval EFI_SUCCESS The erase request was successfully completed
> + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
> + could not be written. Firmware device may have been
> + partially erased
> + @retval EFI_INVALID_PARAMETER Instance not found
> +
> +**/
> +EFI_STATUS
> +FvbEraseBlock (
> + IN EFI_FVB_INSTANCE *FvbInstance,
> + IN EFI_LBA Lba
> + )
> +{
> +
> + EFI_FVB_ATTRIBUTES_2 Attributes;
> + UINTN LbaAddress;
> + UINTN LbaLength;
> + EFI_STATUS Status;
> +
> + //
> + // Check if the FV is write enabled
> + //
> + Attributes = FvbGetVolumeAttributes (FvbInstance);
> +
> + if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
> + return EFI_ACCESS_DENIED;
> + }
> +
> + //
> + // Get the starting address of the block for erase.
> + //
> + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
> + if (EFI_ERROR(Status)) {
> + return Status;
> + }
> +
> + Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + Status = SpiFlashLock ();
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
> +
> + return Status;
> +}
> +
> +/**
> + Modifies the current settings of the firmware volume according to the
> + input parameter, and returns the new setting of the volume
> +
> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
> + @param[in] Attributes On input, it is a pointer to EFI_FVB_ATTRIBUTES_2
> + containing the desired firmware volume settings.
> + On successful return, it contains the new settings
> + of the firmware volume
> +
> + @retval EFI_SUCCESS Successfully returns
> + @retval EFI_ACCESS_DENIED The volume setting is locked and cannot be modified
> + @retval EFI_INVALID_PARAMETER Instance not found, or The attributes requested are
> + in conflict with the capabilities as declared in the
> + firmware volume header
> +
> +**/
> +EFI_STATUS
> +FvbSetVolumeAttributes (
> + IN EFI_FVB_INSTANCE *FvbInstance,
> + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> + )
> +{
> + EFI_FVB_ATTRIBUTES_2 OldAttributes;
> + EFI_FVB_ATTRIBUTES_2 *AttribPtr;
> + EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
> + UINT32 Capabilities;
> + UINT32 OldStatus, NewStatus;
> +
> + AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attributes);
> + OldAttributes = *AttribPtr;
> + Capabilities = OldAttributes & EFI_FVB2_CAPABILITIES;
> + OldStatus = OldAttributes & EFI_FVB2_STATUS;
> + NewStatus = *Attributes & EFI_FVB2_STATUS;
> +
> + UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP | \
> + EFI_FVB2_READ_ENABLED_CAP | \
> + EFI_FVB2_WRITE_DISABLED_CAP | \
> + EFI_FVB2_WRITE_ENABLED_CAP | \
> + EFI_FVB2_LOCK_CAP | \
> + EFI_FVB2_STICKY_WRITE | \
> + EFI_FVB2_MEMORY_MAPPED | \
> + EFI_FVB2_ERASE_POLARITY | \
> + EFI_FVB2_READ_LOCK_CAP | \
> + EFI_FVB2_WRITE_LOCK_CAP | \
> + EFI_FVB2_ALIGNMENT;
> +
> + //
> + // Some attributes of FV is read only can *not* be set
> + //
> + if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAttributes)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // If firmware volume is locked, no status bit can be updated
> + //
> + if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
> + if ( OldStatus ^ NewStatus ) {
> + return EFI_ACCESS_DENIED;
> + }
> + }
> +
> + //
> + // Test read disable
> + //
> + if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
> + if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + //
> + // Test read enable
> + //
> + if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
> + if (NewStatus & EFI_FVB2_READ_STATUS) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + //
> + // Test write disable
> + //
> + if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
> + if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + //
> + // Test write enable
> + //
> + if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
> + if (NewStatus & EFI_FVB2_WRITE_STATUS) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + //
> + // Test lock
> + //
> + if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
> + if (NewStatus & EFI_FVB2_LOCK_STATUS) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + *AttribPtr = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
> + *AttribPtr = (*AttribPtr) | NewStatus;
> + *Attributes = *AttribPtr;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Check the integrity of firmware volume header
> +
> + @param[in] FvHeader A pointer to a firmware volume header
> +
> + @retval TRUE The firmware volume is consistent
> + @retval FALSE The firmware volume has corrupted.
> +
> +**/
> +BOOLEAN
> +IsFvHeaderValid (
> + IN EFI_PHYSICAL_ADDRESS FvBase,
> + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
> + )
> +{
> + if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
> + if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
> + return FALSE;
> + }
> + } else {
> + if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
> + return FALSE;
> + }
> + }
> + if ( (FvHeader->Revision != EFI_FVH_REVISION) ||
> + (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
> + (FvHeader->FvLength == ((UINTN) -1)) ||
> + ((FvHeader->HeaderLength & 0x01 ) !=0) ) {
> + return FALSE;
> + }
> +
> + if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != 0) {
> + return FALSE;
> + }
> +
> + return TRUE;
> +}
> +
> +//
> +// FVB protocol APIs
> +//
> +
> +/**
> + Retrieves the physical address of the device.
> +
> + @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
> + @param[out] Address Output buffer containing the address.
> +
> + retval EFI_SUCCESS The function always return successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolGetPhysicalAddress (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + OUT EFI_PHYSICAL_ADDRESS *Address
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> +
> + *Address = FvbInstance->FvBase;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Retrieve the size of a logical block
> +
> + @param[in] This Calling context
> + @param[in] Lba Indicates which block to return the size for.
> + @param[out] BlockSize A pointer to a caller allocated UINTN in which
> + the size of the block is returned
> + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
> + number of consecutive blocks starting with Lba is
> + returned. All blocks in this range have a size of
> + BlockSize
> +
> + @retval EFI_SUCCESS The function always return successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolGetBlockSize (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN EFI_LBA Lba,
> + OUT UINTN *BlockSize,
> + OUT UINTN *NumOfBlocks
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> +
> + DEBUG((DEBUG_INFO,
> + "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x%x\n",
> + Lba,
> + BlockSize,
> + NumOfBlocks)
> + );
> +
> + return FvbGetLbaAddress (
> + FvbInstance,
> + Lba,
> + NULL,
> + BlockSize,
> + NumOfBlocks
> + );
> +}
> +
> +/**
> + Retrieves Volume attributes. No polarity translations are done.
> +
> + @param[in] This Calling context
> + @param[out] Attributes Output buffer which contains attributes
> +
> + @retval EFI_SUCCESS The function always return successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolGetAttributes (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> +
> + *Attributes = FvbGetVolumeAttributes (FvbInstance);
> +
> + DEBUG ((DEBUG_INFO,
> + "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
> + This,
> + *Attributes)
> + );
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Sets Volume attributes. No polarity translations are done.
> +
> + @param[in] This Calling context
> + @param[out] Attributes Output buffer which contains attributes
> +
> + @retval EFI_SUCCESS The function always return successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolSetAttributes (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> + )
> +{
> + EFI_STATUS Status;
> + EFI_FVB_INSTANCE *FvbInstance;
> +
> + DEBUG((DEBUG_INFO,
> + "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n",
> + This,
> + *Attributes)
> + );
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> +
> + Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
> +
> + DEBUG((DEBUG_INFO,
> + "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n",
> + This,
> + *Attributes)
> + );
> +
> + return Status;
> +}
> +
> +/**
> + The EraseBlock() function erases one or more blocks as denoted by the
> + variable argument list. The entire parameter list of blocks must be verified
> + prior to erasing any blocks. If a block is requested that does not exist
> + within the associated firmware volume (it has a larger index than the last
> + block of the firmware volume), the EraseBlock() function must return
> + EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
> +
> + @param[in] This Calling context
> + @param[in] ... Starting LBA followed by Number of Lba to erase.
> + a -1 to terminate the list.
> +
> + @retval EFI_SUCCESS The erase request was successfully completed
> + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
> + could not be written. Firmware device may have been
> + partially erased
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolEraseBlocks (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + ...
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> + UINTN NumOfBlocks;
> + VA_LIST Args;
> + EFI_LBA StartingLba;
> + UINTN NumOfLba;
> + EFI_STATUS Status;
> +
> + DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> +
> + NumOfBlocks = FvbInstance->NumOfBlocks;
> +
> + VA_START (Args, This);
> +
> + do {
> + StartingLba = VA_ARG (Args, EFI_LBA);
> + if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
> + break;
> + }
> +
> + NumOfLba = VA_ARG (Args, UINT32);
> +
> + //
> + // Check input parameters
> + //
> + if (NumOfLba == 0) {
> + VA_END (Args);
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
> + return EFI_INVALID_PARAMETER;
> + }
> + } while ( 1 );
> +
> + VA_END (Args);
> +
> + VA_START (Args, This);
> + do {
> + StartingLba = VA_ARG (Args, EFI_LBA);
> + if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
> + break;
> + }
> +
> + NumOfLba = VA_ARG (Args, UINT32);
> +
> + while ( NumOfLba > 0 ) {
> + Status = FvbEraseBlock (FvbInstance, StartingLba);
> + if ( EFI_ERROR(Status)) {
> + VA_END (Args);
> + return Status;
> + }
> + StartingLba ++;
> + NumOfLba --;
> + }
> +
> + } while ( 1 );
> +
> + VA_END (Args);
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Writes data beginning at Lba:Offset from FV. The write terminates either
> + when *NumBytes of data have been written, or when a block boundary is
> + reached. *NumBytes is updated to reflect the actual number of bytes
> + written. The write opertion does not include erase. This routine will
> + attempt to write only the specified bytes. If the writes do not stick,
> + it will return an error.
> +
> + @param[in] This Calling context
> + @param[in] Lba Block in which to begin write
> + @param[in] Offset Offset in the block at which to begin write
> + @param[in,out] NumBytes On input, indicates the requested write size. On
> + output, indicates the actual number of bytes written
> + @param[in] Buffer Buffer containing source data for the write.
> +
> + @retval EFI_SUCCESS The firmware volume was written successfully
> + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
> + NumBytes contains the total number of bytes
> + actually written
> + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
> + could not be written
> + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolWrite (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN EFI_LBA Lba,
> + IN UINTN Offset,
> + IN OUT UINTN *NumBytes,
> + IN UINT8 *Buffer
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> +
> + DEBUG((DEBUG_INFO,
> + "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
> + Lba,
> + Offset,
> + *NumBytes,
> + Buffer)
> + );
> +
> + return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
> +}
> +
> +/**
> + Reads data beginning at Lba:Offset from FV. The Read terminates either
> + when *NumBytes of data have been read, or when a block boundary is
> + reached. *NumBytes is updated to reflect the actual number of bytes
> + written. The write opertion does not include erase. This routine will
> + attempt to write only the specified bytes. If the writes do not stick,
> + it will return an error.
> +
> + @param[in] This Calling context
> + @param[in] Lba Block in which to begin write
> + @param[in] Offset Offset in the block at which to begin write
> + @param[in,out] NumBytes On input, indicates the requested write size. On
> + output, indicates the actual number of bytes written
> + @param[in] Buffer Buffer containing source data for the write.
> +
> + @retval EFI_SUCCESS The firmware volume was read successfully and
> + contents are in Buffer
> + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
> + NumBytes contains the total number of bytes returned
> + in Buffer
> + @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
> + could not be read
> + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolRead (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN EFI_LBA Lba,
> + IN UINTN Offset,
> + IN OUT UINTN *NumBytes,
> + OUT UINT8 *Buffer
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> + EFI_STATUS Status;
> +
> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> + Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
> + DEBUG((DEBUG_INFO,
> + "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
> + Lba,
> + Offset,
> + *NumBytes,
> + Buffer)
> + );
> +
> + return Status;
> +}
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
> new file mode 100644
> index 000000000000..42a0828c6fae
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
> @@ -0,0 +1,271 @@
> +/** @file
> + MM driver source for several Serial Flash devices
> + which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
> +
> + Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) Microsoft Corporation.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SpiFvbServiceCommon.h"
> +#include <Library/MmServicesTableLib.h>
> +#include <Library/UefiDriverEntryPoint.h>
> +#include <Protocol/SmmFirmwareVolumeBlock.h>
> +
> +/**
> + The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
> + for each FV in the system.
> +
> + @param[in] FvbInstance The pointer to a FW volume instance structure,
> + which contains the information about one FV.
> +
> + @retval VOID
> +
> +**/
> +VOID
> +InstallFvbProtocol (
> + IN EFI_FVB_INSTANCE *FvbInstance
> + )
> +{
> + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
> + EFI_STATUS Status;
> + EFI_HANDLE FvbHandle;
> +
> + ASSERT (FvbInstance != NULL);
> + if (FvbInstance == NULL) {
> + return;
> + }
> +
> + CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
> +
> + FvHeader = &FvbInstance->FvHeader;
> + if (FvHeader == NULL) {
> + return;
> + }
> +
> + //
> + // Set up the devicepath
> + //
> + DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\n", FvbInstance->FvBase));
> + if (FvHeader->ExtHeaderOffset == 0) {
> + //
> + // FV does not contains extension header, then produce MEMMAP_DEVICE_PATH
> + //
> + FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof
> (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
> + if (FvbInstance->DevicePath == NULL) {
> + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMAP_DEVICE_PATH failed\n"));
> + return;
> + }
> + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.StartingAddress = FvbInstance->FvBase;
> + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.EndingAddress = FvbInstance->FvBase +
> FvHeader->FvLength - 1;
> + } else {
> + FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH),
> &mFvPIWGDevicePathTemplate);
> + if (FvbInstance->DevicePath == NULL) {
> + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PIWG_DEVICE_PATH failed\n"));
> + return;
> + }
> + CopyGuid (
> + &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName,
> + (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
> + );
> + }
> +
> + //
> + // LocateDevicePath fails so install a new interface and device path
> + //
> + FvbHandle = NULL;
> +
> + Status = gMmst->MmInstallProtocolInterface (
> + &FvbHandle,
> + &gEfiSmmFirmwareVolumeBlockProtocolGuid,
> + EFI_NATIVE_INTERFACE,
> + &(FvbInstance->FvbProtocol)
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = gMmst->MmInstallProtocolInterface (
> + &FvbHandle,
> + &gEfiDevicePathProtocolGuid,
> + EFI_NATIVE_INTERFACE,
> + &(FvbInstance->DevicePath)
> + );
> + ASSERT_EFI_ERROR (Status);
> +}
> +
> +/**
> + The function does the necessary initialization work for
> + Firmware Volume Block Driver.
> +
> +**/
> +VOID
> +FvbInitialize (
> + VOID
> + )
> +{
> + EFI_FVB_INSTANCE *FvbInstance;
> + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
> + EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
> + EFI_PHYSICAL_ADDRESS BaseAddress;
> + EFI_STATUS Status;
> + UINTN BufferSize;
> + UINTN Idx;
> + UINT32 MaxLbaSize;
> + UINT32 BytesWritten;
> + UINTN BytesErased;
> +
> + mPlatformFvBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
> + mPlatformFvBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
> + mPlatformFvBaseAddress[1].FvBase = PcdGet32(PcdFlashMicrocodeFvBase);
> + mPlatformFvBaseAddress[1].FvSize = PcdGet32(PcdFlashMicrocodeFvSize);
> + mPlatformDefaultBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
> + mPlatformDefaultBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
> + mPlatformDefaultBaseAddress[1].FvBase = PcdGet32(PcdFlashMicrocodeFvBase);
> + mPlatformDefaultBaseAddress[1].FvSize = PcdGet32(PcdFlashMicrocodeFvSize);
> +
> + //
> + // We will only continue with FVB installation if the
> + // SPI is the active BIOS state
> + //
> + {
> + //
> + // Make sure all FVB are valid and/or fix if possible
> + //
> + for (Idx = 0;; Idx++) {
> + if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
> + break;
> + }
> +
> + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
> + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
> +
> + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
> + BytesWritten = 0;
> + BytesErased = 0;
> + DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
> + Status = GetFvbInfo (BaseAddress, &FvHeader);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x. GetFvbInfo Status %r\n", BaseAddress, Status));
> + continue;
> + }
> + DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\n", BaseAddress));
> + //
> + // Spi erase
> + //
> + BytesErased = (UINTN) FvHeader->BlockMap->Length;
> + Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", Status));
> + continue;
> + }
> + if (BytesErased != FvHeader->BlockMap->Length) {
> + DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader->BlockMap->Length\n"));
> + DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n", BytesErased, FvHeader->BlockMap->Length));
> + continue;
> + }
> + BytesWritten = FvHeader->HeaderLength;
> + Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT8*)FvHeader);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status));
> + continue;
> + }
> + if (BytesWritten != FvHeader->HeaderLength) {
> + DEBUG ((DEBUG_WARN, "ERROR - BytesWritten != HeaderLength\n"));
> + DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength = 0x%X\n", BytesWritten, FvHeader->HeaderLength));
> + continue;
> + }
> + Status = SpiFlashLock ();
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status));
> + continue;
> + }
> + DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n", BaseAddress));
> + //
> + // Clear cache for this range.
> + //
> + WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, FvHeader->BlockMap->Length);
> + }
> + }
> +
> + //
> + // Calculate the total size for all firmware volume block instances
> + //
> + BufferSize = 0;
> + for (Idx = 0; ; Idx++) {
> + if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
> + break;
> + }
> + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
> + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
> +
> + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
> + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
> + continue;
> + }
> +
> + BufferSize += (FvHeader->HeaderLength +
> + sizeof (EFI_FVB_INSTANCE) -
> + sizeof (EFI_FIRMWARE_VOLUME_HEADER)
> + );
> + }
> +
> + mFvbModuleGlobal.FvbInstance = (EFI_FVB_INSTANCE *) AllocateRuntimeZeroPool (BufferSize);
> + if (mFvbModuleGlobal.FvbInstance == NULL) {
> + ASSERT (FALSE);
> + return;
> + }
> +
> + MaxLbaSize = 0;
> + FvbInstance = mFvbModuleGlobal.FvbInstance;
> + mFvbModuleGlobal.NumFv = 0;
> +
> + for (Idx = 0; ; Idx++) {
> + if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
> + break;
> + }
> + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
> + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
> +
> + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
> + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
> + continue;
> + }
> +
> + FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
> + CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength);
> +
> + FvHeader = &(FvbInstance->FvHeader);
> + FvbInstance->FvBase = (UINTN)BaseAddress;
> +
> + //
> + // Process the block map for each FV
> + //
> + FvbInstance->NumOfBlocks = 0;
> + for (PtrBlockMapEntry = FvHeader->BlockMap;
> + PtrBlockMapEntry->NumBlocks != 0;
> + PtrBlockMapEntry++) {
> + //
> + // Get the maximum size of a block.
> + //
> + if (MaxLbaSize < PtrBlockMapEntry->Length) {
> + MaxLbaSize = PtrBlockMapEntry->Length;
> + }
> + FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
> + }
> +
> + //
> + // Add a FVB Protocol Instance
> + //
> + InstallFvbProtocol (FvbInstance);
> + mFvbModuleGlobal.NumFv++;
> +
> + //
> + // Move on to the next FvbInstance
> + //
> + FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) +
> + FvHeader->HeaderLength +
> + (sizeof (EFI_FVB_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
> +
> + }
> + }
> +}
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
> new file mode 100644
> index 000000000000..252c818d6551
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
> @@ -0,0 +1,32 @@
> +/** @file
> + MM driver source for several Serial Flash devices
> + which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
> +
> + Copyright (c) Microsoft Corporation.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SpiFvbServiceCommon.h"
> +#include "SpiFvbServiceMm.h"
> +
> +/**
> + The driver Standalone MM entry point.
> +
> + @param[in] ImageHandle Image handle of this driver.
> + @param[in] MmSystemTable A pointer to the MM system table.
> +
> + @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +SpiFvbStandaloneMmInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_MM_SYSTEM_TABLE *MmSystemTable
> + )
> +{
> + FvbInitialize ();
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
> new file mode 100644
> index 000000000000..1c2dac70e3c6
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
> @@ -0,0 +1,32 @@
> +/** @file
> + MM driver source for several Serial Flash devices
> + which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
> +
> + Copyright (c) Microsoft Corporation.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SpiFvbServiceCommon.h"
> +#include "SpiFvbServiceMm.h"
> +
> +/**
> + The driver Traditional MM entry point.
> +
> + @param[in] ImageHandle Image handle of this driver.
> + @param[in] SystemTable A pointer to the EFI system table.
> +
> + @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +SpiFvbTraditionalMmInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + FvbInitialize ();
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
> new file mode 100644
> index 000000000000..e9d69e985814
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
> @@ -0,0 +1,158 @@
> +/** @file
> + Common source definitions used in serial flash drivers
> +
> +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef _SPI_FVB_SERVICE_COMMON_H
> +#define _SPI_FVB_SERVICE_COMMON_H
> +
> +#include <Guid/EventGroup.h>
> +#include <Guid/FirmwareFileSystem2.h>
> +#include <Guid/SystemNvDataGuid.h>
> +#include <Protocol/DevicePath.h>
> +#include <Protocol/FirmwareVolumeBlock.h>
> +
> +#include <Library/BaseLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/CacheMaintenanceLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/HobLib.h>
> +
> +#include <Library/SpiFlashCommonLib.h>
> +
> +//
> +// Define two helper macro to extract the Capability field or Status field in FVB
> +// bit fields
> +//
> +#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
> + EFI_FVB2_READ_ENABLED_CAP | \
> + EFI_FVB2_WRITE_DISABLED_CAP | \
> + EFI_FVB2_WRITE_ENABLED_CAP | \
> + EFI_FVB2_LOCK_CAP \
> + )
> +
> +#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
> +
> +#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
> +
> +typedef struct {
> + UINT32 Signature;
> + UINTN FvBase;
> + UINTN NumOfBlocks;
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
> + EFI_FIRMWARE_VOLUME_HEADER FvHeader;
> +} EFI_FVB_INSTANCE;
> +
> +typedef struct {
> + EFI_FVB_INSTANCE *FvbInstance;
> + UINT32 NumFv;
> +} FVB_GLOBAL;
> +
> +//
> +// Fvb Protocol instance data
> +//
> +#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, FVB_INSTANCE_SIGNATURE)
> +
> +typedef struct {
> + MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
> + EFI_DEVICE_PATH_PROTOCOL EndDevPath;
> +} FV_PIWG_DEVICE_PATH;
> +
> +typedef struct {
> + MEMMAP_DEVICE_PATH MemMapDevPath;
> + EFI_DEVICE_PATH_PROTOCOL EndDevPath;
> +} FV_MEMMAP_DEVICE_PATH;
> +
> +typedef struct {
> + UINT32 FvBase;
> + UINT32 FvSize;
> +} FV_INFO;
> +
> +//
> +// Protocol APIs
> +//
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolGetAttributes (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolSetAttributes (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolGetPhysicalAddress (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + OUT EFI_PHYSICAL_ADDRESS *Address
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolGetBlockSize (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN EFI_LBA Lba,
> + OUT UINTN *BlockSize,
> + OUT UINTN *NumOfBlocks
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolRead (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN EFI_LBA Lba,
> + IN UINTN Offset,
> + IN OUT UINTN *NumBytes,
> + OUT UINT8 *Buffer
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolWrite (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + IN EFI_LBA Lba,
> + IN UINTN Offset,
> + IN OUT UINTN *NumBytes,
> + IN UINT8 *Buffer
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +FvbProtocolEraseBlocks (
> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> + ...
> + );
> +
> +BOOLEAN
> +IsFvHeaderValid (
> + IN EFI_PHYSICAL_ADDRESS FvBase,
> + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
> + );
> +
> +EFI_STATUS
> +GetFvbInfo (
> + IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
> + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
> + );
> +
> +extern FVB_GLOBAL mFvbModuleGlobal;
> +extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
> +extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
> +extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
> +extern FV_INFO mPlatformFvBaseAddress[];
> +extern FV_INFO mPlatformDefaultBaseAddress[];
> +
> +#endif
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
> new file mode 100644
> index 000000000000..36af1130c8ee
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
> @@ -0,0 +1,22 @@
> +/** @file
> + Definitions common to MM implementation in this driver.
> +
> + Copyright (c) Microsoft Corporation.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef _SPI_FVB_SERVICE_MM_H_
> +#define _SPI_FVB_SERVICE_MM_H_
> +
> +/**
> + The function does the necessary initialization work for
> + Firmware Volume Block Driver.
> +
> +**/
> +VOID
> +FvbInitialize (
> + VOID
> + );
> +
> +#endif
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> new file mode 100644
> index 000000000000..bf1306f00201
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> @@ -0,0 +1,68 @@
> +### @file
> +# Component description file for the Serial Flash device Runtime driver.
> +#
> +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) Microsoft Corporation.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +###
> +
> +[Defines]
> + INF_VERSION = 0x00010017
> + BASE_NAME = SpiFvbServiceSmm
> + FILE_GUID = 68A10D85-6858-4402-B070-028B3EA21747
> + VERSION_STRING = 1.0
> + MODULE_TYPE = DXE_SMM_DRIVER
> + PI_SPECIFICATION_VERSION = 1.10
> + ENTRY_POINT = SpiFvbTraditionalMmInitialize
> +
> +#
> +# The following information is for reference only and not required by the build tools.
> +#
> +# VALID_ARCHITECTURES = IA32 X64
> +#
> +
> +[LibraryClasses]
> + PcdLib
> + MemoryAllocationLib
> + CacheMaintenanceLib
> + BaseMemoryLib
> + DebugLib
> + BaseLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> + SpiFlashCommonLib
> + MmServicesTableLib
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + IntelSiliconPkg/IntelSiliconPkg.dec
> +
> +[Pcd]
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
> +
> +[Sources]
> + FvbInfo.c
> + SpiFvbServiceCommon.h
> + SpiFvbServiceCommon.c
> + SpiFvbServiceMm.h
> + SpiFvbServiceMm.c
> + SpiFvbServiceTraditionalMm.c
> +
> +[Protocols]
> + gEfiDevicePathProtocolGuid ## PRODUCES
> + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
> +
> +[Guids]
> + gEfiFirmwareFileSystem2Guid ## CONSUMES
> + gEfiSystemNvDataFvGuid ## CONSUMES
> +
> +[Depex]
> + TRUE
> diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
> new file mode 100644
> index 000000000000..b66233968247
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
> @@ -0,0 +1,67 @@
> +### @file
> +# Component description file for the Serial Flash device Standalone MM driver.
> +#
> +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) Microsoft Corporation.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +###
> +
> +[Defines]
> + INF_VERSION = 0x0001001B
> + BASE_NAME = SpiFvbServiceStandaloneMm
> + FILE_GUID = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
> + VERSION_STRING = 1.0
> + MODULE_TYPE = MM_STANDALONE
> + PI_SPECIFICATION_VERSION = 0x00010032
> + ENTRY_POINT = SpiFvbStandaloneMmInitialize
> +
> +#
> +# The following information is for reference only and not required by the build tools.
> +#
> +# VALID_ARCHITECTURES = IA32 X64
> +#
> +
> +[LibraryClasses]
> + BaseLib
> + BaseMemoryLib
> + CacheMaintenanceLib
> + DebugLib
> + MemoryAllocationLib
> + PcdLib
> + MmServicesTableLib
> + SpiFlashCommonLib
> + StandaloneMmDriverEntryPoint
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + IntelSiliconPkg/IntelSiliconPkg.dec
> +
> +[Pcd]
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
> +
> +[Sources]
> + FvbInfo.c
> + SpiFvbServiceCommon.h
> + SpiFvbServiceCommon.c
> + SpiFvbServiceMm.h
> + SpiFvbServiceMm.c
> + SpiFvbServiceStandaloneMm.c
> +
> +[Protocols]
> + gEfiDevicePathProtocolGuid ## PRODUCES
> + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
> +
> +[Guids]
> + gEfiFirmwareFileSystem2Guid ## CONSUMES
> + gEfiSystemNvDataFvGuid ## CONSUMES
> +
> +[Depex]
> + TRUE
> diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> index 7eb9c9def60a..7e446c97a5fb 100644
> --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> @@ -40,6 +40,9 @@ [LibraryClasses]
> PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignmentLib/PeiGetVtdPmrAlignmentLib.inf
> TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
> MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
> + SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
> + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
> + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
>
> [LibraryClasses.common.PEIM]
> PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
> @@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER]
>
> [LibraryClasses.common.DXE_SMM_DRIVER]
> MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
> + MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf
> SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
>
> +[LibraryClasses.common.MM_STANDALONE]
> +
> MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf
> + MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
> + StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
> +
> ###################################################################################################
> #
> # Components Section - list of the modules and components that will be processed by compilation
> @@ -86,6 +95,8 @@ [Components]
> IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
> IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.inf
> IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/SamplePlatformDevicePolicyDxe.inf
> + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
> IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
> IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf
> IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
> --
> 2.28.0.windows.1
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services
2021-04-16 11:17 ` Ni, Ray
@ 2021-04-20 3:00 ` Guo Dong
2021-04-21 18:52 ` [edk2-devel] " Michael Kubacki
0 siblings, 1 reply; 44+ messages in thread
From: Guo Dong @ 2021-04-20 3:00 UTC (permalink / raw)
To: Ni, Ray, mikuback@linux.microsoft.com, devel@edk2.groups.io
Cc: Chaganty, Rangasai V
Hi Ray,
This patch is about FVB module change. It is not related with SPI since it depends on SPI library.
The SPI hardware sequence could be used in SPI library.
I reviewed this patch, I think it is OK to replace the one used in existing platform FVB driver.
Thanks,
Guo
> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Friday, April 16, 2021 4:18 AM
> To: mikuback@linux.microsoft.com; devel@edk2.groups.io; Dong, Guo
> <guo.dong@intel.com>
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Subject: RE: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI
> FVB services
>
> Guo,
> I remember you mentioned to me there is a standard way to manipulate the
> flash storage because there is a HW between the SW and the real flash that
> does the command translation.
> Is this change related to the standard way what you mentioned to me?
> If yes, can you please help to review and provide comments?
>
> Michael,
> Having a universal implementation for SPI access is wonderful! Can you
> please share the documentation that explain the Intel Serial Flash Interface
> Compatibility spec?
>
> > -----Original Message-----
> > From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> > Sent: Friday, April 16, 2021 10:31 AM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> > Subject: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI
> FVB services
> >
> > From: Michael Kubacki <michael.kubacki@microsoft.com>
> >
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
> >
> > Adds a Traditional MM and Standalone MM SPI FVB Service driver to
> > IntelSiliconPkg. These drivers produce the firmware volume block
> > protocol for SPI flash devices compliant with the Intel Serial
> > Flash Interface Compatibility Specification.
> >
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> > Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> > ---
> > Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> | 94 ++
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom
> mon.c | 903 ++++++++++++++++++++
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.
> c | 271 ++++++
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStan
> daloneMm.c | 32 +
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTradi
> tionalMm.c | 32 +
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom
> mon.h | 158 ++++
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.
> h | 22 +
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm
> .inf | 68 ++
> >
> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStan
> daloneMm.inf | 67 ++
> > Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 11 +
> > 10 files changed, 1658 insertions(+)
> >
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> > b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> > new file mode 100644
> > index 000000000000..7f2678fa9e5a
> > --- /dev/null
> > +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
> > @@ -0,0 +1,94 @@
> > +/**@file
> > + Defines data structure that is the volume header found.
> > + These data is intent to decouple FVB driver with FV header.
> > +
> > +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> > +SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include "SpiFvbServiceCommon.h"
> > +
> > +#define FIRMWARE_BLOCK_SIZE 0x10000
> > +#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
> > +
> > +#define NV_STORAGE_BASE_ADDRESS
> FixedPcdGet32(PcdFlashNvStorageVariableBase)
> > +#define SYSTEM_NV_BLOCK_NUM
> ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+
> > FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) +
> FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/
> > FVB_MEDIA_BLOCK_SIZE)
> > +
> > +typedef struct {
> > + EFI_PHYSICAL_ADDRESS BaseAddress;
> > + EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
> > + EFI_FV_BLOCK_MAP_ENTRY End[1];
> > +} EFI_FVB2_MEDIA_INFO;
> > +
> > +//
> > +// This data structure contains a template of all correct FV headers, which
> is used to restore
> > +// Fv header if it's corrupted.
> > +//
> > +EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
> > + //
> > + // Systen NvStorage FVB
> > + //
> > + {
> > + NV_STORAGE_BASE_ADDRESS,
> > + {
> > + {0,}, //ZeroVector[16]
> > + EFI_SYSTEM_NV_DATA_FV_GUID,
> > + FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
> > + EFI_FVH_SIGNATURE,
> > + 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for
> details on EFI_FVB_ATTRIBUTES_2
> > + sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof
> (EFI_FV_BLOCK_MAP_ENTRY),
> > + 0, //CheckSum which will be calucated dynamically.
> > + 0, //ExtHeaderOffset
> > + {0,}, //Reserved[1]
> > + 2, //Revision
> > + {
> > + {
> > + SYSTEM_NV_BLOCK_NUM,
> > + FVB_MEDIA_BLOCK_SIZE,
> > + }
> > + }
> > + },
> > + {
> > + {
> > + 0,
> > + 0
> > + }
> > + }
> > + }
> > +};
> > +
> > +EFI_STATUS
> > +GetFvbInfo (
> > + IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
> > + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
> > + )
> > +{
> > + UINTN Index;
> > + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
> > +
> > + for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof
> (EFI_FVB2_MEDIA_INFO); Index++) {
> > + if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
> > + FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
> > +
> > + //
> > + // Update the checksum value of FV header.
> > + //
> > + FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader,
> FvHeader->HeaderLength);
> > +
> > + *FvbInfo = FvHeader;
> > +
> > + DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
> > + DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
> > + DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)-
> >HeaderLength));
> > + DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)-
> >Checksum));
> > + DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n",
> (*FvbInfo)->BlockMap[0].NumBlocks));
> > + DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n",
> (*FvbInfo)->BlockMap[0].Length));
> > + DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n",
> (*FvbInfo)->BlockMap[1].NumBlocks));
> > + DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n",
> (*FvbInfo)->BlockMap[1].Length));
> > +
> > + return EFI_SUCCESS;
> > + }
> > + }
> > + return EFI_NOT_FOUND;
> > +}
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
> mmon.c
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
> mmon.c
> > new file mode 100644
> > index 000000000000..dab818e98087
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
> mmon.c
> > @@ -0,0 +1,903 @@
> > +/** @file
> > + Common driver source for several Serial Flash devices
> > + which are compliant with the Intel(R) Serial Flash Interface Compatibility
> Specification.
> > +
> > +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> > +SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include "SpiFvbServiceCommon.h"
> > +
> > +//
> > +// Global variable for this FVB driver which contains
> > +// the private data of all firmware volume block instances
> > +//
> > +FVB_GLOBAL mFvbModuleGlobal;
> > +
> > +//
> > +// This platform driver knows there are multiple FVs on FD.
> > +// Now we only provide FVs on Variable region and MicorCode region for
> performance issue.
> > +//
> > +FV_INFO mPlatformFvBaseAddress[] = {
> > + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase),
> FixedPcdGet32(PcdFlashNvStorageVariableSize)},
> > + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase),
> FixedPcdGet32(PcdFlashMicrocodeFvSize)},
> > + {0, 0}
> > +};
> > +
> > +FV_INFO mPlatformDefaultBaseAddress[] = {
> > + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase),
> FixedPcdGet32(PcdFlashNvStorageVariableSize)},
> > + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase),
> FixedPcdGet32(PcdFlashMicrocodeFvSize)},
> > + {0, 0}
> > +};
> > +
> > +FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
> > + {
> > + {
> > + HARDWARE_DEVICE_PATH,
> > + HW_MEMMAP_DP,
> > + {
> > + (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
> > + (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
> > + }
> > + },
> > + EfiMemoryMappedIO,
> > + (EFI_PHYSICAL_ADDRESS) 0,
> > + (EFI_PHYSICAL_ADDRESS) 0,
> > + },
> > + {
> > + END_DEVICE_PATH_TYPE,
> > + END_ENTIRE_DEVICE_PATH_SUBTYPE,
> > + {
> > + END_DEVICE_PATH_LENGTH,
> > + 0
> > + }
> > + }
> > +};
> > +
> > +FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
> > + {
> > + {
> > + MEDIA_DEVICE_PATH,
> > + MEDIA_PIWG_FW_VOL_DP,
> > + {
> > + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
> > + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
> > + }
> > + },
> > + { 0 }
> > + },
> > + {
> > + END_DEVICE_PATH_TYPE,
> > + END_ENTIRE_DEVICE_PATH_SUBTYPE,
> > + {
> > + END_DEVICE_PATH_LENGTH,
> > + 0
> > + }
> > + }
> > +};
> > +
> > +//
> > +// Template structure used when installing FVB protocol
> > +//
> > +EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
> > + FvbProtocolGetAttributes,
> > + FvbProtocolSetAttributes,
> > + FvbProtocolGetPhysicalAddress,
> > + FvbProtocolGetBlockSize,
> > + FvbProtocolRead,
> > + FvbProtocolWrite,
> > + FvbProtocolEraseBlocks,
> > + NULL
> > +};
> > +
> > +/**
> > + Get the EFI_FVB_ATTRIBUTES_2 of a FV.
> > +
> > + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
> > +
> > + @return Attributes of the FV identified by FvbInstance.
> > +
> > +**/
> > +EFI_FVB_ATTRIBUTES_2
> > +FvbGetVolumeAttributes (
> > + IN EFI_FVB_INSTANCE *FvbInstance
> > + )
> > +{
> > + return FvbInstance->FvHeader.Attributes;
> > +}
> > +
> > +/**
> > + Retrieves the starting address of an LBA in an FV. It also
> > + return a few other attribut of the FV.
> > +
> > + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
> > + @param[in] Lba The logical block address
> > + @param[out] LbaAddress On output, contains the physical starting
> address
> > + of the Lba
> > + @param[out] LbaLength On output, contains the length of the block
> > + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in
> which the
> > + number of consecutive blocks starting with Lba is
> > + returned. All blocks in this range have a size of
> > + BlockSize
> > +
> > + @retval EFI_SUCCESS Successfully returns
> > + @retval EFI_INVALID_PARAMETER Instance not found
> > +
> > +**/
> > +EFI_STATUS
> > +FvbGetLbaAddress (
> > + IN EFI_FVB_INSTANCE *FvbInstance,
> > + IN EFI_LBA Lba,
> > + OUT UINTN *LbaAddress,
> > + OUT UINTN *LbaLength,
> > + OUT UINTN *NumOfBlocks
> > + )
> > +{
> > + UINT32 NumBlocks;
> > + UINT32 BlockLength;
> > + UINTN Offset;
> > + EFI_LBA StartLba;
> > + EFI_LBA NextLba;
> > + EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
> > +
> > + StartLba = 0;
> > + Offset = 0;
> > + BlockMap = &(FvbInstance->FvHeader.BlockMap[0]);
> > +
> > + //
> > + // Parse the blockmap of the FV to find which map entry the Lba belongs
> to
> > + //
> > + while (TRUE) {
> > + NumBlocks = BlockMap->NumBlocks;
> > + BlockLength = BlockMap->Length;
> > +
> > + if ( NumBlocks == 0 || BlockLength == 0) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + NextLba = StartLba + NumBlocks;
> > +
> > + //
> > + // The map entry found
> > + //
> > + if (Lba >= StartLba && Lba < NextLba) {
> > + Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
> > + if (LbaAddress ) {
> > + *LbaAddress = FvbInstance->FvBase + Offset;
> > + }
> > +
> > + if (LbaLength ) {
> > + *LbaLength = BlockLength;
> > + }
> > +
> > + if (NumOfBlocks ) {
> > + *NumOfBlocks = (UINTN)(NextLba - Lba);
> > + }
> > + return EFI_SUCCESS;
> > + }
> > +
> > + StartLba = NextLba;
> > + Offset = Offset + NumBlocks * BlockLength;
> > + BlockMap++;
> > + }
> > +}
> > +
> > +/**
> > + Reads specified number of bytes into a buffer from the specified block.
> > +
> > + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
> > + @param[in] Lba The logical block address to be read from
> > + @param[in] BlockOffset Offset into the block at which to begin
> reading
> > + @param[in] NumBytes Pointer that on input contains the total
> size of
> > + the buffer. On output, it contains the total number
> > + of bytes read
> > + @param[in] Buffer Pointer to a caller allocated buffer that will
> be
> > + used to hold the data read
> > +
> > +
> > + @retval EFI_SUCCESS The firmware volume was read
> successfully and
> > + contents are in Buffer
> > + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA
> boundary. On output,
> > + NumBytes contains the total number of bytes
> returned
> > + in Buffer
> > + @retval EFI_ACCESS_DENIED The firmware volume is in the
> ReadDisabled state
> > + @retval EFI_DEVICE_ERROR The block device is not functioning
> correctly and
> > + could not be read
> > + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,
> Buffer are NULL
> > +
> > +**/
> > +EFI_STATUS
> > +FvbReadBlock (
> > + IN EFI_FVB_INSTANCE *FvbInstance,
> > + IN EFI_LBA Lba,
> > + IN UINTN BlockOffset,
> > + IN OUT UINTN *NumBytes,
> > + IN UINT8 *Buffer
> > + )
> > +{
> > + EFI_FVB_ATTRIBUTES_2 Attributes;
> > + UINTN LbaAddress;
> > + UINTN LbaLength;
> > + EFI_STATUS Status;
> > + BOOLEAN BadBufferSize = FALSE;
> > +
> > + if ((NumBytes == NULL) || (Buffer == NULL)) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + if (*NumBytes == 0) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress,
> &LbaLength, NULL);
> > + if (EFI_ERROR(Status)) {
> > + return Status;
> > + }
> > +
> > + Attributes = FvbGetVolumeAttributes (FvbInstance);
> > +
> > + if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
> > + return EFI_ACCESS_DENIED;
> > + }
> > +
> > + if (BlockOffset > LbaLength) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + if (LbaLength < (*NumBytes + BlockOffset)) {
> > + DEBUG ((DEBUG_INFO,
> > + "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
> > + *NumBytes,
> > + (UINT32)(LbaLength - BlockOffset))
> > + );
> > + *NumBytes = (UINT32) (LbaLength - BlockOffset);
> > + BadBufferSize = TRUE;
> > + }
> > +
> > + Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes,
> Buffer);
> > +
> > + if (!EFI_ERROR (Status) && BadBufferSize) {
> > + return EFI_BAD_BUFFER_SIZE;
> > + } else {
> > + return Status;
> > + }
> > +}
> > +
> > +/**
> > + Writes specified number of bytes from the input buffer to the block.
> > +
> > + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
> > + @param[in] Lba The starting logical block index to write to
> > + @param[in] BlockOffset Offset into the block at which to begin
> writing
> > + @param[in] NumBytes Pointer that on input contains the total
> size of
> > + the buffer. On output, it contains the total number
> > + of bytes actually written
> > + @param[in] Buffer Pointer to a caller allocated buffer that
> contains
> > + the source for the write
> > + @retval EFI_SUCCESS The firmware volume was written
> successfully
> > + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA
> boundary. On output,
> > + NumBytes contains the total number of bytes
> > + actually written
> > + @retval EFI_ACCESS_DENIED The firmware volume is in the
> WriteDisabled state
> > + @retval EFI_DEVICE_ERROR The block device is not functioning
> correctly and
> > + could not be written
> > + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,
> Buffer are NULL
> > +
> > +**/
> > +EFI_STATUS
> > +FvbWriteBlock (
> > + IN EFI_FVB_INSTANCE *FvbInstance,
> > + IN EFI_LBA Lba,
> > + IN UINTN BlockOffset,
> > + IN OUT UINTN *NumBytes,
> > + IN UINT8 *Buffer
> > + )
> > +{
> > + EFI_FVB_ATTRIBUTES_2 Attributes;
> > + UINTN LbaAddress;
> > + UINTN LbaLength;
> > + EFI_STATUS Status;
> > + BOOLEAN BadBufferSize = FALSE;
> > +
> > + if ((NumBytes == NULL) || (Buffer == NULL)) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + if (*NumBytes == 0) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress,
> &LbaLength, NULL);
> > + if (EFI_ERROR(Status)) {
> > + return Status;
> > + }
> > +
> > + //
> > + // Check if the FV is write enabled
> > + //
> > + Attributes = FvbGetVolumeAttributes (FvbInstance);
> > + if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
> > + return EFI_ACCESS_DENIED;
> > + }
> > +
> > + //
> > + // Perform boundary checks and adjust NumBytes
> > + //
> > + if (BlockOffset > LbaLength) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + if (LbaLength < (*NumBytes + BlockOffset)) {
> > + DEBUG ((DEBUG_INFO,
> > + "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
> > + *NumBytes,
> > + (UINT32)(LbaLength - BlockOffset))
> > + );
> > + *NumBytes = (UINT32) (LbaLength - BlockOffset);
> > + BadBufferSize = TRUE;
> > + }
> > +
> > + Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes,
> Buffer);
> > + if (EFI_ERROR (Status)) {
> > + return Status;
> > + }
> > +
> > + Status = SpiFlashLock ();
> > + if (EFI_ERROR (Status)) {
> > + return Status;
> > + }
> > +
> > + WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress +
> BlockOffset), *NumBytes);
> > +
> > + if (!EFI_ERROR (Status) && BadBufferSize) {
> > + return EFI_BAD_BUFFER_SIZE;
> > + } else {
> > + return Status;
> > + }
> > +}
> > +
> > +
> > +
> > +/**
> > + Erases and initializes a firmware volume block.
> > +
> > + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
> > + @param[in] Lba The logical block index to be erased
> > +
> > + @retval EFI_SUCCESS The erase request was successfully
> completed
> > + @retval EFI_ACCESS_DENIED The firmware volume is in the
> WriteDisabled state
> > + @retval EFI_DEVICE_ERROR The block device is not functioning
> correctly and
> > + could not be written. Firmware device may have been
> > + partially erased
> > + @retval EFI_INVALID_PARAMETER Instance not found
> > +
> > +**/
> > +EFI_STATUS
> > +FvbEraseBlock (
> > + IN EFI_FVB_INSTANCE *FvbInstance,
> > + IN EFI_LBA Lba
> > + )
> > +{
> > +
> > + EFI_FVB_ATTRIBUTES_2 Attributes;
> > + UINTN LbaAddress;
> > + UINTN LbaLength;
> > + EFI_STATUS Status;
> > +
> > + //
> > + // Check if the FV is write enabled
> > + //
> > + Attributes = FvbGetVolumeAttributes (FvbInstance);
> > +
> > + if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
> > + return EFI_ACCESS_DENIED;
> > + }
> > +
> > + //
> > + // Get the starting address of the block for erase.
> > + //
> > + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress,
> &LbaLength, NULL);
> > + if (EFI_ERROR(Status)) {
> > + return Status;
> > + }
> > +
> > + Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
> > + if (EFI_ERROR (Status)) {
> > + return Status;
> > + }
> > +
> > + Status = SpiFlashLock ();
> > + if (EFI_ERROR (Status)) {
> > + return Status;
> > + }
> > +
> > + WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
> > +
> > + return Status;
> > +}
> > +
> > +/**
> > + Modifies the current settings of the firmware volume according to the
> > + input parameter, and returns the new setting of the volume
> > +
> > + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
> > + @param[in] Attributes On input, it is a pointer to
> EFI_FVB_ATTRIBUTES_2
> > + containing the desired firmware volume settings.
> > + On successful return, it contains the new settings
> > + of the firmware volume
> > +
> > + @retval EFI_SUCCESS Successfully returns
> > + @retval EFI_ACCESS_DENIED The volume setting is locked and
> cannot be modified
> > + @retval EFI_INVALID_PARAMETER Instance not found, or The
> attributes requested are
> > + in conflict with the capabilities as declared in the
> > + firmware volume header
> > +
> > +**/
> > +EFI_STATUS
> > +FvbSetVolumeAttributes (
> > + IN EFI_FVB_INSTANCE *FvbInstance,
> > + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> > + )
> > +{
> > + EFI_FVB_ATTRIBUTES_2 OldAttributes;
> > + EFI_FVB_ATTRIBUTES_2 *AttribPtr;
> > + EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
> > + UINT32 Capabilities;
> > + UINT32 OldStatus, NewStatus;
> > +
> > + AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance-
> >FvHeader.Attributes);
> > + OldAttributes = *AttribPtr;
> > + Capabilities = OldAttributes & EFI_FVB2_CAPABILITIES;
> > + OldStatus = OldAttributes & EFI_FVB2_STATUS;
> > + NewStatus = *Attributes & EFI_FVB2_STATUS;
> > +
> > + UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP | \
> > + EFI_FVB2_READ_ENABLED_CAP | \
> > + EFI_FVB2_WRITE_DISABLED_CAP | \
> > + EFI_FVB2_WRITE_ENABLED_CAP | \
> > + EFI_FVB2_LOCK_CAP | \
> > + EFI_FVB2_STICKY_WRITE | \
> > + EFI_FVB2_MEMORY_MAPPED | \
> > + EFI_FVB2_ERASE_POLARITY | \
> > + EFI_FVB2_READ_LOCK_CAP | \
> > + EFI_FVB2_WRITE_LOCK_CAP | \
> > + EFI_FVB2_ALIGNMENT;
> > +
> > + //
> > + // Some attributes of FV is read only can *not* be set
> > + //
> > + if ((OldAttributes & UnchangedAttributes) ^ (*Attributes &
> UnchangedAttributes)) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + //
> > + // If firmware volume is locked, no status bit can be updated
> > + //
> > + if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
> > + if ( OldStatus ^ NewStatus ) {
> > + return EFI_ACCESS_DENIED;
> > + }
> > + }
> > +
> > + //
> > + // Test read disable
> > + //
> > + if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
> > + if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + }
> > +
> > + //
> > + // Test read enable
> > + //
> > + if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
> > + if (NewStatus & EFI_FVB2_READ_STATUS) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + }
> > +
> > + //
> > + // Test write disable
> > + //
> > + if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
> > + if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + }
> > +
> > + //
> > + // Test write enable
> > + //
> > + if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
> > + if (NewStatus & EFI_FVB2_WRITE_STATUS) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + }
> > +
> > + //
> > + // Test lock
> > + //
> > + if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
> > + if (NewStatus & EFI_FVB2_LOCK_STATUS) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + }
> > +
> > + *AttribPtr = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
> > + *AttribPtr = (*AttribPtr) | NewStatus;
> > + *Attributes = *AttribPtr;
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +/**
> > + Check the integrity of firmware volume header
> > +
> > + @param[in] FvHeader A pointer to a firmware volume header
> > +
> > + @retval TRUE The firmware volume is consistent
> > + @retval FALSE The firmware volume has corrupted.
> > +
> > +**/
> > +BOOLEAN
> > +IsFvHeaderValid (
> > + IN EFI_PHYSICAL_ADDRESS FvBase,
> > + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
> > + )
> > +{
> > + if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
> > + if (CompareMem (&FvHeader->FileSystemGuid,
> &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
> > + return FALSE;
> > + }
> > + } else {
> > + if (CompareMem (&FvHeader->FileSystemGuid,
> &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
> > + return FALSE;
> > + }
> > + }
> > + if ( (FvHeader->Revision != EFI_FVH_REVISION) ||
> > + (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
> > + (FvHeader->FvLength == ((UINTN) -1)) ||
> > + ((FvHeader->HeaderLength & 0x01 ) !=0) ) {
> > + return FALSE;
> > + }
> > +
> > + if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader-
> >HeaderLength) != 0) {
> > + return FALSE;
> > + }
> > +
> > + return TRUE;
> > +}
> > +
> > +//
> > +// FVB protocol APIs
> > +//
> > +
> > +/**
> > + Retrieves the physical address of the device.
> > +
> > + @param[in] This A pointer to
> EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
> > + @param[out] Address Output buffer containing the address.
> > +
> > + retval EFI_SUCCESS The function always return successfully.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolGetPhysicalAddress (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + OUT EFI_PHYSICAL_ADDRESS *Address
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > +
> > + *Address = FvbInstance->FvBase;
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +/**
> > + Retrieve the size of a logical block
> > +
> > + @param[in] This Calling context
> > + @param[in] Lba Indicates which block to return the size for.
> > + @param[out] BlockSize A pointer to a caller allocated UINTN in which
> > + the size of the block is returned
> > + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which
> the
> > + number of consecutive blocks starting with Lba is
> > + returned. All blocks in this range have a size of
> > + BlockSize
> > +
> > + @retval EFI_SUCCESS The function always return successfully.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolGetBlockSize (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN EFI_LBA Lba,
> > + OUT UINTN *BlockSize,
> > + OUT UINTN *NumOfBlocks
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > +
> > + DEBUG((DEBUG_INFO,
> > + "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks:
> 0x%x\n",
> > + Lba,
> > + BlockSize,
> > + NumOfBlocks)
> > + );
> > +
> > + return FvbGetLbaAddress (
> > + FvbInstance,
> > + Lba,
> > + NULL,
> > + BlockSize,
> > + NumOfBlocks
> > + );
> > +}
> > +
> > +/**
> > + Retrieves Volume attributes. No polarity translations are done.
> > +
> > + @param[in] This Calling context
> > + @param[out] Attributes Output buffer which contains attributes
> > +
> > + @retval EFI_SUCCESS The function always return successfully.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolGetAttributes (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > +
> > + *Attributes = FvbGetVolumeAttributes (FvbInstance);
> > +
> > + DEBUG ((DEBUG_INFO,
> > + "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
> > + This,
> > + *Attributes)
> > + );
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +/**
> > + Sets Volume attributes. No polarity translations are done.
> > +
> > + @param[in] This Calling context
> > + @param[out] Attributes Output buffer which contains attributes
> > +
> > + @retval EFI_SUCCESS The function always return successfully.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolSetAttributes (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> > + )
> > +{
> > + EFI_STATUS Status;
> > + EFI_FVB_INSTANCE *FvbInstance;
> > +
> > + DEBUG((DEBUG_INFO,
> > + "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n",
> > + This,
> > + *Attributes)
> > + );
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > +
> > + Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
> > +
> > + DEBUG((DEBUG_INFO,
> > + "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n",
> > + This,
> > + *Attributes)
> > + );
> > +
> > + return Status;
> > +}
> > +
> > +/**
> > + The EraseBlock() function erases one or more blocks as denoted by the
> > + variable argument list. The entire parameter list of blocks must be
> verified
> > + prior to erasing any blocks. If a block is requested that does not exist
> > + within the associated firmware volume (it has a larger index than the last
> > + block of the firmware volume), the EraseBlock() function must return
> > + EFI_INVALID_PARAMETER without modifying the contents of the
> firmware volume.
> > +
> > + @param[in] This Calling context
> > + @param[in] ... Starting LBA followed by Number of Lba to erase.
> > + a -1 to terminate the list.
> > +
> > + @retval EFI_SUCCESS The erase request was successfully completed
> > + @retval EFI_ACCESS_DENIED The firmware volume is in the
> WriteDisabled state
> > + @retval EFI_DEVICE_ERROR The block device is not functioning correctly
> and
> > + could not be written. Firmware device may have been
> > + partially erased
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolEraseBlocks (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + ...
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > + UINTN NumOfBlocks;
> > + VA_LIST Args;
> > + EFI_LBA StartingLba;
> > + UINTN NumOfLba;
> > + EFI_STATUS Status;
> > +
> > + DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > +
> > + NumOfBlocks = FvbInstance->NumOfBlocks;
> > +
> > + VA_START (Args, This);
> > +
> > + do {
> > + StartingLba = VA_ARG (Args, EFI_LBA);
> > + if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
> > + break;
> > + }
> > +
> > + NumOfLba = VA_ARG (Args, UINT32);
> > +
> > + //
> > + // Check input parameters
> > + //
> > + if (NumOfLba == 0) {
> > + VA_END (Args);
> > + return EFI_INVALID_PARAMETER;
> > + }
> > +
> > + if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
> > + return EFI_INVALID_PARAMETER;
> > + }
> > + } while ( 1 );
> > +
> > + VA_END (Args);
> > +
> > + VA_START (Args, This);
> > + do {
> > + StartingLba = VA_ARG (Args, EFI_LBA);
> > + if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
> > + break;
> > + }
> > +
> > + NumOfLba = VA_ARG (Args, UINT32);
> > +
> > + while ( NumOfLba > 0 ) {
> > + Status = FvbEraseBlock (FvbInstance, StartingLba);
> > + if ( EFI_ERROR(Status)) {
> > + VA_END (Args);
> > + return Status;
> > + }
> > + StartingLba ++;
> > + NumOfLba --;
> > + }
> > +
> > + } while ( 1 );
> > +
> > + VA_END (Args);
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +/**
> > + Writes data beginning at Lba:Offset from FV. The write terminates either
> > + when *NumBytes of data have been written, or when a block boundary
> is
> > + reached. *NumBytes is updated to reflect the actual number of bytes
> > + written. The write opertion does not include erase. This routine will
> > + attempt to write only the specified bytes. If the writes do not stick,
> > + it will return an error.
> > +
> > + @param[in] This Calling context
> > + @param[in] Lba Block in which to begin write
> > + @param[in] Offset Offset in the block at which to begin write
> > + @param[in,out] NumBytes On input, indicates the requested write size.
> On
> > + output, indicates the actual number of bytes written
> > + @param[in] Buffer Buffer containing source data for the write.
> > +
> > + @retval EFI_SUCCESS The firmware volume was written successfully
> > + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary.
> On output,
> > + NumBytes contains the total number of bytes
> > + actually written
> > + @retval EFI_ACCESS_DENIED The firmware volume is in the
> WriteDisabled state
> > + @retval EFI_DEVICE_ERROR The block device is not functioning
> correctly and
> > + could not be written
> > + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolWrite (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN EFI_LBA Lba,
> > + IN UINTN Offset,
> > + IN OUT UINTN *NumBytes,
> > + IN UINT8 *Buffer
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > +
> > + DEBUG((DEBUG_INFO,
> > + "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer:
> 0x%x\n",
> > + Lba,
> > + Offset,
> > + *NumBytes,
> > + Buffer)
> > + );
> > +
> > + return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
> > +}
> > +
> > +/**
> > + Reads data beginning at Lba:Offset from FV. The Read terminates either
> > + when *NumBytes of data have been read, or when a block boundary is
> > + reached. *NumBytes is updated to reflect the actual number of bytes
> > + written. The write opertion does not include erase. This routine will
> > + attempt to write only the specified bytes. If the writes do not stick,
> > + it will return an error.
> > +
> > + @param[in] This Calling context
> > + @param[in] Lba Block in which to begin write
> > + @param[in] Offset Offset in the block at which to begin write
> > + @param[in,out] NumBytes On input, indicates the requested write size.
> On
> > + output, indicates the actual number of bytes written
> > + @param[in] Buffer Buffer containing source data for the write.
> > +
> > + @retval EFI_SUCCESS The firmware volume was read successfully
> and
> > + contents are in Buffer
> > + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary.
> On output,
> > + NumBytes contains the total number of bytes returned
> > + in Buffer
> > + @retval EFI_ACCESS_DENIED The firmware volume is in the
> ReadDisabled state
> > + @retval EFI_DEVICE_ERROR The block device is not functioning
> correctly and
> > + could not be read
> > + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolRead (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN EFI_LBA Lba,
> > + IN UINTN Offset,
> > + IN OUT UINTN *NumBytes,
> > + OUT UINT8 *Buffer
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > + EFI_STATUS Status;
> > +
> > + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
> > + Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
> > + DEBUG((DEBUG_INFO,
> > + "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer:
> 0x%x\n",
> > + Lba,
> > + Offset,
> > + *NumBytes,
> > + Buffer)
> > + );
> > +
> > + return Status;
> > +}
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
> m.c
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
> m.c
> > new file mode 100644
> > index 000000000000..42a0828c6fae
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
> m.c
> > @@ -0,0 +1,271 @@
> > +/** @file
> > + MM driver source for several Serial Flash devices
> > + which are compliant with the Intel(R) Serial Flash Interface Compatibility
> Specification.
> > +
> > + Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> > + Copyright (c) Microsoft Corporation.<BR>
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include "SpiFvbServiceCommon.h"
> > +#include <Library/MmServicesTableLib.h>
> > +#include <Library/UefiDriverEntryPoint.h>
> > +#include <Protocol/SmmFirmwareVolumeBlock.h>
> > +
> > +/**
> > + The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
> > + for each FV in the system.
> > +
> > + @param[in] FvbInstance The pointer to a FW volume instance structure,
> > + which contains the information about one FV.
> > +
> > + @retval VOID
> > +
> > +**/
> > +VOID
> > +InstallFvbProtocol (
> > + IN EFI_FVB_INSTANCE *FvbInstance
> > + )
> > +{
> > + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
> > + EFI_STATUS Status;
> > + EFI_HANDLE FvbHandle;
> > +
> > + ASSERT (FvbInstance != NULL);
> > + if (FvbInstance == NULL) {
> > + return;
> > + }
> > +
> > + CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof
> (EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
> > +
> > + FvHeader = &FvbInstance->FvHeader;
> > + if (FvHeader == NULL) {
> > + return;
> > + }
> > +
> > + //
> > + // Set up the devicepath
> > + //
> > + DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for
> 0x%lx:\n", FvbInstance->FvBase));
> > + if (FvHeader->ExtHeaderOffset == 0) {
> > + //
> > + // FV does not contains extension header, then produce
> MEMMAP_DEVICE_PATH
> > + //
> > + FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)
> AllocateRuntimeCopyPool (sizeof
> > (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
> > + if (FvbInstance->DevicePath == NULL) {
> > + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for
> MEMMAP_DEVICE_PATH failed\n"));
> > + return;
> > + }
> > + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)-
> >MemMapDevPath.StartingAddress = FvbInstance->FvBase;
> > + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)-
> >MemMapDevPath.EndingAddress = FvbInstance->FvBase +
> > FvHeader->FvLength - 1;
> > + } else {
> > + FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)
> AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH),
> > &mFvPIWGDevicePathTemplate);
> > + if (FvbInstance->DevicePath == NULL) {
> > + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for
> FV_PIWG_DEVICE_PATH failed\n"));
> > + return;
> > + }
> > + CopyGuid (
> > + &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)-
> >FvDevPath.FvName,
> > + (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
> > + );
> > + }
> > +
> > + //
> > + // LocateDevicePath fails so install a new interface and device path
> > + //
> > + FvbHandle = NULL;
> > +
> > + Status = gMmst->MmInstallProtocolInterface (
> > + &FvbHandle,
> > + &gEfiSmmFirmwareVolumeBlockProtocolGuid,
> > + EFI_NATIVE_INTERFACE,
> > + &(FvbInstance->FvbProtocol)
> > + );
> > + ASSERT_EFI_ERROR (Status);
> > +
> > + Status = gMmst->MmInstallProtocolInterface (
> > + &FvbHandle,
> > + &gEfiDevicePathProtocolGuid,
> > + EFI_NATIVE_INTERFACE,
> > + &(FvbInstance->DevicePath)
> > + );
> > + ASSERT_EFI_ERROR (Status);
> > +}
> > +
> > +/**
> > + The function does the necessary initialization work for
> > + Firmware Volume Block Driver.
> > +
> > +**/
> > +VOID
> > +FvbInitialize (
> > + VOID
> > + )
> > +{
> > + EFI_FVB_INSTANCE *FvbInstance;
> > + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
> > + EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
> > + EFI_PHYSICAL_ADDRESS BaseAddress;
> > + EFI_STATUS Status;
> > + UINTN BufferSize;
> > + UINTN Idx;
> > + UINT32 MaxLbaSize;
> > + UINT32 BytesWritten;
> > + UINTN BytesErased;
> > +
> > + mPlatformFvBaseAddress[0].FvBase =
> PcdGet32(PcdFlashNvStorageVariableBase);
> > + mPlatformFvBaseAddress[0].FvSize =
> PcdGet32(PcdFlashNvStorageVariableSize);
> > + mPlatformFvBaseAddress[1].FvBase =
> PcdGet32(PcdFlashMicrocodeFvBase);
> > + mPlatformFvBaseAddress[1].FvSize =
> PcdGet32(PcdFlashMicrocodeFvSize);
> > + mPlatformDefaultBaseAddress[0].FvBase =
> PcdGet32(PcdFlashNvStorageVariableBase);
> > + mPlatformDefaultBaseAddress[0].FvSize =
> PcdGet32(PcdFlashNvStorageVariableSize);
> > + mPlatformDefaultBaseAddress[1].FvBase =
> PcdGet32(PcdFlashMicrocodeFvBase);
> > + mPlatformDefaultBaseAddress[1].FvSize =
> PcdGet32(PcdFlashMicrocodeFvSize);
> > +
> > + //
> > + // We will only continue with FVB installation if the
> > + // SPI is the active BIOS state
> > + //
> > + {
> > + //
> > + // Make sure all FVB are valid and/or fix if possible
> > + //
> > + for (Idx = 0;; Idx++) {
> > + if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
> mPlatformFvBaseAddress[Idx].FvBase == 0) {
> > + break;
> > + }
> > +
> > + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
> > + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)
> BaseAddress;
> > +
> > + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
> > + BytesWritten = 0;
> > + BytesErased = 0;
> > + DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n",
> FvHeader));
> > + Status = GetFvbInfo (BaseAddress, &FvHeader);
> > + if (EFI_ERROR (Status)) {
> > + DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x.
> GetFvbInfo Status %r\n", BaseAddress, Status));
> > + continue;
> > + }
> > + DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static
> data\n", BaseAddress));
> > + //
> > + // Spi erase
> > + //
> > + BytesErased = (UINTN) FvHeader->BlockMap->Length;
> > + Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
> > + if (EFI_ERROR (Status)) {
> > + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n",
> Status));
> > + continue;
> > + }
> > + if (BytesErased != FvHeader->BlockMap->Length) {
> > + DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader-
> >BlockMap->Length\n"));
> > + DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n",
> BytesErased, FvHeader->BlockMap->Length));
> > + continue;
> > + }
> > + BytesWritten = FvHeader->HeaderLength;
> > + Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten,
> (UINT8*)FvHeader);
> > + if (EFI_ERROR (Status)) {
> > + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n",
> Status));
> > + continue;
> > + }
> > + if (BytesWritten != FvHeader->HeaderLength) {
> > + DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=
> HeaderLength\n"));
> > + DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength =
> 0x%X\n", BytesWritten, FvHeader->HeaderLength));
> > + continue;
> > + }
> > + Status = SpiFlashLock ();
> > + if (EFI_ERROR (Status)) {
> > + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status));
> > + continue;
> > + }
> > + DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static
> data\n", BaseAddress));
> > + //
> > + // Clear cache for this range.
> > + //
> > + WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress,
> FvHeader->BlockMap->Length);
> > + }
> > + }
> > +
> > + //
> > + // Calculate the total size for all firmware volume block instances
> > + //
> > + BufferSize = 0;
> > + for (Idx = 0; ; Idx++) {
> > + if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
> mPlatformFvBaseAddress[Idx].FvBase == 0) {
> > + break;
> > + }
> > + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
> > + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)
> BaseAddress;
> > +
> > + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
> > + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n",
> FvHeader));
> > + continue;
> > + }
> > +
> > + BufferSize += (FvHeader->HeaderLength +
> > + sizeof (EFI_FVB_INSTANCE) -
> > + sizeof (EFI_FIRMWARE_VOLUME_HEADER)
> > + );
> > + }
> > +
> > + mFvbModuleGlobal.FvbInstance = (EFI_FVB_INSTANCE *)
> AllocateRuntimeZeroPool (BufferSize);
> > + if (mFvbModuleGlobal.FvbInstance == NULL) {
> > + ASSERT (FALSE);
> > + return;
> > + }
> > +
> > + MaxLbaSize = 0;
> > + FvbInstance = mFvbModuleGlobal.FvbInstance;
> > + mFvbModuleGlobal.NumFv = 0;
> > +
> > + for (Idx = 0; ; Idx++) {
> > + if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
> mPlatformFvBaseAddress[Idx].FvBase == 0) {
> > + break;
> > + }
> > + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
> > + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)
> BaseAddress;
> > +
> > + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
> > + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n",
> FvHeader));
> > + continue;
> > + }
> > +
> > + FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
> > + CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader-
> >HeaderLength);
> > +
> > + FvHeader = &(FvbInstance->FvHeader);
> > + FvbInstance->FvBase = (UINTN)BaseAddress;
> > +
> > + //
> > + // Process the block map for each FV
> > + //
> > + FvbInstance->NumOfBlocks = 0;
> > + for (PtrBlockMapEntry = FvHeader->BlockMap;
> > + PtrBlockMapEntry->NumBlocks != 0;
> > + PtrBlockMapEntry++) {
> > + //
> > + // Get the maximum size of a block.
> > + //
> > + if (MaxLbaSize < PtrBlockMapEntry->Length) {
> > + MaxLbaSize = PtrBlockMapEntry->Length;
> > + }
> > + FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
> > + }
> > +
> > + //
> > + // Add a FVB Protocol Instance
> > + //
> > + InstallFvbProtocol (FvbInstance);
> > + mFvbModuleGlobal.NumFv++;
> > +
> > + //
> > + // Move on to the next FvbInstance
> > + //
> > + FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance)
> +
> > + FvHeader->HeaderLength +
> > + (sizeof (EFI_FVB_INSTANCE) - sizeof
> (EFI_FIRMWARE_VOLUME_HEADER)));
> > +
> > + }
> > + }
> > +}
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
> ndaloneMm.c
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
> ndaloneMm.c
> > new file mode 100644
> > index 000000000000..252c818d6551
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
> ndaloneMm.c
> > @@ -0,0 +1,32 @@
> > +/** @file
> > + MM driver source for several Serial Flash devices
> > + which are compliant with the Intel(R) Serial Flash Interface Compatibility
> Specification.
> > +
> > + Copyright (c) Microsoft Corporation.<BR>
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include "SpiFvbServiceCommon.h"
> > +#include "SpiFvbServiceMm.h"
> > +
> > +/**
> > + The driver Standalone MM entry point.
> > +
> > + @param[in] ImageHandle Image handle of this driver.
> > + @param[in] MmSystemTable A pointer to the MM system table.
> > +
> > + @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +SpiFvbStandaloneMmInitialize (
> > + IN EFI_HANDLE ImageHandle,
> > + IN EFI_MM_SYSTEM_TABLE *MmSystemTable
> > + )
> > +{
> > + FvbInitialize ();
> > +
> > + return EFI_SUCCESS;
> > +}
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra
> ditionalMm.c
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra
> ditionalMm.c
> > new file mode 100644
> > index 000000000000..1c2dac70e3c6
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra
> ditionalMm.c
> > @@ -0,0 +1,32 @@
> > +/** @file
> > + MM driver source for several Serial Flash devices
> > + which are compliant with the Intel(R) Serial Flash Interface Compatibility
> Specification.
> > +
> > + Copyright (c) Microsoft Corporation.<BR>
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include "SpiFvbServiceCommon.h"
> > +#include "SpiFvbServiceMm.h"
> > +
> > +/**
> > + The driver Traditional MM entry point.
> > +
> > + @param[in] ImageHandle Image handle of this driver.
> > + @param[in] SystemTable A pointer to the EFI system table.
> > +
> > + @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +SpiFvbTraditionalMmInitialize (
> > + IN EFI_HANDLE ImageHandle,
> > + IN EFI_SYSTEM_TABLE *SystemTable
> > + )
> > +{
> > + FvbInitialize ();
> > +
> > + return EFI_SUCCESS;
> > +}
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
> mmon.h
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
> mmon.h
> > new file mode 100644
> > index 000000000000..e9d69e985814
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
> mmon.h
> > @@ -0,0 +1,158 @@
> > +/** @file
> > + Common source definitions used in serial flash drivers
> > +
> > +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> > +SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#ifndef _SPI_FVB_SERVICE_COMMON_H
> > +#define _SPI_FVB_SERVICE_COMMON_H
> > +
> > +#include <Guid/EventGroup.h>
> > +#include <Guid/FirmwareFileSystem2.h>
> > +#include <Guid/SystemNvDataGuid.h>
> > +#include <Protocol/DevicePath.h>
> > +#include <Protocol/FirmwareVolumeBlock.h>
> > +
> > +#include <Library/BaseLib.h>
> > +#include <Library/DebugLib.h>
> > +#include <Library/BaseMemoryLib.h>
> > +#include <Library/IoLib.h>
> > +#include <Library/CacheMaintenanceLib.h>
> > +#include <Library/MemoryAllocationLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <Library/DevicePathLib.h>
> > +#include <Library/HobLib.h>
> > +
> > +#include <Library/SpiFlashCommonLib.h>
> > +
> > +//
> > +// Define two helper macro to extract the Capability field or Status field in
> FVB
> > +// bit fields
> > +//
> > +#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
> > + EFI_FVB2_READ_ENABLED_CAP | \
> > + EFI_FVB2_WRITE_DISABLED_CAP | \
> > + EFI_FVB2_WRITE_ENABLED_CAP | \
> > + EFI_FVB2_LOCK_CAP \
> > + )
> > +
> > +#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS |
> EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
> > +
> > +#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
> > +
> > +typedef struct {
> > + UINT32 Signature;
> > + UINTN FvBase;
> > + UINTN NumOfBlocks;
> > + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> > + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
> > + EFI_FIRMWARE_VOLUME_HEADER FvHeader;
> > +} EFI_FVB_INSTANCE;
> > +
> > +typedef struct {
> > + EFI_FVB_INSTANCE *FvbInstance;
> > + UINT32 NumFv;
> > +} FVB_GLOBAL;
> > +
> > +//
> > +// Fvb Protocol instance data
> > +//
> > +#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE,
> FvbProtocol, FVB_INSTANCE_SIGNATURE)
> > +
> > +typedef struct {
> > + MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
> > + EFI_DEVICE_PATH_PROTOCOL EndDevPath;
> > +} FV_PIWG_DEVICE_PATH;
> > +
> > +typedef struct {
> > + MEMMAP_DEVICE_PATH MemMapDevPath;
> > + EFI_DEVICE_PATH_PROTOCOL EndDevPath;
> > +} FV_MEMMAP_DEVICE_PATH;
> > +
> > +typedef struct {
> > + UINT32 FvBase;
> > + UINT32 FvSize;
> > +} FV_INFO;
> > +
> > +//
> > +// Protocol APIs
> > +//
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolGetAttributes (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolSetAttributes (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolGetPhysicalAddress (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + OUT EFI_PHYSICAL_ADDRESS *Address
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolGetBlockSize (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN EFI_LBA Lba,
> > + OUT UINTN *BlockSize,
> > + OUT UINTN *NumOfBlocks
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolRead (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN EFI_LBA Lba,
> > + IN UINTN Offset,
> > + IN OUT UINTN *NumBytes,
> > + OUT UINT8 *Buffer
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolWrite (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + IN EFI_LBA Lba,
> > + IN UINTN Offset,
> > + IN OUT UINTN *NumBytes,
> > + IN UINT8 *Buffer
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +FvbProtocolEraseBlocks (
> > + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
> > + ...
> > + );
> > +
> > +BOOLEAN
> > +IsFvHeaderValid (
> > + IN EFI_PHYSICAL_ADDRESS FvBase,
> > + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
> > + );
> > +
> > +EFI_STATUS
> > +GetFvbInfo (
> > + IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
> > + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
> > + );
> > +
> > +extern FVB_GLOBAL mFvbModuleGlobal;
> > +extern FV_MEMMAP_DEVICE_PATH
> mFvMemmapDevicePathTemplate;
> > +extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
> > +extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL
> mFvbProtocolTemplate;
> > +extern FV_INFO mPlatformFvBaseAddress[];
> > +extern FV_INFO mPlatformDefaultBaseAddress[];
> > +
> > +#endif
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
> m.h
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
> m.h
> > new file mode 100644
> > index 000000000000..36af1130c8ee
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
> m.h
> > @@ -0,0 +1,22 @@
> > +/** @file
> > + Definitions common to MM implementation in this driver.
> > +
> > + Copyright (c) Microsoft Corporation.<BR>
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#ifndef _SPI_FVB_SERVICE_MM_H_
> > +#define _SPI_FVB_SERVICE_MM_H_
> > +
> > +/**
> > + The function does the necessary initialization work for
> > + Firmware Volume Block Driver.
> > +
> > +**/
> > +VOID
> > +FvbInitialize (
> > + VOID
> > + );
> > +
> > +#endif
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSm
> m.inf
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSm
> m.inf
> > new file mode 100644
> > index 000000000000..bf1306f00201
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSm
> m.inf
> > @@ -0,0 +1,68 @@
> > +### @file
> > +# Component description file for the Serial Flash device Runtime driver.
> > +#
> > +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
> > +# Copyright (c) Microsoft Corporation.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +###
> > +
> > +[Defines]
> > + INF_VERSION = 0x00010017
> > + BASE_NAME = SpiFvbServiceSmm
> > + FILE_GUID = 68A10D85-6858-4402-B070-028B3EA21747
> > + VERSION_STRING = 1.0
> > + MODULE_TYPE = DXE_SMM_DRIVER
> > + PI_SPECIFICATION_VERSION = 1.10
> > + ENTRY_POINT = SpiFvbTraditionalMmInitialize
> > +
> > +#
> > +# The following information is for reference only and not required by the
> build tools.
> > +#
> > +# VALID_ARCHITECTURES = IA32 X64
> > +#
> > +
> > +[LibraryClasses]
> > + PcdLib
> > + MemoryAllocationLib
> > + CacheMaintenanceLib
> > + BaseMemoryLib
> > + DebugLib
> > + BaseLib
> > + UefiBootServicesTableLib
> > + UefiDriverEntryPoint
> > + SpiFlashCommonLib
> > + MmServicesTableLib
> > +
> > +[Packages]
> > + MdePkg/MdePkg.dec
> > + MdeModulePkg/MdeModulePkg.dec
> > + IntelSiliconPkg/IntelSiliconPkg.dec
> > +
> > +[Pcd]
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
> ## CONSUMES
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ##
> CONSUMES
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
> ## CONSUMES
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
> ## CONSUMES
> > + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
> CONSUMES
> > + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
> CONSUMES
> > +
> > +[Sources]
> > + FvbInfo.c
> > + SpiFvbServiceCommon.h
> > + SpiFvbServiceCommon.c
> > + SpiFvbServiceMm.h
> > + SpiFvbServiceMm.c
> > + SpiFvbServiceTraditionalMm.c
> > +
> > +[Protocols]
> > + gEfiDevicePathProtocolGuid ## PRODUCES
> > + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
> > +
> > +[Guids]
> > + gEfiFirmwareFileSystem2Guid ## CONSUMES
> > + gEfiSystemNvDataFvGuid ## CONSUMES
> > +
> > +[Depex]
> > + TRUE
> > diff --git
> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
> ndaloneMm.inf
> >
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
> ndaloneMm.inf
> > new file mode 100644
> > index 000000000000..b66233968247
> > --- /dev/null
> > +++
> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
> ndaloneMm.inf
> > @@ -0,0 +1,67 @@
> > +### @file
> > +# Component description file for the Serial Flash device Standalone MM
> driver.
> > +#
> > +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
> > +# Copyright (c) Microsoft Corporation.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +###
> > +
> > +[Defines]
> > + INF_VERSION = 0x0001001B
> > + BASE_NAME = SpiFvbServiceStandaloneMm
> > + FILE_GUID = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
> > + VERSION_STRING = 1.0
> > + MODULE_TYPE = MM_STANDALONE
> > + PI_SPECIFICATION_VERSION = 0x00010032
> > + ENTRY_POINT = SpiFvbStandaloneMmInitialize
> > +
> > +#
> > +# The following information is for reference only and not required by the
> build tools.
> > +#
> > +# VALID_ARCHITECTURES = IA32 X64
> > +#
> > +
> > +[LibraryClasses]
> > + BaseLib
> > + BaseMemoryLib
> > + CacheMaintenanceLib
> > + DebugLib
> > + MemoryAllocationLib
> > + PcdLib
> > + MmServicesTableLib
> > + SpiFlashCommonLib
> > + StandaloneMmDriverEntryPoint
> > +
> > +[Packages]
> > + MdePkg/MdePkg.dec
> > + MdeModulePkg/MdeModulePkg.dec
> > + IntelSiliconPkg/IntelSiliconPkg.dec
> > +
> > +[Pcd]
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
> ## CONSUMES
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ##
> CONSUMES
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
> ## CONSUMES
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
> ## CONSUMES
> > + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
> CONSUMES
> > + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
> CONSUMES
> > +
> > +[Sources]
> > + FvbInfo.c
> > + SpiFvbServiceCommon.h
> > + SpiFvbServiceCommon.c
> > + SpiFvbServiceMm.h
> > + SpiFvbServiceMm.c
> > + SpiFvbServiceStandaloneMm.c
> > +
> > +[Protocols]
> > + gEfiDevicePathProtocolGuid ## PRODUCES
> > + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
> > +
> > +[Guids]
> > + gEfiFirmwareFileSystem2Guid ## CONSUMES
> > + gEfiSystemNvDataFvGuid ## CONSUMES
> > +
> > +[Depex]
> > + TRUE
> > diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> > index 7eb9c9def60a..7e446c97a5fb 100644
> > --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> > +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
> > @@ -40,6 +40,9 @@ [LibraryClasses]
> >
> PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignment
> Lib/PeiGetVtdPmrAlignmentLib.inf
> >
> TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/Tp
> mMeasurementLibNull.inf
> > MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
> > +
> SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlas
> hCommonLibNull.inf
> > +
> UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBo
> otServicesTableLib.inf
> > +
> UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry
> Point.inf
> >
> > [LibraryClasses.common.PEIM]
> > PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
> > @@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER]
> >
> > [LibraryClasses.common.DXE_SMM_DRIVER]
> >
> MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMe
> moryAllocationLib.inf
> > +
> MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTabl
> eLib.inf
> >
> SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesT
> ableLib.inf
> >
> > +[LibraryClasses.common.MM_STANDALONE]
> > +
> >
> MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAll
> ocationLib/StandaloneMmMemoryAllocationLib.inf
> > +
> MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/Stan
> daloneMmServicesTableLib.inf
> > +
> StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntry
> Point/StandaloneMmDriverEntryPoint.inf
> > +
> >
> ##########################################################
> #########################################
> > #
> > # Components Section - list of the modules and components that will be
> processed by compilation
> > @@ -86,6 +95,8 @@ [Components]
> > IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
> >
> IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDevi
> ceSecurityDxe.inf
> >
> IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/Sampl
> ePlatformDevicePolicyDxe.inf
> > + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> > +
> IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.in
> f
> > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
> > IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf
> > IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
> > --
> > 2.28.0.windows.1
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services
2021-04-20 3:00 ` Guo Dong
@ 2021-04-21 18:52 ` Michael Kubacki
0 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-21 18:52 UTC (permalink / raw)
To: devel, guo.dong, Ni, Ray; +Cc: Chaganty, Rangasai V
To add onto Guo's response, this series is mostly focused on refactoring
via code consolidation as I'm concerned with the driver that produces
the FVB protocol (SpiFvbServiceSmm via SmmSpiFlashCommonLib).
Fortunately, SmmSpiFlashCommonLib uses gPchSmmProtocolGuid as a SPI HW
abstraction and in this patch series that protocol now has a single
interface definition in IntelSiliconPkg.
Each silicon package still has a SPI driver that produces its instance
of gPchSmmSpiProtocolGuid (e.g.
CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf with most of the
implementation in a package-specific PchSpiCommonLib instance). There
might be some value in looking at those further but that level of
potential impact to functionality was not a goal for this change.
Thanks,
Michael
On 4/19/2021 8:00 PM, Guo Dong wrote:
>
> Hi Ray,
>
> This patch is about FVB module change. It is not related with SPI since it depends on SPI library.
> The SPI hardware sequence could be used in SPI library.
> I reviewed this patch, I think it is OK to replace the one used in existing platform FVB driver.
>
> Thanks,
> Guo
>
>> -----Original Message-----
>> From: Ni, Ray <ray.ni@intel.com>
>> Sent: Friday, April 16, 2021 4:18 AM
>> To: mikuback@linux.microsoft.com; devel@edk2.groups.io; Dong, Guo
>> <guo.dong@intel.com>
>> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
>> Subject: RE: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI
>> FVB services
>>
>> Guo,
>> I remember you mentioned to me there is a standard way to manipulate the
>> flash storage because there is a HW between the SW and the real flash that
>> does the command translation.
>> Is this change related to the standard way what you mentioned to me?
>> If yes, can you please help to review and provide comments?
>>
>> Michael,
>> Having a universal implementation for SPI access is wonderful! Can you
>> please share the documentation that explain the Intel Serial Flash Interface
>> Compatibility spec?
>>
>>> -----Original Message-----
>>> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
>>> Sent: Friday, April 16, 2021 10:31 AM
>>> To: devel@edk2.groups.io
>>> Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V
>> <rangasai.v.chaganty@intel.com>
>>> Subject: [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI
>> FVB services
>>>
>>> From: Michael Kubacki <michael.kubacki@microsoft.com>
>>>
>>> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>>>
>>> Adds a Traditional MM and Standalone MM SPI FVB Service driver to
>>> IntelSiliconPkg. These drivers produce the firmware volume block
>>> protocol for SPI flash devices compliant with the Intel Serial
>>> Flash Interface Compatibility Specification.
>>>
>>> Cc: Ray Ni <ray.ni@intel.com>
>>> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
>>> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
>>> ---
>>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
>> | 94 ++
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom
>> mon.c | 903 ++++++++++++++++++++
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.
>> c | 271 ++++++
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStan
>> daloneMm.c | 32 +
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTradi
>> tionalMm.c | 32 +
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom
>> mon.h | 158 ++++
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.
>> h | 22 +
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm
>> .inf | 68 ++
>>>
>> Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStan
>> daloneMm.inf | 67 ++
>>> Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 11 +
>>> 10 files changed, 1658 insertions(+)
>>>
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
>>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
>>> new file mode 100644
>>> index 000000000000..7f2678fa9e5a
>>> --- /dev/null
>>> +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
>>> @@ -0,0 +1,94 @@
>>> +/**@file
>>> + Defines data structure that is the volume header found.
>>> + These data is intent to decouple FVB driver with FV header.
>>> +
>>> +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>>> +SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#include "SpiFvbServiceCommon.h"
>>> +
>>> +#define FIRMWARE_BLOCK_SIZE 0x10000
>>> +#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
>>> +
>>> +#define NV_STORAGE_BASE_ADDRESS
>> FixedPcdGet32(PcdFlashNvStorageVariableBase)
>>> +#define SYSTEM_NV_BLOCK_NUM
>> ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+
>>> FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) +
>> FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/
>>> FVB_MEDIA_BLOCK_SIZE)
>>> +
>>> +typedef struct {
>>> + EFI_PHYSICAL_ADDRESS BaseAddress;
>>> + EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
>>> + EFI_FV_BLOCK_MAP_ENTRY End[1];
>>> +} EFI_FVB2_MEDIA_INFO;
>>> +
>>> +//
>>> +// This data structure contains a template of all correct FV headers, which
>> is used to restore
>>> +// Fv header if it's corrupted.
>>> +//
>>> +EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
>>> + //
>>> + // Systen NvStorage FVB
>>> + //
>>> + {
>>> + NV_STORAGE_BASE_ADDRESS,
>>> + {
>>> + {0,}, //ZeroVector[16]
>>> + EFI_SYSTEM_NV_DATA_FV_GUID,
>>> + FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
>>> + EFI_FVH_SIGNATURE,
>>> + 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for
>> details on EFI_FVB_ATTRIBUTES_2
>>> + sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof
>> (EFI_FV_BLOCK_MAP_ENTRY),
>>> + 0, //CheckSum which will be calucated dynamically.
>>> + 0, //ExtHeaderOffset
>>> + {0,}, //Reserved[1]
>>> + 2, //Revision
>>> + {
>>> + {
>>> + SYSTEM_NV_BLOCK_NUM,
>>> + FVB_MEDIA_BLOCK_SIZE,
>>> + }
>>> + }
>>> + },
>>> + {
>>> + {
>>> + 0,
>>> + 0
>>> + }
>>> + }
>>> + }
>>> +};
>>> +
>>> +EFI_STATUS
>>> +GetFvbInfo (
>>> + IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
>>> + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
>>> + )
>>> +{
>>> + UINTN Index;
>>> + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
>>> +
>>> + for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof
>> (EFI_FVB2_MEDIA_INFO); Index++) {
>>> + if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
>>> + FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
>>> +
>>> + //
>>> + // Update the checksum value of FV header.
>>> + //
>>> + FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader,
>> FvHeader->HeaderLength);
>>> +
>>> + *FvbInfo = FvHeader;
>>> +
>>> + DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
>>> + DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
>>> + DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)-
>>> HeaderLength));
>>> + DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)-
>>> Checksum));
>>> + DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n",
>> (*FvbInfo)->BlockMap[0].NumBlocks));
>>> + DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n",
>> (*FvbInfo)->BlockMap[0].Length));
>>> + DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n",
>> (*FvbInfo)->BlockMap[1].NumBlocks));
>>> + DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n",
>> (*FvbInfo)->BlockMap[1].Length));
>>> +
>>> + return EFI_SUCCESS;
>>> + }
>>> + }
>>> + return EFI_NOT_FOUND;
>>> +}
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
>> mmon.c
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
>> mmon.c
>>> new file mode 100644
>>> index 000000000000..dab818e98087
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
>> mmon.c
>>> @@ -0,0 +1,903 @@
>>> +/** @file
>>> + Common driver source for several Serial Flash devices
>>> + which are compliant with the Intel(R) Serial Flash Interface Compatibility
>> Specification.
>>> +
>>> +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>>> +SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#include "SpiFvbServiceCommon.h"
>>> +
>>> +//
>>> +// Global variable for this FVB driver which contains
>>> +// the private data of all firmware volume block instances
>>> +//
>>> +FVB_GLOBAL mFvbModuleGlobal;
>>> +
>>> +//
>>> +// This platform driver knows there are multiple FVs on FD.
>>> +// Now we only provide FVs on Variable region and MicorCode region for
>> performance issue.
>>> +//
>>> +FV_INFO mPlatformFvBaseAddress[] = {
>>> + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase),
>> FixedPcdGet32(PcdFlashNvStorageVariableSize)},
>>> + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase),
>> FixedPcdGet32(PcdFlashMicrocodeFvSize)},
>>> + {0, 0}
>>> +};
>>> +
>>> +FV_INFO mPlatformDefaultBaseAddress[] = {
>>> + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase),
>> FixedPcdGet32(PcdFlashNvStorageVariableSize)},
>>> + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase),
>> FixedPcdGet32(PcdFlashMicrocodeFvSize)},
>>> + {0, 0}
>>> +};
>>> +
>>> +FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
>>> + {
>>> + {
>>> + HARDWARE_DEVICE_PATH,
>>> + HW_MEMMAP_DP,
>>> + {
>>> + (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
>>> + (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
>>> + }
>>> + },
>>> + EfiMemoryMappedIO,
>>> + (EFI_PHYSICAL_ADDRESS) 0,
>>> + (EFI_PHYSICAL_ADDRESS) 0,
>>> + },
>>> + {
>>> + END_DEVICE_PATH_TYPE,
>>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>>> + {
>>> + END_DEVICE_PATH_LENGTH,
>>> + 0
>>> + }
>>> + }
>>> +};
>>> +
>>> +FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
>>> + {
>>> + {
>>> + MEDIA_DEVICE_PATH,
>>> + MEDIA_PIWG_FW_VOL_DP,
>>> + {
>>> + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
>>> + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
>>> + }
>>> + },
>>> + { 0 }
>>> + },
>>> + {
>>> + END_DEVICE_PATH_TYPE,
>>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>>> + {
>>> + END_DEVICE_PATH_LENGTH,
>>> + 0
>>> + }
>>> + }
>>> +};
>>> +
>>> +//
>>> +// Template structure used when installing FVB protocol
>>> +//
>>> +EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
>>> + FvbProtocolGetAttributes,
>>> + FvbProtocolSetAttributes,
>>> + FvbProtocolGetPhysicalAddress,
>>> + FvbProtocolGetBlockSize,
>>> + FvbProtocolRead,
>>> + FvbProtocolWrite,
>>> + FvbProtocolEraseBlocks,
>>> + NULL
>>> +};
>>> +
>>> +/**
>>> + Get the EFI_FVB_ATTRIBUTES_2 of a FV.
>>> +
>>> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
>>> +
>>> + @return Attributes of the FV identified by FvbInstance.
>>> +
>>> +**/
>>> +EFI_FVB_ATTRIBUTES_2
>>> +FvbGetVolumeAttributes (
>>> + IN EFI_FVB_INSTANCE *FvbInstance
>>> + )
>>> +{
>>> + return FvbInstance->FvHeader.Attributes;
>>> +}
>>> +
>>> +/**
>>> + Retrieves the starting address of an LBA in an FV. It also
>>> + return a few other attribut of the FV.
>>> +
>>> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
>>> + @param[in] Lba The logical block address
>>> + @param[out] LbaAddress On output, contains the physical starting
>> address
>>> + of the Lba
>>> + @param[out] LbaLength On output, contains the length of the block
>>> + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in
>> which the
>>> + number of consecutive blocks starting with Lba is
>>> + returned. All blocks in this range have a size of
>>> + BlockSize
>>> +
>>> + @retval EFI_SUCCESS Successfully returns
>>> + @retval EFI_INVALID_PARAMETER Instance not found
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +FvbGetLbaAddress (
>>> + IN EFI_FVB_INSTANCE *FvbInstance,
>>> + IN EFI_LBA Lba,
>>> + OUT UINTN *LbaAddress,
>>> + OUT UINTN *LbaLength,
>>> + OUT UINTN *NumOfBlocks
>>> + )
>>> +{
>>> + UINT32 NumBlocks;
>>> + UINT32 BlockLength;
>>> + UINTN Offset;
>>> + EFI_LBA StartLba;
>>> + EFI_LBA NextLba;
>>> + EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
>>> +
>>> + StartLba = 0;
>>> + Offset = 0;
>>> + BlockMap = &(FvbInstance->FvHeader.BlockMap[0]);
>>> +
>>> + //
>>> + // Parse the blockmap of the FV to find which map entry the Lba belongs
>> to
>>> + //
>>> + while (TRUE) {
>>> + NumBlocks = BlockMap->NumBlocks;
>>> + BlockLength = BlockMap->Length;
>>> +
>>> + if ( NumBlocks == 0 || BlockLength == 0) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + NextLba = StartLba + NumBlocks;
>>> +
>>> + //
>>> + // The map entry found
>>> + //
>>> + if (Lba >= StartLba && Lba < NextLba) {
>>> + Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
>>> + if (LbaAddress ) {
>>> + *LbaAddress = FvbInstance->FvBase + Offset;
>>> + }
>>> +
>>> + if (LbaLength ) {
>>> + *LbaLength = BlockLength;
>>> + }
>>> +
>>> + if (NumOfBlocks ) {
>>> + *NumOfBlocks = (UINTN)(NextLba - Lba);
>>> + }
>>> + return EFI_SUCCESS;
>>> + }
>>> +
>>> + StartLba = NextLba;
>>> + Offset = Offset + NumBlocks * BlockLength;
>>> + BlockMap++;
>>> + }
>>> +}
>>> +
>>> +/**
>>> + Reads specified number of bytes into a buffer from the specified block.
>>> +
>>> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
>>> + @param[in] Lba The logical block address to be read from
>>> + @param[in] BlockOffset Offset into the block at which to begin
>> reading
>>> + @param[in] NumBytes Pointer that on input contains the total
>> size of
>>> + the buffer. On output, it contains the total number
>>> + of bytes read
>>> + @param[in] Buffer Pointer to a caller allocated buffer that will
>> be
>>> + used to hold the data read
>>> +
>>> +
>>> + @retval EFI_SUCCESS The firmware volume was read
>> successfully and
>>> + contents are in Buffer
>>> + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA
>> boundary. On output,
>>> + NumBytes contains the total number of bytes
>> returned
>>> + in Buffer
>>> + @retval EFI_ACCESS_DENIED The firmware volume is in the
>> ReadDisabled state
>>> + @retval EFI_DEVICE_ERROR The block device is not functioning
>> correctly and
>>> + could not be read
>>> + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,
>> Buffer are NULL
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +FvbReadBlock (
>>> + IN EFI_FVB_INSTANCE *FvbInstance,
>>> + IN EFI_LBA Lba,
>>> + IN UINTN BlockOffset,
>>> + IN OUT UINTN *NumBytes,
>>> + IN UINT8 *Buffer
>>> + )
>>> +{
>>> + EFI_FVB_ATTRIBUTES_2 Attributes;
>>> + UINTN LbaAddress;
>>> + UINTN LbaLength;
>>> + EFI_STATUS Status;
>>> + BOOLEAN BadBufferSize = FALSE;
>>> +
>>> + if ((NumBytes == NULL) || (Buffer == NULL)) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + if (*NumBytes == 0) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress,
>> &LbaLength, NULL);
>>> + if (EFI_ERROR(Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + Attributes = FvbGetVolumeAttributes (FvbInstance);
>>> +
>>> + if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
>>> + return EFI_ACCESS_DENIED;
>>> + }
>>> +
>>> + if (BlockOffset > LbaLength) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + if (LbaLength < (*NumBytes + BlockOffset)) {
>>> + DEBUG ((DEBUG_INFO,
>>> + "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
>>> + *NumBytes,
>>> + (UINT32)(LbaLength - BlockOffset))
>>> + );
>>> + *NumBytes = (UINT32) (LbaLength - BlockOffset);
>>> + BadBufferSize = TRUE;
>>> + }
>>> +
>>> + Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes,
>> Buffer);
>>> +
>>> + if (!EFI_ERROR (Status) && BadBufferSize) {
>>> + return EFI_BAD_BUFFER_SIZE;
>>> + } else {
>>> + return Status;
>>> + }
>>> +}
>>> +
>>> +/**
>>> + Writes specified number of bytes from the input buffer to the block.
>>> +
>>> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
>>> + @param[in] Lba The starting logical block index to write to
>>> + @param[in] BlockOffset Offset into the block at which to begin
>> writing
>>> + @param[in] NumBytes Pointer that on input contains the total
>> size of
>>> + the buffer. On output, it contains the total number
>>> + of bytes actually written
>>> + @param[in] Buffer Pointer to a caller allocated buffer that
>> contains
>>> + the source for the write
>>> + @retval EFI_SUCCESS The firmware volume was written
>> successfully
>>> + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA
>> boundary. On output,
>>> + NumBytes contains the total number of bytes
>>> + actually written
>>> + @retval EFI_ACCESS_DENIED The firmware volume is in the
>> WriteDisabled state
>>> + @retval EFI_DEVICE_ERROR The block device is not functioning
>> correctly and
>>> + could not be written
>>> + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes,
>> Buffer are NULL
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +FvbWriteBlock (
>>> + IN EFI_FVB_INSTANCE *FvbInstance,
>>> + IN EFI_LBA Lba,
>>> + IN UINTN BlockOffset,
>>> + IN OUT UINTN *NumBytes,
>>> + IN UINT8 *Buffer
>>> + )
>>> +{
>>> + EFI_FVB_ATTRIBUTES_2 Attributes;
>>> + UINTN LbaAddress;
>>> + UINTN LbaLength;
>>> + EFI_STATUS Status;
>>> + BOOLEAN BadBufferSize = FALSE;
>>> +
>>> + if ((NumBytes == NULL) || (Buffer == NULL)) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + if (*NumBytes == 0) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress,
>> &LbaLength, NULL);
>>> + if (EFI_ERROR(Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + //
>>> + // Check if the FV is write enabled
>>> + //
>>> + Attributes = FvbGetVolumeAttributes (FvbInstance);
>>> + if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
>>> + return EFI_ACCESS_DENIED;
>>> + }
>>> +
>>> + //
>>> + // Perform boundary checks and adjust NumBytes
>>> + //
>>> + if (BlockOffset > LbaLength) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + if (LbaLength < (*NumBytes + BlockOffset)) {
>>> + DEBUG ((DEBUG_INFO,
>>> + "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
>>> + *NumBytes,
>>> + (UINT32)(LbaLength - BlockOffset))
>>> + );
>>> + *NumBytes = (UINT32) (LbaLength - BlockOffset);
>>> + BadBufferSize = TRUE;
>>> + }
>>> +
>>> + Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes,
>> Buffer);
>>> + if (EFI_ERROR (Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + Status = SpiFlashLock ();
>>> + if (EFI_ERROR (Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress +
>> BlockOffset), *NumBytes);
>>> +
>>> + if (!EFI_ERROR (Status) && BadBufferSize) {
>>> + return EFI_BAD_BUFFER_SIZE;
>>> + } else {
>>> + return Status;
>>> + }
>>> +}
>>> +
>>> +
>>> +
>>> +/**
>>> + Erases and initializes a firmware volume block.
>>> +
>>> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
>>> + @param[in] Lba The logical block index to be erased
>>> +
>>> + @retval EFI_SUCCESS The erase request was successfully
>> completed
>>> + @retval EFI_ACCESS_DENIED The firmware volume is in the
>> WriteDisabled state
>>> + @retval EFI_DEVICE_ERROR The block device is not functioning
>> correctly and
>>> + could not be written. Firmware device may have been
>>> + partially erased
>>> + @retval EFI_INVALID_PARAMETER Instance not found
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +FvbEraseBlock (
>>> + IN EFI_FVB_INSTANCE *FvbInstance,
>>> + IN EFI_LBA Lba
>>> + )
>>> +{
>>> +
>>> + EFI_FVB_ATTRIBUTES_2 Attributes;
>>> + UINTN LbaAddress;
>>> + UINTN LbaLength;
>>> + EFI_STATUS Status;
>>> +
>>> + //
>>> + // Check if the FV is write enabled
>>> + //
>>> + Attributes = FvbGetVolumeAttributes (FvbInstance);
>>> +
>>> + if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
>>> + return EFI_ACCESS_DENIED;
>>> + }
>>> +
>>> + //
>>> + // Get the starting address of the block for erase.
>>> + //
>>> + Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress,
>> &LbaLength, NULL);
>>> + if (EFI_ERROR(Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
>>> + if (EFI_ERROR (Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + Status = SpiFlashLock ();
>>> + if (EFI_ERROR (Status)) {
>>> + return Status;
>>> + }
>>> +
>>> + WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
>>> +
>>> + return Status;
>>> +}
>>> +
>>> +/**
>>> + Modifies the current settings of the firmware volume according to the
>>> + input parameter, and returns the new setting of the volume
>>> +
>>> + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
>>> + @param[in] Attributes On input, it is a pointer to
>> EFI_FVB_ATTRIBUTES_2
>>> + containing the desired firmware volume settings.
>>> + On successful return, it contains the new settings
>>> + of the firmware volume
>>> +
>>> + @retval EFI_SUCCESS Successfully returns
>>> + @retval EFI_ACCESS_DENIED The volume setting is locked and
>> cannot be modified
>>> + @retval EFI_INVALID_PARAMETER Instance not found, or The
>> attributes requested are
>>> + in conflict with the capabilities as declared in the
>>> + firmware volume header
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +FvbSetVolumeAttributes (
>>> + IN EFI_FVB_INSTANCE *FvbInstance,
>>> + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
>>> + )
>>> +{
>>> + EFI_FVB_ATTRIBUTES_2 OldAttributes;
>>> + EFI_FVB_ATTRIBUTES_2 *AttribPtr;
>>> + EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
>>> + UINT32 Capabilities;
>>> + UINT32 OldStatus, NewStatus;
>>> +
>>> + AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance-
>>> FvHeader.Attributes);
>>> + OldAttributes = *AttribPtr;
>>> + Capabilities = OldAttributes & EFI_FVB2_CAPABILITIES;
>>> + OldStatus = OldAttributes & EFI_FVB2_STATUS;
>>> + NewStatus = *Attributes & EFI_FVB2_STATUS;
>>> +
>>> + UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP | \
>>> + EFI_FVB2_READ_ENABLED_CAP | \
>>> + EFI_FVB2_WRITE_DISABLED_CAP | \
>>> + EFI_FVB2_WRITE_ENABLED_CAP | \
>>> + EFI_FVB2_LOCK_CAP | \
>>> + EFI_FVB2_STICKY_WRITE | \
>>> + EFI_FVB2_MEMORY_MAPPED | \
>>> + EFI_FVB2_ERASE_POLARITY | \
>>> + EFI_FVB2_READ_LOCK_CAP | \
>>> + EFI_FVB2_WRITE_LOCK_CAP | \
>>> + EFI_FVB2_ALIGNMENT;
>>> +
>>> + //
>>> + // Some attributes of FV is read only can *not* be set
>>> + //
>>> + if ((OldAttributes & UnchangedAttributes) ^ (*Attributes &
>> UnchangedAttributes)) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + //
>>> + // If firmware volume is locked, no status bit can be updated
>>> + //
>>> + if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
>>> + if ( OldStatus ^ NewStatus ) {
>>> + return EFI_ACCESS_DENIED;
>>> + }
>>> + }
>>> +
>>> + //
>>> + // Test read disable
>>> + //
>>> + if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
>>> + if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + }
>>> +
>>> + //
>>> + // Test read enable
>>> + //
>>> + if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
>>> + if (NewStatus & EFI_FVB2_READ_STATUS) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + }
>>> +
>>> + //
>>> + // Test write disable
>>> + //
>>> + if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
>>> + if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + }
>>> +
>>> + //
>>> + // Test write enable
>>> + //
>>> + if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
>>> + if (NewStatus & EFI_FVB2_WRITE_STATUS) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + }
>>> +
>>> + //
>>> + // Test lock
>>> + //
>>> + if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
>>> + if (NewStatus & EFI_FVB2_LOCK_STATUS) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + }
>>> +
>>> + *AttribPtr = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
>>> + *AttribPtr = (*AttribPtr) | NewStatus;
>>> + *Attributes = *AttribPtr;
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +/**
>>> + Check the integrity of firmware volume header
>>> +
>>> + @param[in] FvHeader A pointer to a firmware volume header
>>> +
>>> + @retval TRUE The firmware volume is consistent
>>> + @retval FALSE The firmware volume has corrupted.
>>> +
>>> +**/
>>> +BOOLEAN
>>> +IsFvHeaderValid (
>>> + IN EFI_PHYSICAL_ADDRESS FvBase,
>>> + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
>>> + )
>>> +{
>>> + if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
>>> + if (CompareMem (&FvHeader->FileSystemGuid,
>> &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
>>> + return FALSE;
>>> + }
>>> + } else {
>>> + if (CompareMem (&FvHeader->FileSystemGuid,
>> &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
>>> + return FALSE;
>>> + }
>>> + }
>>> + if ( (FvHeader->Revision != EFI_FVH_REVISION) ||
>>> + (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
>>> + (FvHeader->FvLength == ((UINTN) -1)) ||
>>> + ((FvHeader->HeaderLength & 0x01 ) !=0) ) {
>>> + return FALSE;
>>> + }
>>> +
>>> + if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader-
>>> HeaderLength) != 0) {
>>> + return FALSE;
>>> + }
>>> +
>>> + return TRUE;
>>> +}
>>> +
>>> +//
>>> +// FVB protocol APIs
>>> +//
>>> +
>>> +/**
>>> + Retrieves the physical address of the device.
>>> +
>>> + @param[in] This A pointer to
>> EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
>>> + @param[out] Address Output buffer containing the address.
>>> +
>>> + retval EFI_SUCCESS The function always return successfully.
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolGetPhysicalAddress (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + OUT EFI_PHYSICAL_ADDRESS *Address
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> +
>>> + *Address = FvbInstance->FvBase;
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +/**
>>> + Retrieve the size of a logical block
>>> +
>>> + @param[in] This Calling context
>>> + @param[in] Lba Indicates which block to return the size for.
>>> + @param[out] BlockSize A pointer to a caller allocated UINTN in which
>>> + the size of the block is returned
>>> + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which
>> the
>>> + number of consecutive blocks starting with Lba is
>>> + returned. All blocks in this range have a size of
>>> + BlockSize
>>> +
>>> + @retval EFI_SUCCESS The function always return successfully.
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolGetBlockSize (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN EFI_LBA Lba,
>>> + OUT UINTN *BlockSize,
>>> + OUT UINTN *NumOfBlocks
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> +
>>> + DEBUG((DEBUG_INFO,
>>> + "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks:
>> 0x%x\n",
>>> + Lba,
>>> + BlockSize,
>>> + NumOfBlocks)
>>> + );
>>> +
>>> + return FvbGetLbaAddress (
>>> + FvbInstance,
>>> + Lba,
>>> + NULL,
>>> + BlockSize,
>>> + NumOfBlocks
>>> + );
>>> +}
>>> +
>>> +/**
>>> + Retrieves Volume attributes. No polarity translations are done.
>>> +
>>> + @param[in] This Calling context
>>> + @param[out] Attributes Output buffer which contains attributes
>>> +
>>> + @retval EFI_SUCCESS The function always return successfully.
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolGetAttributes (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + OUT EFI_FVB_ATTRIBUTES_2 *Attributes
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> +
>>> + *Attributes = FvbGetVolumeAttributes (FvbInstance);
>>> +
>>> + DEBUG ((DEBUG_INFO,
>>> + "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
>>> + This,
>>> + *Attributes)
>>> + );
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +/**
>>> + Sets Volume attributes. No polarity translations are done.
>>> +
>>> + @param[in] This Calling context
>>> + @param[out] Attributes Output buffer which contains attributes
>>> +
>>> + @retval EFI_SUCCESS The function always return successfully.
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolSetAttributes (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
>>> + )
>>> +{
>>> + EFI_STATUS Status;
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> +
>>> + DEBUG((DEBUG_INFO,
>>> + "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n",
>>> + This,
>>> + *Attributes)
>>> + );
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> +
>>> + Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
>>> +
>>> + DEBUG((DEBUG_INFO,
>>> + "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n",
>>> + This,
>>> + *Attributes)
>>> + );
>>> +
>>> + return Status;
>>> +}
>>> +
>>> +/**
>>> + The EraseBlock() function erases one or more blocks as denoted by the
>>> + variable argument list. The entire parameter list of blocks must be
>> verified
>>> + prior to erasing any blocks. If a block is requested that does not exist
>>> + within the associated firmware volume (it has a larger index than the last
>>> + block of the firmware volume), the EraseBlock() function must return
>>> + EFI_INVALID_PARAMETER without modifying the contents of the
>> firmware volume.
>>> +
>>> + @param[in] This Calling context
>>> + @param[in] ... Starting LBA followed by Number of Lba to erase.
>>> + a -1 to terminate the list.
>>> +
>>> + @retval EFI_SUCCESS The erase request was successfully completed
>>> + @retval EFI_ACCESS_DENIED The firmware volume is in the
>> WriteDisabled state
>>> + @retval EFI_DEVICE_ERROR The block device is not functioning correctly
>> and
>>> + could not be written. Firmware device may have been
>>> + partially erased
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolEraseBlocks (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + ...
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> + UINTN NumOfBlocks;
>>> + VA_LIST Args;
>>> + EFI_LBA StartingLba;
>>> + UINTN NumOfLba;
>>> + EFI_STATUS Status;
>>> +
>>> + DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> +
>>> + NumOfBlocks = FvbInstance->NumOfBlocks;
>>> +
>>> + VA_START (Args, This);
>>> +
>>> + do {
>>> + StartingLba = VA_ARG (Args, EFI_LBA);
>>> + if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
>>> + break;
>>> + }
>>> +
>>> + NumOfLba = VA_ARG (Args, UINT32);
>>> +
>>> + //
>>> + // Check input parameters
>>> + //
>>> + if (NumOfLba == 0) {
>>> + VA_END (Args);
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> +
>>> + if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
>>> + return EFI_INVALID_PARAMETER;
>>> + }
>>> + } while ( 1 );
>>> +
>>> + VA_END (Args);
>>> +
>>> + VA_START (Args, This);
>>> + do {
>>> + StartingLba = VA_ARG (Args, EFI_LBA);
>>> + if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
>>> + break;
>>> + }
>>> +
>>> + NumOfLba = VA_ARG (Args, UINT32);
>>> +
>>> + while ( NumOfLba > 0 ) {
>>> + Status = FvbEraseBlock (FvbInstance, StartingLba);
>>> + if ( EFI_ERROR(Status)) {
>>> + VA_END (Args);
>>> + return Status;
>>> + }
>>> + StartingLba ++;
>>> + NumOfLba --;
>>> + }
>>> +
>>> + } while ( 1 );
>>> +
>>> + VA_END (Args);
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +/**
>>> + Writes data beginning at Lba:Offset from FV. The write terminates either
>>> + when *NumBytes of data have been written, or when a block boundary
>> is
>>> + reached. *NumBytes is updated to reflect the actual number of bytes
>>> + written. The write opertion does not include erase. This routine will
>>> + attempt to write only the specified bytes. If the writes do not stick,
>>> + it will return an error.
>>> +
>>> + @param[in] This Calling context
>>> + @param[in] Lba Block in which to begin write
>>> + @param[in] Offset Offset in the block at which to begin write
>>> + @param[in,out] NumBytes On input, indicates the requested write size.
>> On
>>> + output, indicates the actual number of bytes written
>>> + @param[in] Buffer Buffer containing source data for the write.
>>> +
>>> + @retval EFI_SUCCESS The firmware volume was written successfully
>>> + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary.
>> On output,
>>> + NumBytes contains the total number of bytes
>>> + actually written
>>> + @retval EFI_ACCESS_DENIED The firmware volume is in the
>> WriteDisabled state
>>> + @retval EFI_DEVICE_ERROR The block device is not functioning
>> correctly and
>>> + could not be written
>>> + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolWrite (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN EFI_LBA Lba,
>>> + IN UINTN Offset,
>>> + IN OUT UINTN *NumBytes,
>>> + IN UINT8 *Buffer
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> +
>>> + DEBUG((DEBUG_INFO,
>>> + "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer:
>> 0x%x\n",
>>> + Lba,
>>> + Offset,
>>> + *NumBytes,
>>> + Buffer)
>>> + );
>>> +
>>> + return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
>>> +}
>>> +
>>> +/**
>>> + Reads data beginning at Lba:Offset from FV. The Read terminates either
>>> + when *NumBytes of data have been read, or when a block boundary is
>>> + reached. *NumBytes is updated to reflect the actual number of bytes
>>> + written. The write opertion does not include erase. This routine will
>>> + attempt to write only the specified bytes. If the writes do not stick,
>>> + it will return an error.
>>> +
>>> + @param[in] This Calling context
>>> + @param[in] Lba Block in which to begin write
>>> + @param[in] Offset Offset in the block at which to begin write
>>> + @param[in,out] NumBytes On input, indicates the requested write size.
>> On
>>> + output, indicates the actual number of bytes written
>>> + @param[in] Buffer Buffer containing source data for the write.
>>> +
>>> + @retval EFI_SUCCESS The firmware volume was read successfully
>> and
>>> + contents are in Buffer
>>> + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary.
>> On output,
>>> + NumBytes contains the total number of bytes returned
>>> + in Buffer
>>> + @retval EFI_ACCESS_DENIED The firmware volume is in the
>> ReadDisabled state
>>> + @retval EFI_DEVICE_ERROR The block device is not functioning
>> correctly and
>>> + could not be read
>>> + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolRead (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN EFI_LBA Lba,
>>> + IN UINTN Offset,
>>> + IN OUT UINTN *NumBytes,
>>> + OUT UINT8 *Buffer
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> + EFI_STATUS Status;
>>> +
>>> + FvbInstance = FVB_INSTANCE_FROM_THIS (This);
>>> + Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
>>> + DEBUG((DEBUG_INFO,
>>> + "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer:
>> 0x%x\n",
>>> + Lba,
>>> + Offset,
>>> + *NumBytes,
>>> + Buffer)
>>> + );
>>> +
>>> + return Status;
>>> +}
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
>> m.c
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
>> m.c
>>> new file mode 100644
>>> index 000000000000..42a0828c6fae
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
>> m.c
>>> @@ -0,0 +1,271 @@
>>> +/** @file
>>> + MM driver source for several Serial Flash devices
>>> + which are compliant with the Intel(R) Serial Flash Interface Compatibility
>> Specification.
>>> +
>>> + Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>>> + Copyright (c) Microsoft Corporation.<BR>
>>> + SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#include "SpiFvbServiceCommon.h"
>>> +#include <Library/MmServicesTableLib.h>
>>> +#include <Library/UefiDriverEntryPoint.h>
>>> +#include <Protocol/SmmFirmwareVolumeBlock.h>
>>> +
>>> +/**
>>> + The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
>>> + for each FV in the system.
>>> +
>>> + @param[in] FvbInstance The pointer to a FW volume instance structure,
>>> + which contains the information about one FV.
>>> +
>>> + @retval VOID
>>> +
>>> +**/
>>> +VOID
>>> +InstallFvbProtocol (
>>> + IN EFI_FVB_INSTANCE *FvbInstance
>>> + )
>>> +{
>>> + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
>>> + EFI_STATUS Status;
>>> + EFI_HANDLE FvbHandle;
>>> +
>>> + ASSERT (FvbInstance != NULL);
>>> + if (FvbInstance == NULL) {
>>> + return;
>>> + }
>>> +
>>> + CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof
>> (EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
>>> +
>>> + FvHeader = &FvbInstance->FvHeader;
>>> + if (FvHeader == NULL) {
>>> + return;
>>> + }
>>> +
>>> + //
>>> + // Set up the devicepath
>>> + //
>>> + DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for
>> 0x%lx:\n", FvbInstance->FvBase));
>>> + if (FvHeader->ExtHeaderOffset == 0) {
>>> + //
>>> + // FV does not contains extension header, then produce
>> MEMMAP_DEVICE_PATH
>>> + //
>>> + FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)
>> AllocateRuntimeCopyPool (sizeof
>>> (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
>>> + if (FvbInstance->DevicePath == NULL) {
>>> + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for
>> MEMMAP_DEVICE_PATH failed\n"));
>>> + return;
>>> + }
>>> + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)-
>>> MemMapDevPath.StartingAddress = FvbInstance->FvBase;
>>> + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)-
>>> MemMapDevPath.EndingAddress = FvbInstance->FvBase +
>>> FvHeader->FvLength - 1;
>>> + } else {
>>> + FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)
>> AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH),
>>> &mFvPIWGDevicePathTemplate);
>>> + if (FvbInstance->DevicePath == NULL) {
>>> + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for
>> FV_PIWG_DEVICE_PATH failed\n"));
>>> + return;
>>> + }
>>> + CopyGuid (
>>> + &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)-
>>> FvDevPath.FvName,
>>> + (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
>>> + );
>>> + }
>>> +
>>> + //
>>> + // LocateDevicePath fails so install a new interface and device path
>>> + //
>>> + FvbHandle = NULL;
>>> +
>>> + Status = gMmst->MmInstallProtocolInterface (
>>> + &FvbHandle,
>>> + &gEfiSmmFirmwareVolumeBlockProtocolGuid,
>>> + EFI_NATIVE_INTERFACE,
>>> + &(FvbInstance->FvbProtocol)
>>> + );
>>> + ASSERT_EFI_ERROR (Status);
>>> +
>>> + Status = gMmst->MmInstallProtocolInterface (
>>> + &FvbHandle,
>>> + &gEfiDevicePathProtocolGuid,
>>> + EFI_NATIVE_INTERFACE,
>>> + &(FvbInstance->DevicePath)
>>> + );
>>> + ASSERT_EFI_ERROR (Status);
>>> +}
>>> +
>>> +/**
>>> + The function does the necessary initialization work for
>>> + Firmware Volume Block Driver.
>>> +
>>> +**/
>>> +VOID
>>> +FvbInitialize (
>>> + VOID
>>> + )
>>> +{
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> + EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
>>> + EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
>>> + EFI_PHYSICAL_ADDRESS BaseAddress;
>>> + EFI_STATUS Status;
>>> + UINTN BufferSize;
>>> + UINTN Idx;
>>> + UINT32 MaxLbaSize;
>>> + UINT32 BytesWritten;
>>> + UINTN BytesErased;
>>> +
>>> + mPlatformFvBaseAddress[0].FvBase =
>> PcdGet32(PcdFlashNvStorageVariableBase);
>>> + mPlatformFvBaseAddress[0].FvSize =
>> PcdGet32(PcdFlashNvStorageVariableSize);
>>> + mPlatformFvBaseAddress[1].FvBase =
>> PcdGet32(PcdFlashMicrocodeFvBase);
>>> + mPlatformFvBaseAddress[1].FvSize =
>> PcdGet32(PcdFlashMicrocodeFvSize);
>>> + mPlatformDefaultBaseAddress[0].FvBase =
>> PcdGet32(PcdFlashNvStorageVariableBase);
>>> + mPlatformDefaultBaseAddress[0].FvSize =
>> PcdGet32(PcdFlashNvStorageVariableSize);
>>> + mPlatformDefaultBaseAddress[1].FvBase =
>> PcdGet32(PcdFlashMicrocodeFvBase);
>>> + mPlatformDefaultBaseAddress[1].FvSize =
>> PcdGet32(PcdFlashMicrocodeFvSize);
>>> +
>>> + //
>>> + // We will only continue with FVB installation if the
>>> + // SPI is the active BIOS state
>>> + //
>>> + {
>>> + //
>>> + // Make sure all FVB are valid and/or fix if possible
>>> + //
>>> + for (Idx = 0;; Idx++) {
>>> + if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
>> mPlatformFvBaseAddress[Idx].FvBase == 0) {
>>> + break;
>>> + }
>>> +
>>> + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
>>> + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)
>> BaseAddress;
>>> +
>>> + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
>>> + BytesWritten = 0;
>>> + BytesErased = 0;
>>> + DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n",
>> FvHeader));
>>> + Status = GetFvbInfo (BaseAddress, &FvHeader);
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x.
>> GetFvbInfo Status %r\n", BaseAddress, Status));
>>> + continue;
>>> + }
>>> + DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static
>> data\n", BaseAddress));
>>> + //
>>> + // Spi erase
>>> + //
>>> + BytesErased = (UINTN) FvHeader->BlockMap->Length;
>>> + Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n",
>> Status));
>>> + continue;
>>> + }
>>> + if (BytesErased != FvHeader->BlockMap->Length) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader-
>>> BlockMap->Length\n"));
>>> + DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n",
>> BytesErased, FvHeader->BlockMap->Length));
>>> + continue;
>>> + }
>>> + BytesWritten = FvHeader->HeaderLength;
>>> + Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten,
>> (UINT8*)FvHeader);
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n",
>> Status));
>>> + continue;
>>> + }
>>> + if (BytesWritten != FvHeader->HeaderLength) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=
>> HeaderLength\n"));
>>> + DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength =
>> 0x%X\n", BytesWritten, FvHeader->HeaderLength));
>>> + continue;
>>> + }
>>> + Status = SpiFlashLock ();
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status));
>>> + continue;
>>> + }
>>> + DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static
>> data\n", BaseAddress));
>>> + //
>>> + // Clear cache for this range.
>>> + //
>>> + WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress,
>> FvHeader->BlockMap->Length);
>>> + }
>>> + }
>>> +
>>> + //
>>> + // Calculate the total size for all firmware volume block instances
>>> + //
>>> + BufferSize = 0;
>>> + for (Idx = 0; ; Idx++) {
>>> + if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
>> mPlatformFvBaseAddress[Idx].FvBase == 0) {
>>> + break;
>>> + }
>>> + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
>>> + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)
>> BaseAddress;
>>> +
>>> + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n",
>> FvHeader));
>>> + continue;
>>> + }
>>> +
>>> + BufferSize += (FvHeader->HeaderLength +
>>> + sizeof (EFI_FVB_INSTANCE) -
>>> + sizeof (EFI_FIRMWARE_VOLUME_HEADER)
>>> + );
>>> + }
>>> +
>>> + mFvbModuleGlobal.FvbInstance = (EFI_FVB_INSTANCE *)
>> AllocateRuntimeZeroPool (BufferSize);
>>> + if (mFvbModuleGlobal.FvbInstance == NULL) {
>>> + ASSERT (FALSE);
>>> + return;
>>> + }
>>> +
>>> + MaxLbaSize = 0;
>>> + FvbInstance = mFvbModuleGlobal.FvbInstance;
>>> + mFvbModuleGlobal.NumFv = 0;
>>> +
>>> + for (Idx = 0; ; Idx++) {
>>> + if (mPlatformFvBaseAddress[Idx].FvSize == 0 &&
>> mPlatformFvBaseAddress[Idx].FvBase == 0) {
>>> + break;
>>> + }
>>> + BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
>>> + FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)
>> BaseAddress;
>>> +
>>> + if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
>>> + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n",
>> FvHeader));
>>> + continue;
>>> + }
>>> +
>>> + FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
>>> + CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader-
>>> HeaderLength);
>>> +
>>> + FvHeader = &(FvbInstance->FvHeader);
>>> + FvbInstance->FvBase = (UINTN)BaseAddress;
>>> +
>>> + //
>>> + // Process the block map for each FV
>>> + //
>>> + FvbInstance->NumOfBlocks = 0;
>>> + for (PtrBlockMapEntry = FvHeader->BlockMap;
>>> + PtrBlockMapEntry->NumBlocks != 0;
>>> + PtrBlockMapEntry++) {
>>> + //
>>> + // Get the maximum size of a block.
>>> + //
>>> + if (MaxLbaSize < PtrBlockMapEntry->Length) {
>>> + MaxLbaSize = PtrBlockMapEntry->Length;
>>> + }
>>> + FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
>>> + }
>>> +
>>> + //
>>> + // Add a FVB Protocol Instance
>>> + //
>>> + InstallFvbProtocol (FvbInstance);
>>> + mFvbModuleGlobal.NumFv++;
>>> +
>>> + //
>>> + // Move on to the next FvbInstance
>>> + //
>>> + FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance)
>> +
>>> + FvHeader->HeaderLength +
>>> + (sizeof (EFI_FVB_INSTANCE) - sizeof
>> (EFI_FIRMWARE_VOLUME_HEADER)));
>>> +
>>> + }
>>> + }
>>> +}
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
>> ndaloneMm.c
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
>> ndaloneMm.c
>>> new file mode 100644
>>> index 000000000000..252c818d6551
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
>> ndaloneMm.c
>>> @@ -0,0 +1,32 @@
>>> +/** @file
>>> + MM driver source for several Serial Flash devices
>>> + which are compliant with the Intel(R) Serial Flash Interface Compatibility
>> Specification.
>>> +
>>> + Copyright (c) Microsoft Corporation.<BR>
>>> + SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#include "SpiFvbServiceCommon.h"
>>> +#include "SpiFvbServiceMm.h"
>>> +
>>> +/**
>>> + The driver Standalone MM entry point.
>>> +
>>> + @param[in] ImageHandle Image handle of this driver.
>>> + @param[in] MmSystemTable A pointer to the MM system table.
>>> +
>>> + @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +SpiFvbStandaloneMmInitialize (
>>> + IN EFI_HANDLE ImageHandle,
>>> + IN EFI_MM_SYSTEM_TABLE *MmSystemTable
>>> + )
>>> +{
>>> + FvbInitialize ();
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra
>> ditionalMm.c
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra
>> ditionalMm.c
>>> new file mode 100644
>>> index 000000000000..1c2dac70e3c6
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra
>> ditionalMm.c
>>> @@ -0,0 +1,32 @@
>>> +/** @file
>>> + MM driver source for several Serial Flash devices
>>> + which are compliant with the Intel(R) Serial Flash Interface Compatibility
>> Specification.
>>> +
>>> + Copyright (c) Microsoft Corporation.<BR>
>>> + SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#include "SpiFvbServiceCommon.h"
>>> +#include "SpiFvbServiceMm.h"
>>> +
>>> +/**
>>> + The driver Traditional MM entry point.
>>> +
>>> + @param[in] ImageHandle Image handle of this driver.
>>> + @param[in] SystemTable A pointer to the EFI system table.
>>> +
>>> + @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
>>> +
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +SpiFvbTraditionalMmInitialize (
>>> + IN EFI_HANDLE ImageHandle,
>>> + IN EFI_SYSTEM_TABLE *SystemTable
>>> + )
>>> +{
>>> + FvbInitialize ();
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
>> mmon.h
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
>> mmon.h
>>> new file mode 100644
>>> index 000000000000..e9d69e985814
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCo
>> mmon.h
>>> @@ -0,0 +1,158 @@
>>> +/** @file
>>> + Common source definitions used in serial flash drivers
>>> +
>>> +Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>>> +SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#ifndef _SPI_FVB_SERVICE_COMMON_H
>>> +#define _SPI_FVB_SERVICE_COMMON_H
>>> +
>>> +#include <Guid/EventGroup.h>
>>> +#include <Guid/FirmwareFileSystem2.h>
>>> +#include <Guid/SystemNvDataGuid.h>
>>> +#include <Protocol/DevicePath.h>
>>> +#include <Protocol/FirmwareVolumeBlock.h>
>>> +
>>> +#include <Library/BaseLib.h>
>>> +#include <Library/DebugLib.h>
>>> +#include <Library/BaseMemoryLib.h>
>>> +#include <Library/IoLib.h>
>>> +#include <Library/CacheMaintenanceLib.h>
>>> +#include <Library/MemoryAllocationLib.h>
>>> +#include <Library/PcdLib.h>
>>> +#include <Library/DevicePathLib.h>
>>> +#include <Library/HobLib.h>
>>> +
>>> +#include <Library/SpiFlashCommonLib.h>
>>> +
>>> +//
>>> +// Define two helper macro to extract the Capability field or Status field in
>> FVB
>>> +// bit fields
>>> +//
>>> +#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
>>> + EFI_FVB2_READ_ENABLED_CAP | \
>>> + EFI_FVB2_WRITE_DISABLED_CAP | \
>>> + EFI_FVB2_WRITE_ENABLED_CAP | \
>>> + EFI_FVB2_LOCK_CAP \
>>> + )
>>> +
>>> +#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS |
>> EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
>>> +
>>> +#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
>>> +
>>> +typedef struct {
>>> + UINT32 Signature;
>>> + UINTN FvBase;
>>> + UINTN NumOfBlocks;
>>> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
>>> + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
>>> + EFI_FIRMWARE_VOLUME_HEADER FvHeader;
>>> +} EFI_FVB_INSTANCE;
>>> +
>>> +typedef struct {
>>> + EFI_FVB_INSTANCE *FvbInstance;
>>> + UINT32 NumFv;
>>> +} FVB_GLOBAL;
>>> +
>>> +//
>>> +// Fvb Protocol instance data
>>> +//
>>> +#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE,
>> FvbProtocol, FVB_INSTANCE_SIGNATURE)
>>> +
>>> +typedef struct {
>>> + MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
>>> + EFI_DEVICE_PATH_PROTOCOL EndDevPath;
>>> +} FV_PIWG_DEVICE_PATH;
>>> +
>>> +typedef struct {
>>> + MEMMAP_DEVICE_PATH MemMapDevPath;
>>> + EFI_DEVICE_PATH_PROTOCOL EndDevPath;
>>> +} FV_MEMMAP_DEVICE_PATH;
>>> +
>>> +typedef struct {
>>> + UINT32 FvBase;
>>> + UINT32 FvSize;
>>> +} FV_INFO;
>>> +
>>> +//
>>> +// Protocol APIs
>>> +//
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolGetAttributes (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + OUT EFI_FVB_ATTRIBUTES_2 *Attributes
>>> + );
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolSetAttributes (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
>>> + );
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolGetPhysicalAddress (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + OUT EFI_PHYSICAL_ADDRESS *Address
>>> + );
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolGetBlockSize (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN EFI_LBA Lba,
>>> + OUT UINTN *BlockSize,
>>> + OUT UINTN *NumOfBlocks
>>> + );
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolRead (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN EFI_LBA Lba,
>>> + IN UINTN Offset,
>>> + IN OUT UINTN *NumBytes,
>>> + OUT UINT8 *Buffer
>>> + );
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolWrite (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + IN EFI_LBA Lba,
>>> + IN UINTN Offset,
>>> + IN OUT UINTN *NumBytes,
>>> + IN UINT8 *Buffer
>>> + );
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +FvbProtocolEraseBlocks (
>>> + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
>>> + ...
>>> + );
>>> +
>>> +BOOLEAN
>>> +IsFvHeaderValid (
>>> + IN EFI_PHYSICAL_ADDRESS FvBase,
>>> + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
>>> + );
>>> +
>>> +EFI_STATUS
>>> +GetFvbInfo (
>>> + IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
>>> + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
>>> + );
>>> +
>>> +extern FVB_GLOBAL mFvbModuleGlobal;
>>> +extern FV_MEMMAP_DEVICE_PATH
>> mFvMemmapDevicePathTemplate;
>>> +extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
>>> +extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL
>> mFvbProtocolTemplate;
>>> +extern FV_INFO mPlatformFvBaseAddress[];
>>> +extern FV_INFO mPlatformDefaultBaseAddress[];
>>> +
>>> +#endif
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
>> m.h
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
>> m.h
>>> new file mode 100644
>>> index 000000000000..36af1130c8ee
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceM
>> m.h
>>> @@ -0,0 +1,22 @@
>>> +/** @file
>>> + Definitions common to MM implementation in this driver.
>>> +
>>> + Copyright (c) Microsoft Corporation.<BR>
>>> + SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +
>>> +**/
>>> +
>>> +#ifndef _SPI_FVB_SERVICE_MM_H_
>>> +#define _SPI_FVB_SERVICE_MM_H_
>>> +
>>> +/**
>>> + The function does the necessary initialization work for
>>> + Firmware Volume Block Driver.
>>> +
>>> +**/
>>> +VOID
>>> +FvbInitialize (
>>> + VOID
>>> + );
>>> +
>>> +#endif
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSm
>> m.inf
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSm
>> m.inf
>>> new file mode 100644
>>> index 000000000000..bf1306f00201
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSm
>> m.inf
>>> @@ -0,0 +1,68 @@
>>> +### @file
>>> +# Component description file for the Serial Flash device Runtime driver.
>>> +#
>>> +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
>>> +# Copyright (c) Microsoft Corporation.<BR>
>>> +#
>>> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +#
>>> +###
>>> +
>>> +[Defines]
>>> + INF_VERSION = 0x00010017
>>> + BASE_NAME = SpiFvbServiceSmm
>>> + FILE_GUID = 68A10D85-6858-4402-B070-028B3EA21747
>>> + VERSION_STRING = 1.0
>>> + MODULE_TYPE = DXE_SMM_DRIVER
>>> + PI_SPECIFICATION_VERSION = 1.10
>>> + ENTRY_POINT = SpiFvbTraditionalMmInitialize
>>> +
>>> +#
>>> +# The following information is for reference only and not required by the
>> build tools.
>>> +#
>>> +# VALID_ARCHITECTURES = IA32 X64
>>> +#
>>> +
>>> +[LibraryClasses]
>>> + PcdLib
>>> + MemoryAllocationLib
>>> + CacheMaintenanceLib
>>> + BaseMemoryLib
>>> + DebugLib
>>> + BaseLib
>>> + UefiBootServicesTableLib
>>> + UefiDriverEntryPoint
>>> + SpiFlashCommonLib
>>> + MmServicesTableLib
>>> +
>>> +[Packages]
>>> + MdePkg/MdePkg.dec
>>> + MdeModulePkg/MdeModulePkg.dec
>>> + IntelSiliconPkg/IntelSiliconPkg.dec
>>> +
>>> +[Pcd]
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
>> ## CONSUMES
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ##
>> CONSUMES
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
>> ## CONSUMES
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
>> ## CONSUMES
>>> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
>> CONSUMES
>>> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
>> CONSUMES
>>> +
>>> +[Sources]
>>> + FvbInfo.c
>>> + SpiFvbServiceCommon.h
>>> + SpiFvbServiceCommon.c
>>> + SpiFvbServiceMm.h
>>> + SpiFvbServiceMm.c
>>> + SpiFvbServiceTraditionalMm.c
>>> +
>>> +[Protocols]
>>> + gEfiDevicePathProtocolGuid ## PRODUCES
>>> + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
>>> +
>>> +[Guids]
>>> + gEfiFirmwareFileSystem2Guid ## CONSUMES
>>> + gEfiSystemNvDataFvGuid ## CONSUMES
>>> +
>>> +[Depex]
>>> + TRUE
>>> diff --git
>> a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
>> ndaloneMm.inf
>>>
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
>> ndaloneMm.inf
>>> new file mode 100644
>>> index 000000000000..b66233968247
>>> --- /dev/null
>>> +++
>> b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta
>> ndaloneMm.inf
>>> @@ -0,0 +1,67 @@
>>> +### @file
>>> +# Component description file for the Serial Flash device Standalone MM
>> driver.
>>> +#
>>> +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
>>> +# Copyright (c) Microsoft Corporation.<BR>
>>> +#
>>> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>>> +#
>>> +###
>>> +
>>> +[Defines]
>>> + INF_VERSION = 0x0001001B
>>> + BASE_NAME = SpiFvbServiceStandaloneMm
>>> + FILE_GUID = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
>>> + VERSION_STRING = 1.0
>>> + MODULE_TYPE = MM_STANDALONE
>>> + PI_SPECIFICATION_VERSION = 0x00010032
>>> + ENTRY_POINT = SpiFvbStandaloneMmInitialize
>>> +
>>> +#
>>> +# The following information is for reference only and not required by the
>> build tools.
>>> +#
>>> +# VALID_ARCHITECTURES = IA32 X64
>>> +#
>>> +
>>> +[LibraryClasses]
>>> + BaseLib
>>> + BaseMemoryLib
>>> + CacheMaintenanceLib
>>> + DebugLib
>>> + MemoryAllocationLib
>>> + PcdLib
>>> + MmServicesTableLib
>>> + SpiFlashCommonLib
>>> + StandaloneMmDriverEntryPoint
>>> +
>>> +[Packages]
>>> + MdePkg/MdePkg.dec
>>> + MdeModulePkg/MdeModulePkg.dec
>>> + IntelSiliconPkg/IntelSiliconPkg.dec
>>> +
>>> +[Pcd]
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
>> ## CONSUMES
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ##
>> CONSUMES
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
>> ## CONSUMES
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
>> ## CONSUMES
>>> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##
>> CONSUMES
>>> + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##
>> CONSUMES
>>> +
>>> +[Sources]
>>> + FvbInfo.c
>>> + SpiFvbServiceCommon.h
>>> + SpiFvbServiceCommon.c
>>> + SpiFvbServiceMm.h
>>> + SpiFvbServiceMm.c
>>> + SpiFvbServiceStandaloneMm.c
>>> +
>>> +[Protocols]
>>> + gEfiDevicePathProtocolGuid ## PRODUCES
>>> + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
>>> +
>>> +[Guids]
>>> + gEfiFirmwareFileSystem2Guid ## CONSUMES
>>> + gEfiSystemNvDataFvGuid ## CONSUMES
>>> +
>>> +[Depex]
>>> + TRUE
>>> diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
>> b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
>>> index 7eb9c9def60a..7e446c97a5fb 100644
>>> --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
>>> +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
>>> @@ -40,6 +40,9 @@ [LibraryClasses]
>>>
>> PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignment
>> Lib/PeiGetVtdPmrAlignmentLib.inf
>>>
>> TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/Tp
>> mMeasurementLibNull.inf
>>> MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
>>> +
>> SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlas
>> hCommonLibNull.inf
>>> +
>> UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBo
>> otServicesTableLib.inf
>>> +
>> UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry
>> Point.inf
>>>
>>> [LibraryClasses.common.PEIM]
>>> PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
>>> @@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER]
>>>
>>> [LibraryClasses.common.DXE_SMM_DRIVER]
>>>
>> MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMe
>> moryAllocationLib.inf
>>> +
>> MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTabl
>> eLib.inf
>>>
>> SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesT
>> ableLib.inf
>>>
>>> +[LibraryClasses.common.MM_STANDALONE]
>>> +
>>>
>> MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAll
>> ocationLib/StandaloneMmMemoryAllocationLib.inf
>>> +
>> MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/Stan
>> daloneMmServicesTableLib.inf
>>> +
>> StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntry
>> Point/StandaloneMmDriverEntryPoint.inf
>>> +
>>>
>> ##########################################################
>> #########################################
>>> #
>>> # Components Section - list of the modules and components that will be
>> processed by compilation
>>> @@ -86,6 +95,8 @@ [Components]
>>> IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
>>>
>> IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDevi
>> ceSecurityDxe.inf
>>>
>> IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/Sampl
>> ePlatformDevicePolicyDxe.inf
>>> + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
>>> +
>> IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.in
>> f
>>> IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
>>> IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf
>>> IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
>>> --
>>> 2.28.0.windows.1
>
>
>
>
>
^ permalink raw reply [flat|nested] 44+ messages in thread
* [edk2-platforms][PATCH v1 11/35] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (9 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 10/35] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 12/35] KabylakeOpenBoardPkg: " Michael Kubacki
` (24 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel
Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
Deepika Kethi Reddy, Kathappan Esakkithevar
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 40 ++++++++++----------
Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
4 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 9208aeda5d2a..6ca0ada751f6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec
[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
[Sources]
BiosInfo.c
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
index d9959a79d0bb..7d2f4b2c0cb2 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00190000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00320000 # Flash addr (0xFFB20000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00170000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00490000 # Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000B0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00490000 # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000B0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00540000 # Flash addr (0xFFD40000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00070000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x005B0000 # Flash addr (0xFFDB0000)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
index 31f4d2231188..909f849eaa74 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.CometlakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -43,23 +43,23 @@ [FD.CometlakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -155,8 +155,8 @@ [FD.CometlakeURvp]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
index 1d09b990b163..abb79c111e0b 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
@@ -47,8 +47,8 @@ [Packages]
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
gCometlakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 12/35] KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (10 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 11/35] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 13/35] SimicsOpenBoardPkg: " Michael Kubacki
` (23 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Jeremy Soller
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 42 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 42 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +-
6 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index e5e40144a68a..6607ea6edfc3 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec
[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
[Sources]
BiosInfo.c
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
index 6cb6d54f558f..ce809a277b6e 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
@@ -36,8 +36,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00140000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x002E0000 # Flash addr (0xFFD00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x000B0000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00390000 # Flash addr (0xFFDB0000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00390000 # Flash addr (0xFFDB0000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00430000 # Flash addr (0xFFE50000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00490000 # Flash addr (0xFFEB0000)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 196f04c68d75..b91682f9ab97 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.GalagoPro3]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -39,25 +39,25 @@ [FD.GalagoPro3]
DEFINE SIPKG_PEI_BIN = INF
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -157,8 +157,8 @@ [FD.GalagoPro3]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf
index b5e3f66ceafc..67649e867616 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001E0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00370000 # Flash addr (0xFFB70000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00180000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x004F0000 # Flash addr (0xFFCF0000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x004F0000 # Flash addr (0xFFCF0000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000A0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00590000 # Flash addr (0xFFD90000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x005F0000 # Flash addr (0xFFDF0000)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
index f2cfff1c7bca..c12d3f7d8d11 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.KabylakeRvp3]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -39,25 +39,25 @@ [FD.KabylakeRvp3]
DEFINE SIPKG_PEI_BIN = INF
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -153,8 +153,8 @@ [FD.KabylakeRvp3]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
index 97ec70f611b1..8a99f7c59a49 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -52,8 +52,8 @@ [Guids]
[Pcd]
gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompResistor ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompTarget ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 13/35] SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (11 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 12/35] KabylakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 14/35] TigerlakeOpenBoardPkg: " Michael Kubacki
` (22 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
index 9c2436c3ad38..69a566307551 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
@@ -45,10 +45,10 @@
SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase = gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x10000
-SET gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress = 0xFFE00000
-SET gEfiPchTokenSpaceGuid.PcdFlashAreaSize = 0x00200000
+SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress = $(FW_BASE_ADDRESS)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize = $(FW_SIZE)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gEfiPchTokenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
DEFINE MEMFD_BASE_ADDRESS = 0x800000
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 14/35] TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (12 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 13/35] SimicsOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 15/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
` (21 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 8 ++---
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +--
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 38 ++++++++++----------
3 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 66c8814c97bb..56da991ab544 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -39,8 +39,8 @@ [Packages]
BoardModulePkg/BoardModulePkg.dec
[Pcd]
- gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase ## CONSUMES
@@ -61,8 +61,8 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase ## CONSUMES
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
index b21ae6401f12..24e2a963ba64 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -37,8 +37,8 @@
## Build script checks the requirement.
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00800000 # Flash addr (0xFFC00000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00880000 # Flash addr (0xFFC80000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that this value change
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00880000 # Flash addr (0xFFC80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that this value change
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x008F0000 # Flash addr (0xFFC00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00080000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00970000 # Flash addr (0xFFD70000)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index 0f645ed63e13..6b37e9a19c84 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.TigerlakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -41,25 +41,25 @@ [FD.TigerlakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x1000
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -155,8 +155,8 @@ [FD.TigerlakeURvp]
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase|gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize
FV = FvFwBinaries
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 15/35] WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (13 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 14/35] TigerlakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 16/35] CoffeelakeSiliconPkg: " Michael Kubacki
` (20 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf | 40 ++++++++++----------
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | 40 ++++++++++----------
7 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index a9687d93dee1..0a807ad84f4d 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
MinPlatformPkg/MinPlatformPkg.dec
[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
[Sources]
BiosInfo.c
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
index 3233375d6568..537d507ed7d6 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
@@ -47,8 +47,8 @@ [Packages]
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
index f7aa730ae7d2..5895eebc5a79 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
@@ -38,8 +38,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00170000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00490000 # Flash addr (0xFFDE0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00070000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00500000 # Flash addr (0xFFE50000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00050000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00500000 # Flash addr (0xFFE50000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00050000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00550000 # Flash addr (0xFFEA0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x000EA000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x0063A000 # Flash addr (0xFFF8A000)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
index 2903bdacaebd..091d2118c7b3 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
@@ -293,7 +293,7 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
[FixedPcd]
gSiPkgTokenSpaceGuid.PcdMchBaseAddress ## CONSUMES
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 0d9911496189..3ab9034934a5 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.UpXtreme]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -43,23 +43,23 @@ [FD.UpXtreme]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -160,8 +160,8 @@ [FD.UpXtreme]
# FSP_S Section
FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_S.fd
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
index e0db38194211..586e3488c2a7 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -34,8 +34,8 @@
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00190000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00320000 # Flash addr (0xFFB20000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00170000 #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00490000 # Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000B0000 #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00490000 # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x000B0000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00540000 # Flash addr (0xFFD40000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00070000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x005B0000 # Flash addr (0xFFDB0000)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
index ad32268a82ac..b39f4747a718 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.WhiskeylakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -43,23 +43,23 @@ [FD.WhiskeylakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -155,8 +155,8 @@ [FD.WhiskeylakeURvp]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
FV = FvPostMemory
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 16/35] CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (14 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 15/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 17/35] KabylakeSiliconPkg: " Michael Kubacki
` (19 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
The previous PCDs are removed from CoffeelakeSiliconPkg.dec.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 ++--
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 5 -----
2 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
index f793432bf049..ca57b5b31e0a 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
@@ -48,8 +48,8 @@ [Ppis]
gSiPreMemPolicyPpiGuid ## CONSUMES
[FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## Produces
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
index 6cf894498d6b..5ea6fbb28411 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
@@ -474,13 +474,8 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processor.
## Please refer to Processor BWG for detail.
##
-gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002
gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006
##
## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 17/35] KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (15 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 16/35] CoffeelakeSiliconPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 18/35] SimicsIch10Pkg: " Michael Kubacki
` (18 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 ++--
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 10 +++-------
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
index d3b4d9e318b8..3ca373a23c0a 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
@@ -45,8 +45,8 @@ [Ppis]
gSiPolicyPpiGuid ## CONSUMES
[FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
[Pcd]
gSiPkgTokenSpaceGuid.PcdSmmbaseSwSmi
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index 3881671757a3..5ff7b39ca60e 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -63,7 +63,7 @@ [Guids]
gEfiCapsuleVendorGuid = {0x711c703f, 0xc285, 0x4b10, {0xa3, 0xb0, 0x36, 0xec, 0xbd, 0x3c, 0x8b, 0xe2}}
gEfiConsoleOutDeviceGuid = {0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
##
-##
+##
##
gSmbiosProcessorInfoHobGuid = {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
gSmbiosCacheInfoHobGuid = {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x36, 0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7}}
@@ -264,7 +264,7 @@ [Protocols]
##
gEfiSmmVariableProtocolGuid = {0xed32d533, 0x99e6, 0x4209, {0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7}}
##
-##
+##
##
gSmbiosProcessorInfoHobGuid = {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
@@ -453,13 +453,9 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processor.
## Please refer to Processor BWG for detail.
##
-gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gSiPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006
+
##
## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
## value of the struct
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 18/35] SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (16 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 17/35] KabylakeSiliconPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 19/35] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are " Michael Kubacki
` (17 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
The previous PCDs are removed from Ich10Pkg.dec.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 2 +-
Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec | 6 ------
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 5 +++--
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index 3e7dffedfbe9..f2907ef53bfc 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -69,7 +69,7 @@ SpiProtocolConstructor (
SpiInstance->WritePermission));
//
- SpiInstance->TotalFlashSize = PcdGet32(PcdFlashAreaSize);
+ SpiInstance->TotalFlashSize = PcdGet32 (PcdBiosSize);
DEBUG ((DEBUG_INFO, "Total Flash Size : %0x\n", SpiInstance->TotalFlashSize));
return EFI_SUCCESS;
}
diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
index 0eb2e5530c3a..8d395a8b4370 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
+++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
@@ -16,11 +16,5 @@ [Includes]
[Ppis]
-[Guids]
- gEfiPchTokenSpaceGuid = { 0x89a1b278, 0xa1a1, 0x4df7, { 0xb1, 0x37, 0xde, 0x5a, 0xd7, 0xc4, 0x79, 0x13 } }
[Protocols]
gEfiSmmSpiProtocolGuid = {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0xb2, 0x6f, 0x1f, 0xc6, 0xb4, 0x37}}
-
-[PcdsFixedAtBuild]
- gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFFE00000|UINT32|0x10000001
- gEfiPchTokenSpaceGuid.PcdFlashAreaSize|0x00200000|UINT32|0x10000002
\ No newline at end of file
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index df1da274a642..b5aa13c1c56d 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -20,6 +20,7 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
SimicsIch10Pkg/Ich10Pkg.dec
[LibraryClasses]
@@ -27,5 +28,5 @@ [LibraryClasses]
DebugLib
[Pcd]
- gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
- gEfiPchTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 19/35] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (17 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 18/35] SimicsIch10Pkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 20/35] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
` (16 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Removes the PCDs from SiPkg.dec since they are defined in
IntelSiliconPkg.dec.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 5 -----
1 file changed, 5 deletions(-)
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
index 0c0f2db1048d..37f61cc5ee18 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
@@ -837,15 +837,10 @@ [PcdsFixedAtBuild]
## NOTE: The size restriction may be changed in next generation processor.
## Please refer to Processor BWG for detail.
##
-gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002
gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028
gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
gSiPkgTokenSpaceGuid.PcdTopMemoryCacheSize|0x0|UINT32|0x0001002A
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005
gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset|0x00000060|UINT32|0x30000013
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006
##
## The CPU Trace Hub's BARs base and size
##
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 20/35] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (18 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 19/35] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 21/35] KabylakeOpenBoardPkg: " Michael Kubacki
` (15 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel
Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
Deepika Kethi Reddy, Kathappan Esakkithevar
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates CometlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 +++++--
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 2 +-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
index 6de834565a7a..d34e7069c6f3 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
#######################################
# Platform Package
@@ -401,6 +401,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -421,7 +425,6 @@ [Components.X64]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
index 909f849eaa74..f2cdea0413d4 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -409,7 +409,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 21/35] KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (19 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 20/35] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 22/35] SimicsOpenBoardPkg: " Michael Kubacki
` (14 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Jeremy Soller
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates KabylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 10 +++++++---
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 10 +++++++---
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 2 +-
4 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index 862e6a6655a3..b2839325ff36 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -38,7 +38,8 @@ [Defines]
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -223,7 +224,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
#######################################
# Platform Package
@@ -372,6 +373,10 @@ [Components.X64]
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -388,7 +393,6 @@ [Components.X64]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index b91682f9ab97..1c10777afa0c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -403,7 +403,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 0b30da8f9665..bbbdb18a2e5f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -37,7 +37,8 @@ [Defines]
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -263,7 +264,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
#######################################
# Platform Package
@@ -451,6 +452,10 @@ [Components.X64]
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -467,7 +472,6 @@ [Components.X64]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
index c12d3f7d8d11..3dca05d54919 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
@@ -410,7 +410,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 22/35] SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (20 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 21/35] KabylakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 23/35] TigerlakeOpenBoardPkg: " Michael Kubacki
` (13 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates SimicsOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 9 ++++-----
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 77c408a326db..8a857c7d1827 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -42,7 +42,8 @@ [Defines]
DEFINE NETWORK_ISCSI_ENABLE = FALSE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include $(PROJECT)/OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -164,7 +165,7 @@ [LibraryClasses.common.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PCH_PKG)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
#######################################
# PEI Components
@@ -283,6 +284,7 @@ [Components.X64]
$(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf
$(PCH_PKG)/Spi/Smm/PchSpiSmm.inf
$(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
!endif
#####################################
@@ -290,9 +292,6 @@ [Components.X64]
#####################################
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
-!endif
#######################################
# Board Package
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 99bf60777553..1719513d3ac2 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -210,7 +210,7 @@ [FV.DXEFV]
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
INF BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 23/35] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (21 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 22/35] SimicsOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 24/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
` (12 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates TigerlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 +++++--
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 2 +-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
index a4265a839c75..bd2222c7f63f 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -173,7 +173,7 @@ [LibraryClasses.X64]
!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
[LibraryClasses.X64.DXE_SMM_DRIVER]
- SpiFlashCommonLib|$(PLATFORM_BOARD_PACKAGE)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
!if $(TARGET) == DEBUG
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
!endif
@@ -297,6 +297,10 @@ [Components.X64]
!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#
# SmmAccess
#
@@ -326,7 +330,6 @@ [Components.X64]
NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
}
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index 6b37e9a19c84..bdffa3a8a4b1 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -436,7 +436,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 24/35] WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (22 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 23/35] TigerlakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 25/35] MinPlatformPkg: Remove SpiFvbService modules Michael Kubacki
` (11 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates WhiskeylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 10 +++++++---
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf | 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | 10 +++++++---
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | 2 +-
4 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index fb493973e22d..43a244c5ed35 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -39,7 +39,8 @@ [Defines]
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -253,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
#######################################
# Platform Package
@@ -394,6 +395,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -414,7 +419,6 @@ [Components.X64]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 3ab9034934a5..15cf1d305d3c 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -415,7 +415,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 9a1f107fafe1..9f3954c82f5c 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -39,7 +39,8 @@ [Defines]
#
# Include PCD configuration for this board.
#
- !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+
!include OpenBoardPkgPcd.dsc
!include AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -253,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
#######################################
# Silicon Initialization Package
#######################################
- SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+ SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
#######################################
# Platform Package
@@ -400,6 +401,10 @@ [Components.X64]
$(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
$(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+ IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
#######################################
# Platform Package
#######################################
@@ -420,7 +425,6 @@ [Components.X64]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
$(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
index b39f4747a718..57cdd99b53ca 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
@@ -409,7 +409,7 @@ [FV.FvOsBootUncompact]
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 25/35] MinPlatformPkg: Remove SpiFvbService modules
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (23 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 24/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib Michael Kubacki
` (10 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Liming Gao, Eric Dong
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
SpiFvbServiceSmm and SpiFvbServiceStandaloneMm have moved to
IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c | 94 --
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c | 903 --------------------
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c | 271 ------
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c | 32 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c | 32 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h | 158 ----
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h | 22 -
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 68 --
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf | 67 --
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 -
10 files changed, 1649 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
deleted file mode 100644
index 7f2678fa9e5a..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/**@file
- Defines data structure that is the volume header found.
- These data is intent to decouple FVB driver with FV header.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-#define FIRMWARE_BLOCK_SIZE 0x10000
-#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE
-
-#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVariableBase)
-#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS BaseAddress;
- EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
- EFI_FV_BLOCK_MAP_ENTRY End[1];
-} EFI_FVB2_MEDIA_INFO;
-
-//
-// This data structure contains a template of all correct FV headers, which is used to restore
-// Fv header if it's corrupted.
-//
-EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
- //
- // Systen NvStorage FVB
- //
- {
- NV_STORAGE_BASE_ADDRESS,
- {
- {0,}, //ZeroVector[16]
- EFI_SYSTEM_NV_DATA_FV_GUID,
- FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
- EFI_FVH_SIGNATURE,
- 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
- sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
- 0, //CheckSum which will be calucated dynamically.
- 0, //ExtHeaderOffset
- {0,}, //Reserved[1]
- 2, //Revision
- {
- {
- SYSTEM_NV_BLOCK_NUM,
- FVB_MEDIA_BLOCK_SIZE,
- }
- }
- },
- {
- {
- 0,
- 0
- }
- }
- }
-};
-
-EFI_STATUS
-GetFvbInfo (
- IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
- OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
- )
-{
- UINTN Index;
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
-
- for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB2_MEDIA_INFO); Index++) {
- if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
- FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
-
- //
- // Update the checksum value of FV header.
- //
- FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader, FvHeader->HeaderLength);
-
- *FvbInfo = FvHeader;
-
- DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
- DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
- DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
- DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum));
- DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[0].NumBlocks));
- DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)->BlockMap[0].Length));
- DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[1].NumBlocks));
- DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbInfo)->BlockMap[1].Length));
-
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
deleted file mode 100644
index 113c749d04ff..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
+++ /dev/null
@@ -1,903 +0,0 @@
-/** @file
- Common driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-//
-// Global variable for this FVB driver which contains
-// the private data of all firmware volume block instances
-//
-FVB_GLOBAL mFvbModuleGlobal;
-
-//
-// This platform driver knows there are multiple FVs on FD.
-// Now we only provide FVs on Variable region and MicorCode region for performance issue.
-//
-FV_INFO mPlatformFvBaseAddress[] = {
- {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
- {0, 0}
-};
-
-FV_INFO mPlatformDefaultBaseAddress[] = {
- {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
- {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFlashFvMicrocodeSize)},
- {0, 0}
-};
-
-FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
- {
- {
- HARDWARE_DEVICE_PATH,
- HW_MEMMAP_DP,
- {
- (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
- (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
- }
- },
- EfiMemoryMappedIO,
- (EFI_PHYSICAL_ADDRESS) 0,
- (EFI_PHYSICAL_ADDRESS) 0,
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
- }
-};
-
-FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
- {
- {
- MEDIA_DEVICE_PATH,
- MEDIA_PIWG_FW_VOL_DP,
- {
- (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
- (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
- }
- },
- { 0 }
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
- }
-};
-
-//
-// Template structure used when installing FVB protocol
-//
-EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
- FvbProtocolGetAttributes,
- FvbProtocolSetAttributes,
- FvbProtocolGetPhysicalAddress,
- FvbProtocolGetBlockSize,
- FvbProtocolRead,
- FvbProtocolWrite,
- FvbProtocolEraseBlocks,
- NULL
-};
-
-/**
- Get the EFI_FVB_ATTRIBUTES_2 of a FV.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
-
- @return Attributes of the FV identified by FvbInstance.
-
-**/
-EFI_FVB_ATTRIBUTES_2
-FvbGetVolumeAttributes (
- IN EFI_FVB_INSTANCE *FvbInstance
- )
-{
- return FvbInstance->FvHeader.Attributes;
-}
-
-/**
- Retrieves the starting address of an LBA in an FV. It also
- return a few other attribut of the FV.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
- @param[in] Lba The logical block address
- @param[out] LbaAddress On output, contains the physical starting address
- of the Lba
- @param[out] LbaLength On output, contains the length of the block
- @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
- number of consecutive blocks starting with Lba is
- returned. All blocks in this range have a size of
- BlockSize
-
- @retval EFI_SUCCESS Successfully returns
- @retval EFI_INVALID_PARAMETER Instance not found
-
-**/
-EFI_STATUS
-FvbGetLbaAddress (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- OUT UINTN *LbaAddress,
- OUT UINTN *LbaLength,
- OUT UINTN *NumOfBlocks
- )
-{
- UINT32 NumBlocks;
- UINT32 BlockLength;
- UINTN Offset;
- EFI_LBA StartLba;
- EFI_LBA NextLba;
- EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
-
- StartLba = 0;
- Offset = 0;
- BlockMap = &(FvbInstance->FvHeader.BlockMap[0]);
-
- //
- // Parse the blockmap of the FV to find which map entry the Lba belongs to
- //
- while (TRUE) {
- NumBlocks = BlockMap->NumBlocks;
- BlockLength = BlockMap->Length;
-
- if ( NumBlocks == 0 || BlockLength == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- NextLba = StartLba + NumBlocks;
-
- //
- // The map entry found
- //
- if (Lba >= StartLba && Lba < NextLba) {
- Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
- if (LbaAddress ) {
- *LbaAddress = FvbInstance->FvBase + Offset;
- }
-
- if (LbaLength ) {
- *LbaLength = BlockLength;
- }
-
- if (NumOfBlocks ) {
- *NumOfBlocks = (UINTN)(NextLba - Lba);
- }
- return EFI_SUCCESS;
- }
-
- StartLba = NextLba;
- Offset = Offset + NumBlocks * BlockLength;
- BlockMap++;
- }
-}
-
-/**
- Reads specified number of bytes into a buffer from the specified block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The logical block address to be read from
- @param[in] BlockOffset Offset into the block at which to begin reading
- @param[in] NumBytes Pointer that on input contains the total size of
- the buffer. On output, it contains the total number
- of bytes read
- @param[in] Buffer Pointer to a caller allocated buffer that will be
- used to hold the data read
-
-
- @retval EFI_SUCCESS The firmware volume was read successfully and
- contents are in Buffer
- @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
- NumBytes contains the total number of bytes returned
- in Buffer
- @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be read
- @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
-
-**/
-EFI_STATUS
-FvbReadBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- IN UINTN BlockOffset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
- BOOLEAN BadBufferSize = FALSE;
-
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
- if (*NumBytes == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Attributes = FvbGetVolumeAttributes (FvbInstance);
-
- if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
- return EFI_ACCESS_DENIED;
- }
-
- if (BlockOffset > LbaLength) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (LbaLength < (*NumBytes + BlockOffset)) {
- DEBUG ((DEBUG_INFO,
- "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
- *NumBytes,
- (UINT32)(LbaLength - BlockOffset))
- );
- *NumBytes = (UINT32) (LbaLength - BlockOffset);
- BadBufferSize = TRUE;
- }
-
- Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
-
- if (!EFI_ERROR (Status) && BadBufferSize) {
- return EFI_BAD_BUFFER_SIZE;
- } else {
- return Status;
- }
-}
-
-/**
- Writes specified number of bytes from the input buffer to the block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The starting logical block index to write to
- @param[in] BlockOffset Offset into the block at which to begin writing
- @param[in] NumBytes Pointer that on input contains the total size of
- the buffer. On output, it contains the total number
- of bytes actually written
- @param[in] Buffer Pointer to a caller allocated buffer that contains
- the source for the write
- @retval EFI_SUCCESS The firmware volume was written successfully
- @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
- NumBytes contains the total number of bytes
- actually written
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be written
- @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
-
-**/
-EFI_STATUS
-FvbWriteBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba,
- IN UINTN BlockOffset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
- BOOLEAN BadBufferSize = FALSE;
-
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
- if (*NumBytes == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- //
- // Check if the FV is write enabled
- //
- Attributes = FvbGetVolumeAttributes (FvbInstance);
- if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // Perform boundary checks and adjust NumBytes
- //
- if (BlockOffset > LbaLength) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (LbaLength < (*NumBytes + BlockOffset)) {
- DEBUG ((DEBUG_INFO,
- "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
- *NumBytes,
- (UINT32)(LbaLength - BlockOffset))
- );
- *NumBytes = (UINT32) (LbaLength - BlockOffset);
- BadBufferSize = TRUE;
- }
-
- Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), *NumBytes);
-
- if (!EFI_ERROR (Status) && BadBufferSize) {
- return EFI_BAD_BUFFER_SIZE;
- } else {
- return Status;
- }
-}
-
-
-
-/**
- Erases and initializes a firmware volume block.
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE
- @param[in] Lba The logical block index to be erased
-
- @retval EFI_SUCCESS The erase request was successfully completed
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be written. Firmware device may have been
- partially erased
- @retval EFI_INVALID_PARAMETER Instance not found
-
-**/
-EFI_STATUS
-FvbEraseBlock (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN EFI_LBA Lba
- )
-{
-
- EFI_FVB_ATTRIBUTES_2 Attributes;
- UINTN LbaAddress;
- UINTN LbaLength;
- EFI_STATUS Status;
-
- //
- // Check if the FV is write enabled
- //
- Attributes = FvbGetVolumeAttributes (FvbInstance);
-
- if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
- return EFI_ACCESS_DENIED;
- }
-
- //
- // Get the starting address of the block for erase.
- //
- Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
-
- return Status;
-}
-
-/**
- Modifies the current settings of the firmware volume according to the
- input parameter, and returns the new setting of the volume
-
- @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE.
- @param[in] Attributes On input, it is a pointer to EFI_FVB_ATTRIBUTES_2
- containing the desired firmware volume settings.
- On successful return, it contains the new settings
- of the firmware volume
-
- @retval EFI_SUCCESS Successfully returns
- @retval EFI_ACCESS_DENIED The volume setting is locked and cannot be modified
- @retval EFI_INVALID_PARAMETER Instance not found, or The attributes requested are
- in conflict with the capabilities as declared in the
- firmware volume header
-
-**/
-EFI_STATUS
-FvbSetVolumeAttributes (
- IN EFI_FVB_INSTANCE *FvbInstance,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_FVB_ATTRIBUTES_2 OldAttributes;
- EFI_FVB_ATTRIBUTES_2 *AttribPtr;
- EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
- UINT32 Capabilities;
- UINT32 OldStatus, NewStatus;
-
- AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attributes);
- OldAttributes = *AttribPtr;
- Capabilities = OldAttributes & EFI_FVB2_CAPABILITIES;
- OldStatus = OldAttributes & EFI_FVB2_STATUS;
- NewStatus = *Attributes & EFI_FVB2_STATUS;
-
- UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP | \
- EFI_FVB2_READ_ENABLED_CAP | \
- EFI_FVB2_WRITE_DISABLED_CAP | \
- EFI_FVB2_WRITE_ENABLED_CAP | \
- EFI_FVB2_LOCK_CAP | \
- EFI_FVB2_STICKY_WRITE | \
- EFI_FVB2_MEMORY_MAPPED | \
- EFI_FVB2_ERASE_POLARITY | \
- EFI_FVB2_READ_LOCK_CAP | \
- EFI_FVB2_WRITE_LOCK_CAP | \
- EFI_FVB2_ALIGNMENT;
-
- //
- // Some attributes of FV is read only can *not* be set
- //
- if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAttributes)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // If firmware volume is locked, no status bit can be updated
- //
- if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
- if ( OldStatus ^ NewStatus ) {
- return EFI_ACCESS_DENIED;
- }
- }
-
- //
- // Test read disable
- //
- if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
- if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test read enable
- //
- if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
- if (NewStatus & EFI_FVB2_READ_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test write disable
- //
- if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
- if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test write enable
- //
- if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
- if (NewStatus & EFI_FVB2_WRITE_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- //
- // Test lock
- //
- if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
- if (NewStatus & EFI_FVB2_LOCK_STATUS) {
- return EFI_INVALID_PARAMETER;
- }
- }
-
- *AttribPtr = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
- *AttribPtr = (*AttribPtr) | NewStatus;
- *Attributes = *AttribPtr;
-
- return EFI_SUCCESS;
-}
-
-/**
- Check the integrity of firmware volume header
-
- @param[in] FvHeader A pointer to a firmware volume header
-
- @retval TRUE The firmware volume is consistent
- @retval FALSE The firmware volume has corrupted.
-
-**/
-BOOLEAN
-IsFvHeaderValid (
- IN EFI_PHYSICAL_ADDRESS FvBase,
- IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader
- )
-{
- if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
- if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
- return FALSE;
- }
- } else {
- if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
- return FALSE;
- }
- }
- if ( (FvHeader->Revision != EFI_FVH_REVISION) ||
- (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
- (FvHeader->FvLength == ((UINTN) -1)) ||
- ((FvHeader->HeaderLength & 0x01 ) !=0) ) {
- return FALSE;
- }
-
- if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != 0) {
- return FALSE;
- }
-
- return TRUE;
-}
-
-//
-// FVB protocol APIs
-//
-
-/**
- Retrieves the physical address of the device.
-
- @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
- @param[out] Address Output buffer containing the address.
-
- retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- *Address = FvbInstance->FvBase;
-
- return EFI_SUCCESS;
-}
-
-/**
- Retrieve the size of a logical block
-
- @param[in] This Calling context
- @param[in] Lba Indicates which block to return the size for.
- @param[out] BlockSize A pointer to a caller allocated UINTN in which
- the size of the block is returned
- @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
- number of consecutive blocks starting with Lba is
- returned. All blocks in this range have a size of
- BlockSize
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetBlockSize (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- OUT UINTN *BlockSize,
- OUT UINTN *NumOfBlocks
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x%x\n",
- Lba,
- BlockSize,
- NumOfBlocks)
- );
-
- return FvbGetLbaAddress (
- FvbInstance,
- Lba,
- NULL,
- BlockSize,
- NumOfBlocks
- );
-}
-
-/**
- Retrieves Volume attributes. No polarity translations are done.
-
- @param[in] This Calling context
- @param[out] Attributes Output buffer which contains attributes
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- *Attributes = FvbGetVolumeAttributes (FvbInstance);
-
- DEBUG ((DEBUG_INFO,
- "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- return EFI_SUCCESS;
-}
-
-/**
- Sets Volume attributes. No polarity translations are done.
-
- @param[in] This Calling context
- @param[out] Attributes Output buffer which contains attributes
-
- @retval EFI_SUCCESS The function always return successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- )
-{
- EFI_STATUS Status;
- EFI_FVB_INSTANCE *FvbInstance;
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n",
- This,
- *Attributes)
- );
-
- return Status;
-}
-
-/**
- The EraseBlock() function erases one or more blocks as denoted by the
- variable argument list. The entire parameter list of blocks must be verified
- prior to erasing any blocks. If a block is requested that does not exist
- within the associated firmware volume (it has a larger index than the last
- block of the firmware volume), the EraseBlock() function must return
- EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
-
- @param[in] This Calling context
- @param[in] ... Starting LBA followed by Number of Lba to erase.
- a -1 to terminate the list.
-
- @retval EFI_SUCCESS The erase request was successfully completed
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be written. Firmware device may have been
- partially erased
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolEraseBlocks (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- ...
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- UINTN NumOfBlocks;
- VA_LIST Args;
- EFI_LBA StartingLba;
- UINTN NumOfLba;
- EFI_STATUS Status;
-
- DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- NumOfBlocks = FvbInstance->NumOfBlocks;
-
- VA_START (Args, This);
-
- do {
- StartingLba = VA_ARG (Args, EFI_LBA);
- if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
- break;
- }
-
- NumOfLba = VA_ARG (Args, UINT32);
-
- //
- // Check input parameters
- //
- if (NumOfLba == 0) {
- VA_END (Args);
- return EFI_INVALID_PARAMETER;
- }
-
- if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
- return EFI_INVALID_PARAMETER;
- }
- } while ( 1 );
-
- VA_END (Args);
-
- VA_START (Args, This);
- do {
- StartingLba = VA_ARG (Args, EFI_LBA);
- if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
- break;
- }
-
- NumOfLba = VA_ARG (Args, UINT32);
-
- while ( NumOfLba > 0 ) {
- Status = FvbEraseBlock (FvbInstance, StartingLba);
- if ( EFI_ERROR(Status)) {
- VA_END (Args);
- return Status;
- }
- StartingLba ++;
- NumOfLba --;
- }
-
- } while ( 1 );
-
- VA_END (Args);
-
- return EFI_SUCCESS;
-}
-
-/**
- Writes data beginning at Lba:Offset from FV. The write terminates either
- when *NumBytes of data have been written, or when a block boundary is
- reached. *NumBytes is updated to reflect the actual number of bytes
- written. The write opertion does not include erase. This routine will
- attempt to write only the specified bytes. If the writes do not stick,
- it will return an error.
-
- @param[in] This Calling context
- @param[in] Lba Block in which to begin write
- @param[in] Offset Offset in the block at which to begin write
- @param[in,out] NumBytes On input, indicates the requested write size. On
- output, indicates the actual number of bytes written
- @param[in] Buffer Buffer containing source data for the write.
-
- @retval EFI_SUCCESS The firmware volume was written successfully
- @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
- NumBytes contains the total number of bytes
- actually written
- @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be written
- @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolWrite (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
-
- DEBUG((DEBUG_INFO,
- "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
- Lba,
- Offset,
- *NumBytes,
- Buffer)
- );
-
- return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
-}
-
-/**
- Reads data beginning at Lba:Offset from FV. The Read terminates either
- when *NumBytes of data have been read, or when a block boundary is
- reached. *NumBytes is updated to reflect the actual number of bytes
- written. The write opertion does not include erase. This routine will
- attempt to write only the specified bytes. If the writes do not stick,
- it will return an error.
-
- @param[in] This Calling context
- @param[in] Lba Block in which to begin write
- @param[in] Offset Offset in the block at which to begin write
- @param[in,out] NumBytes On input, indicates the requested write size. On
- output, indicates the actual number of bytes written
- @param[in] Buffer Buffer containing source data for the write.
-
- @retval EFI_SUCCESS The firmware volume was read successfully and
- contents are in Buffer
- @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
- NumBytes contains the total number of bytes returned
- in Buffer
- @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
- @retval EFI_DEVICE_ERROR The block device is not functioning correctly and
- could not be read
- @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
-
-**/
-EFI_STATUS
-EFIAPI
-FvbProtocolRead (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- EFI_STATUS Status;
-
- FvbInstance = FVB_INSTANCE_FROM_THIS (This);
- Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
- DEBUG((DEBUG_INFO,
- "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
- Lba,
- Offset,
- *NumBytes,
- Buffer)
- );
-
- return Status;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
deleted file mode 100644
index 016f19587c91..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
-
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include <Library/MmServicesTableLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Protocol/SmmFirmwareVolumeBlock.h>
-
-/**
- The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
- for each FV in the system.
-
- @param[in] FvbInstance The pointer to a FW volume instance structure,
- which contains the information about one FV.
-
- @retval VOID
-
-**/
-VOID
-InstallFvbProtocol (
- IN EFI_FVB_INSTANCE *FvbInstance
- )
-{
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
- EFI_STATUS Status;
- EFI_HANDLE FvbHandle;
-
- ASSERT (FvbInstance != NULL);
- if (FvbInstance == NULL) {
- return;
- }
-
- CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
-
- FvHeader = &FvbInstance->FvHeader;
- if (FvHeader == NULL) {
- return;
- }
-
- //
- // Set up the devicepath
- //
- DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\n", FvbInstance->FvBase));
- if (FvHeader->ExtHeaderOffset == 0) {
- //
- // FV does not contains extension header, then produce MEMMAP_DEVICE_PATH
- //
- FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
- if (FvbInstance->DevicePath == NULL) {
- DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMAP_DEVICE_PATH failed\n"));
- return;
- }
- ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.StartingAddress = FvbInstance->FvBase;
- ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.EndingAddress = FvbInstance->FvBase + FvHeader->FvLength - 1;
- } else {
- FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
- if (FvbInstance->DevicePath == NULL) {
- DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PIWG_DEVICE_PATH failed\n"));
- return;
- }
- CopyGuid (
- &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName,
- (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
- );
- }
-
- //
- // LocateDevicePath fails so install a new interface and device path
- //
- FvbHandle = NULL;
-
- Status = gMmst->MmInstallProtocolInterface (
- &FvbHandle,
- &gEfiSmmFirmwareVolumeBlockProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &(FvbInstance->FvbProtocol)
- );
- ASSERT_EFI_ERROR (Status);
-
- Status = gMmst->MmInstallProtocolInterface (
- &FvbHandle,
- &gEfiDevicePathProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &(FvbInstance->DevicePath)
- );
- ASSERT_EFI_ERROR (Status);
-}
-
-/**
- The function does the necessary initialization work for
- Firmware Volume Block Driver.
-
-**/
-VOID
-FvbInitialize (
- VOID
- )
-{
- EFI_FVB_INSTANCE *FvbInstance;
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
- EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
- EFI_PHYSICAL_ADDRESS BaseAddress;
- EFI_STATUS Status;
- UINTN BufferSize;
- UINTN Idx;
- UINT32 MaxLbaSize;
- UINT32 BytesWritten;
- UINTN BytesErased;
-
- mPlatformFvBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
- mPlatformFvBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
- mPlatformFvBaseAddress[1].FvBase = PcdGet32(PcdFlashFvMicrocodeBase);
- mPlatformFvBaseAddress[1].FvSize = PcdGet32(PcdFlashFvMicrocodeSize);
- mPlatformDefaultBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
- mPlatformDefaultBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
- mPlatformDefaultBaseAddress[1].FvBase = PcdGet32(PcdFlashFvMicrocodeBase);
- mPlatformDefaultBaseAddress[1].FvSize = PcdGet32(PcdFlashFvMicrocodeSize);
-
- //
- // We will only continue with FVB installation if the
- // SPI is the active BIOS state
- //
- {
- //
- // Make sure all FVB are valid and/or fix if possible
- //
- for (Idx = 0;; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
- break;
- }
-
- BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- BytesWritten = 0;
- BytesErased = 0;
- DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
- Status = GetFvbInfo (BaseAddress, &FvHeader);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x. GetFvbInfo Status %r\n", BaseAddress, Status));
- continue;
- }
- DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\n", BaseAddress));
- //
- // Spi erase
- //
- BytesErased = (UINTN) FvHeader->BlockMap->Length;
- Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", Status));
- continue;
- }
- if (BytesErased != FvHeader->BlockMap->Length) {
- DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader->BlockMap->Length\n"));
- DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n", BytesErased, FvHeader->BlockMap->Length));
- continue;
- }
- BytesWritten = FvHeader->HeaderLength;
- Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT8*)FvHeader);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status));
- continue;
- }
- if (BytesWritten != FvHeader->HeaderLength) {
- DEBUG ((DEBUG_WARN, "ERROR - BytesWritten != HeaderLength\n"));
- DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength = 0x%X\n", BytesWritten, FvHeader->HeaderLength));
- continue;
- }
- Status = SpiFlashLock ();
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status));
- continue;
- }
- DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n", BaseAddress));
- //
- // Clear cache for this range.
- //
- WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, FvHeader->BlockMap->Length);
- }
- }
-
- //
- // Calculate the total size for all firmware volume block instances
- //
- BufferSize = 0;
- for (Idx = 0; ; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
- break;
- }
- BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
- continue;
- }
-
- BufferSize += (FvHeader->HeaderLength +
- sizeof (EFI_FVB_INSTANCE) -
- sizeof (EFI_FIRMWARE_VOLUME_HEADER)
- );
- }
-
- mFvbModuleGlobal.FvbInstance = (EFI_FVB_INSTANCE *) AllocateRuntimeZeroPool (BufferSize);
- if (mFvbModuleGlobal.FvbInstance == NULL) {
- ASSERT (FALSE);
- return;
- }
-
- MaxLbaSize = 0;
- FvbInstance = mFvbModuleGlobal.FvbInstance;
- mFvbModuleGlobal.NumFv = 0;
-
- for (Idx = 0; ; Idx++) {
- if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
- break;
- }
- BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
-
- if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
- DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
- continue;
- }
-
- FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
- CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength);
-
- FvHeader = &(FvbInstance->FvHeader);
- FvbInstance->FvBase = (UINTN)BaseAddress;
-
- //
- // Process the block map for each FV
- //
- FvbInstance->NumOfBlocks = 0;
- for (PtrBlockMapEntry = FvHeader->BlockMap;
- PtrBlockMapEntry->NumBlocks != 0;
- PtrBlockMapEntry++) {
- //
- // Get the maximum size of a block.
- //
- if (MaxLbaSize < PtrBlockMapEntry->Length) {
- MaxLbaSize = PtrBlockMapEntry->Length;
- }
- FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
- }
-
- //
- // Add a FVB Protocol Instance
- //
- InstallFvbProtocol (FvbInstance);
- mFvbModuleGlobal.NumFv++;
-
- //
- // Move on to the next FvbInstance
- //
- FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) +
- FvHeader->HeaderLength +
- (sizeof (EFI_FVB_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
-
- }
- }
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
deleted file mode 100644
index 252c818d6551..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include "SpiFvbServiceMm.h"
-
-/**
- The driver Standalone MM entry point.
-
- @param[in] ImageHandle Image handle of this driver.
- @param[in] MmSystemTable A pointer to the MM system table.
-
- @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFvbStandaloneMmInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_MM_SYSTEM_TABLE *MmSystemTable
- )
-{
- FvbInitialize ();
-
- return EFI_SUCCESS;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
deleted file mode 100644
index 1c2dac70e3c6..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
- MM driver source for several Serial Flash devices
- which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-#include "SpiFvbServiceMm.h"
-
-/**
- The driver Traditional MM entry point.
-
- @param[in] ImageHandle Image handle of this driver.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS This function always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFvbTraditionalMmInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- FvbInitialize ();
-
- return EFI_SUCCESS;
-}
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
deleted file mode 100644
index e9d69e985814..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/** @file
- Common source definitions used in serial flash drivers
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SPI_FVB_SERVICE_COMMON_H
-#define _SPI_FVB_SERVICE_COMMON_H
-
-#include <Guid/EventGroup.h>
-#include <Guid/FirmwareFileSystem2.h>
-#include <Guid/SystemNvDataGuid.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/FirmwareVolumeBlock.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/IoLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/HobLib.h>
-
-#include <Library/SpiFlashCommonLib.h>
-
-//
-// Define two helper macro to extract the Capability field or Status field in FVB
-// bit fields
-//
-#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
- EFI_FVB2_READ_ENABLED_CAP | \
- EFI_FVB2_WRITE_DISABLED_CAP | \
- EFI_FVB2_WRITE_ENABLED_CAP | \
- EFI_FVB2_LOCK_CAP \
- )
-
-#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
-
-#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I')
-
-typedef struct {
- UINT32 Signature;
- UINTN FvBase;
- UINTN NumOfBlocks;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol;
- EFI_FIRMWARE_VOLUME_HEADER FvHeader;
-} EFI_FVB_INSTANCE;
-
-typedef struct {
- EFI_FVB_INSTANCE *FvbInstance;
- UINT32 NumFv;
-} FVB_GLOBAL;
-
-//
-// Fvb Protocol instance data
-//
-#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, FVB_INSTANCE_SIGNATURE)
-
-typedef struct {
- MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;
-} FV_PIWG_DEVICE_PATH;
-
-typedef struct {
- MEMMAP_DEVICE_PATH MemMapDevPath;
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;
-} FV_MEMMAP_DEVICE_PATH;
-
-typedef struct {
- UINT32 FvBase;
- UINT32 FvSize;
-} FV_INFO;
-
-//
-// Protocol APIs
-//
-EFI_STATUS
-EFIAPI
-FvbProtocolGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolGetBlockSize (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- OUT UINTN *BlockSize,
- OUT UINTN *NumOfBlocks
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolRead (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- OUT UINT8 *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolWrite (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN OUT UINTN *NumBytes,
- IN UINT8 *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-FvbProtocolEraseBlocks (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
- ...
- );
-
-BOOLEAN
-IsFvHeaderValid (
- IN EFI_PHYSICAL_ADDRESS FvBase,
- IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
- );
-
-EFI_STATUS
-GetFvbInfo (
- IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
- OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
- );
-
-extern FVB_GLOBAL mFvbModuleGlobal;
-extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
-extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
-extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
-extern FV_INFO mPlatformFvBaseAddress[];
-extern FV_INFO mPlatformDefaultBaseAddress[];
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
deleted file mode 100644
index 36af1130c8ee..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/** @file
- Definitions common to MM implementation in this driver.
-
- Copyright (c) Microsoft Corporation.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SPI_FVB_SERVICE_MM_H_
-#define _SPI_FVB_SERVICE_MM_H_
-
-/**
- The function does the necessary initialization work for
- Firmware Volume Block Driver.
-
-**/
-VOID
-FvbInitialize (
- VOID
- );
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
deleted file mode 100644
index 10e51e11756f..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+++ /dev/null
@@ -1,68 +0,0 @@
-### @file
-# Component description file for the Serial Flash device Runtime driver.
-#
-# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) Microsoft Corporation.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SpiFvbServiceSmm
- FILE_GUID = 68A10D85-6858-4402-B070-028B3EA21747
- VERSION_STRING = 1.0
- MODULE_TYPE = DXE_SMM_DRIVER
- PI_SPECIFICATION_VERSION = 1.10
- ENTRY_POINT = SpiFvbTraditionalMmInitialize
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- PcdLib
- MemoryAllocationLib
- CacheMaintenanceLib
- BaseMemoryLib
- DebugLib
- BaseLib
- UefiBootServicesTableLib
- UefiDriverEntryPoint
- SpiFlashCommonLib
- MmServicesTableLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUMES
-
-[Sources]
- FvbInfo.c
- SpiFvbServiceCommon.h
- SpiFvbServiceCommon.c
- SpiFvbServiceMm.h
- SpiFvbServiceMm.c
- SpiFvbServiceTraditionalMm.c
-
-[Protocols]
- gEfiDevicePathProtocolGuid ## PRODUCES
- gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
-
-[Guids]
- gEfiFirmwareFileSystem2Guid ## CONSUMES
- gEfiSystemNvDataFvGuid ## CONSUMES
-
-[Depex]
- TRUE
diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
deleted file mode 100644
index 9f08d3673f41..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
+++ /dev/null
@@ -1,67 +0,0 @@
-### @file
-# Component description file for the Serial Flash device Standalone MM driver.
-#
-# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) Microsoft Corporation.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION = 0x0001001B
- BASE_NAME = SpiFvbServiceStandaloneMm
- FILE_GUID = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
- VERSION_STRING = 1.0
- MODULE_TYPE = MM_STANDALONE
- PI_SPECIFICATION_VERSION = 0x00010032
- ENTRY_POINT = SpiFvbStandaloneMmInitialize
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- CacheMaintenanceLib
- DebugLib
- MemoryAllocationLib
- PcdLib
- MmServicesTableLib
- SpiFlashCommonLib
- StandaloneMmDriverEntryPoint
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUMES
-
-[Sources]
- FvbInfo.c
- SpiFvbServiceCommon.h
- SpiFvbServiceCommon.c
- SpiFvbServiceMm.h
- SpiFvbServiceMm.c
- SpiFvbServiceStandaloneMm.c
-
-[Protocols]
- gEfiDevicePathProtocolGuid ## PRODUCES
- gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES
-
-[Guids]
- gEfiFirmwareFileSystem2Guid ## CONSUMES
- gEfiSystemNvDataFvGuid ## CONSUMES
-
-[Depex]
- TRUE
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 707686055c59..86ae30a5360a 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -159,8 +159,6 @@ [Components]
MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
- MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
- MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (24 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 25/35] MinPlatformPkg: Remove SpiFvbService modules Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` Michael Kubacki
` (9 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 --------------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h | 98 ----------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 51 -----
4 files changed, 399 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 53711db6325f..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/** @file
- Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
- for module use.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <PchAccess.h>
-#include <Library/MmPciLib.h>
-#include <Protocol/Spi.h>
-
-
-PCH_SPI_PROTOCOL *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress = 0;
-UINTN mFlashAreaSize = 0;
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This function is implemented specifically for those platforms
- // at which the SPI device is memory mapped for read. So this
- // function just do a memory copy for Spi Flash Read.
- //
- CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINT32 Length;
- UINT32 RemainingBytes;
-
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mFlashAreaBaseAddress);
-
- Offset = Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- while (RemainingBytes > 0) {
- if (RemainingBytes > SECTOR_SIZE_4KB) {
- Length = SECTOR_SIZE_4KB;
- } else {
- Length = RemainingBytes;
- }
- Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
- RemainingBytes -= Length;
- Offset += Length;
- Buffer += Length;
- }
-
- //
- // Actual number of bytes written
- //
- *NumBytes -= RemainingBytes;
-
- return Status;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINTN RemainingBytes;
-
- ASSERT (NumBytes != NULL);
- if (NumBytes == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mFlashAreaBaseAddress);
-
- Offset = Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
- ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- Status = mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
- return Status;
-}
-
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
deleted file mode 100644
index 43c0218d85df..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/** @file
- SMM Library instance of SPI Flash Common Library Class
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
-
-extern PCH_SPI_PROTOCOL *mSpiProtocol;
-
-extern UINTN mFlashAreaBaseAddress;
-extern UINTN mFlashAreaSize;
-
-/**
- The library constructuor.
-
- The function does the necessary initialization work for this library
- instance.
-
- @param[in] ImageHandle The firmware allocated handle for the UEFI image.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
- It will ASSERT on error for debug version.
- @retval EFI_ERROR Please reference LocateProtocol for error code details.
-**/
-EFI_STATUS
-EFIAPI
-SmmSpiFlashCommonLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- mFlashAreaBaseAddress = (UINTN)PcdGet32 (PcdBiosAreaBaseAddress);
- mFlashAreaSize = (UINTN)PcdGet32 (PcdBiosSize);
-
- //
- // Locate the SMM SPI protocol.
- //
- Status = gSmst->SmmLocateProtocol (
- &gPchSmmSpiProtocolGuid,
- NULL,
- (VOID **) &mSpiProtocol
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
deleted file mode 100644
index 53c11bb59ac6..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
deleted file mode 100644
index abc919867ca2..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+++ /dev/null
@@ -1,51 +0,0 @@
-## @file
-# SMM Library instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SmmSpiFlashCommonLib
- FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47
- VERSION_STRING = 1.0
- MODULE_TYPE = DXE_SMM_DRIVER
- LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
- CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- PciLib
- IoLib
- MemoryAllocationLib
- BaseLib
- UefiLib
- SmmServicesTableLib
- BaseMemoryLib
- DebugLib
- MmPciLib
-
-[Packages]
- MdePkg/MdePkg.dec
- CoffeelakeSiliconPkg/SiPkg.dec
-
-[Pcd]
- gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
-
-[Sources]
- SpiFlashCommonSmmLib.c
- SpiFlashCommon.c
-
-[Protocols]
- gPchSmmSpiProtocolGuid ## CONSUMES
-
-[Depex.X64.DXE_SMM_DRIVER]
- gPchSmmSpiProtocolGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (25 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-19 9:07 ` Chiu, Chasel
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 28/35] SimicsIch10Pkg: " Michael Kubacki
` (8 subsequent siblings)
35 siblings, 1 reply; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 --------------------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ------
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h | 98 ----------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 53 ------
4 files changed, 401 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 7ee7ffab5001..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/** @file
- Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
- for module use.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <PchAccess.h>
-#include <Library/MmPciLib.h>
-#include <Protocol/Spi.h>
-
-
-PCH_SPI_PROTOCOL *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress = 0;
-UINTN mFlashAreaSize = 0;
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This function is implemented specifically for those platforms
- // at which the SPI device is memory mapped for read. So this
- // function just do a memory copy for Spi Flash Read.
- //
- CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINT32 Length;
- UINT32 RemainingBytes;
-
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mFlashAreaBaseAddress);
-
- Offset = Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- while (RemainingBytes > 0) {
- if (RemainingBytes > SECTOR_SIZE_4KB) {
- Length = SECTOR_SIZE_4KB;
- } else {
- Length = RemainingBytes;
- }
- Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
- RemainingBytes -= Length;
- Offset += Length;
- Buffer += Length;
- }
-
- //
- // Actual number of bytes written
- //
- *NumBytes -= RemainingBytes;
-
- return Status;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINTN RemainingBytes;
-
- ASSERT (NumBytes != NULL);
- if (NumBytes == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mFlashAreaBaseAddress);
-
- Offset = Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
- ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- Status = mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
- return Status;
-}
-
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
deleted file mode 100644
index 11133163d2d4..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/** @file
- SMM Library instance of SPI Flash Common Library Class
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
-
-extern PCH_SPI_PROTOCOL *mSpiProtocol;
-
-extern UINTN mFlashAreaBaseAddress;
-extern UINTN mFlashAreaSize;
-
-/**
- The library constructuor.
-
- The function does the necessary initialization work for this library
- instance.
-
- @param[in] ImageHandle The firmware allocated handle for the UEFI image.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
- It will ASSERT on error for debug version.
- @retval EFI_ERROR Please reference LocateProtocol for error code details.
-**/
-EFI_STATUS
-EFIAPI
-SmmSpiFlashCommonLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- mFlashAreaBaseAddress = (UINTN)PcdGet32 (PcdFlashAreaBaseAddress);
- mFlashAreaSize = (UINTN)PcdGet32 (PcdFlashAreaSize);
-
- //
- // Locate the SMM SPI protocol.
- //
- Status = gSmst->SmmLocateProtocol (
- &gPchSmmSpiProtocolGuid,
- NULL,
- (VOID **) &mSpiProtocol
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
deleted file mode 100644
index 0c5e72258c2d..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
deleted file mode 100644
index d712b9e5f769..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+++ /dev/null
@@ -1,53 +0,0 @@
-### @file
-# SMM Library instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SmmSpiFlashCommonLib
- FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47
- VERSION_STRING = 1.0
- MODULE_TYPE = DXE_SMM_DRIVER
- LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
- CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- PciLib
- IoLib
- MemoryAllocationLib
- BaseLib
- UefiLib
- SmmServicesTableLib
- BaseMemoryLib
- DebugLib
- MmPciLib
-
-[Packages]
- MdePkg/MdePkg.dec
- KabylakeSiliconPkg/SiPkg.dec
-
-[Pcd]
- gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosGuardEnable ## CONSUMES
-
-[Sources]
- SpiFlashCommonSmmLib.c
- SpiFlashCommon.c
-
-[Protocols]
- gPchSmmSpiProtocolGuid ## CONSUMES
- gSmmBiosGuardProtocolGuid ## CONSUMES
-
-[Depex.X64.DXE_SMM_DRIVER]
- gPchSmmSpiProtocolGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* Re: [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
2021-04-16 2:31 ` Michael Kubacki
@ 2021-04-19 9:07 ` Chiu, Chasel
2021-04-19 21:21 ` [edk2-devel] " Michael Kubacki
0 siblings, 1 reply; 44+ messages in thread
From: Chiu, Chasel @ 2021-04-19 9:07 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io; +Cc: Chaganty, Rangasai V
Hi Michael,
Please rename subject to "KabylakeSiliconPkg".
With above change, Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Thanks,
Chasel
> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Friday, April 16, 2021 10:32 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove
> SmmSpiFlashCommonLib
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>
> The library has been consolidated with instances in other Intel silicon packages
> as a single instance in IntelSiliconPkg
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> ---
>
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashC
> ommon.c | 196 --------------------
>
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashC
> ommonSmmLib.c | 54 ------
> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
> | 98 ----------
>
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFl
> ashCommonLib.inf | 53 ------
> 4 files changed, 401 deletions(-)
>
> diff --git
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
> hCommon.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
> hCommon.c
> deleted file mode 100644
> index 7ee7ffab5001..000000000000
> ---
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
> hCommon.c
> +++ /dev/null
> @@ -1,196 +0,0 @@
> -/** @file
> - Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
> - for module use.
> -
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> -SPDX-License-Identifier: BSD-2-Clause-Patent
> -
> -**/
> -
> -#include <Library/SpiFlashCommonLib.h>
> -#include <Library/IoLib.h>
> -#include <Library/PciLib.h>
> -#include <PchAccess.h>
> -#include <Library/MmPciLib.h>
> -#include <Protocol/Spi.h>
> -
> -
> -PCH_SPI_PROTOCOL *mSpiProtocol;
> -
> -//
> -// FlashAreaBaseAddress and Size for boottime and runtime usage.
> -//
> -UINTN mFlashAreaBaseAddress = 0;
> -UINTN mFlashAreaSize = 0;
> -
> -/**
> - Enable block protection on the Serial Flash device.
> -
> - @retval EFI_SUCCESS Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashLock (
> - VOID
> - )
> -{
> - return EFI_SUCCESS;
> -}
> -
> -/**
> - Read NumBytes bytes of data from the address specified by
> - PAddress into Buffer.
> -
> - @param[in] Address The starting physical address of the read.
> - @param[in,out] NumBytes On input, the number of bytes to read. On
> output, the number
> - of bytes actually read.
> - @param[out] Buffer The destination data buffer for the read.
> -
> - @retval EFI_SUCCESS Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashRead (
> - IN UINTN Address,
> - IN OUT UINT32 *NumBytes,
> - OUT UINT8 *Buffer
> - )
> -{
> - ASSERT ((NumBytes != NULL) && (Buffer != NULL));
> - if ((NumBytes == NULL) || (Buffer == NULL)) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - //
> - // This function is implemented specifically for those platforms
> - // at which the SPI device is memory mapped for read. So this
> - // function just do a memory copy for Spi Flash Read.
> - //
> - CopyMem (Buffer, (VOID *) Address, *NumBytes);
> -
> - return EFI_SUCCESS;
> -}
> -
> -/**
> - Write NumBytes bytes of data from Buffer to the address specified by
> - PAddresss.
> -
> - @param[in] Address The starting physical address of the write.
> - @param[in,out] NumBytes On input, the number of bytes to write. On
> output,
> - the actual number of bytes written.
> - @param[in] Buffer The source data buffer for the write.
> -
> - @retval EFI_SUCCESS Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashWrite (
> - IN UINTN Address,
> - IN OUT UINT32 *NumBytes,
> - IN UINT8 *Buffer
> - )
> -{
> - EFI_STATUS Status;
> - UINTN Offset;
> - UINT32 Length;
> - UINT32 RemainingBytes;
> -
> - ASSERT ((NumBytes != NULL) && (Buffer != NULL));
> - if ((NumBytes == NULL) || (Buffer == NULL)) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - ASSERT (Address >= mFlashAreaBaseAddress);
> -
> - Offset = Address - mFlashAreaBaseAddress;
> -
> - ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
> -
> - Status = EFI_SUCCESS;
> - RemainingBytes = *NumBytes;
> -
> -
> - while (RemainingBytes > 0) {
> - if (RemainingBytes > SECTOR_SIZE_4KB) {
> - Length = SECTOR_SIZE_4KB;
> - } else {
> - Length = RemainingBytes;
> - }
> - Status = mSpiProtocol->FlashWrite (
> - mSpiProtocol,
> - FlashRegionBios,
> - (UINT32) Offset,
> - Length,
> - Buffer
> - );
> - if (EFI_ERROR (Status)) {
> - break;
> - }
> - RemainingBytes -= Length;
> - Offset += Length;
> - Buffer += Length;
> - }
> -
> - //
> - // Actual number of bytes written
> - //
> - *NumBytes -= RemainingBytes;
> -
> - return Status;
> -}
> -
> -/**
> - Erase the block starting at Address.
> -
> - @param[in] Address The starting physical address of the block to be
> erased.
> - This library assume that caller garantee that the PAddress
> - is at the starting address of this block.
> - @param[in] NumBytes On input, the number of bytes of the logical block
> to be erased.
> - On output, the actual number of bytes erased.
> -
> - @retval EFI_SUCCESS. Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashBlockErase (
> - IN UINTN Address,
> - IN UINTN *NumBytes
> - )
> -{
> - EFI_STATUS Status;
> - UINTN Offset;
> - UINTN RemainingBytes;
> -
> - ASSERT (NumBytes != NULL);
> - if (NumBytes == NULL) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - ASSERT (Address >= mFlashAreaBaseAddress);
> -
> - Offset = Address - mFlashAreaBaseAddress;
> -
> - ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
> - ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
> -
> - Status = EFI_SUCCESS;
> - RemainingBytes = *NumBytes;
> -
> -
> - Status = mSpiProtocol->FlashErase (
> - mSpiProtocol,
> - FlashRegionBios,
> - (UINT32) Offset,
> - (UINT32) RemainingBytes
> - );
> - return Status;
> -}
> -
> diff --git
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
> hCommonSmmLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
> hCommonSmmLib.c
> deleted file mode 100644
> index 11133163d2d4..000000000000
> ---
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
> hCommonSmmLib.c
> +++ /dev/null
> @@ -1,54 +0,0 @@
> -/** @file
> - SMM Library instance of SPI Flash Common Library Class
> -
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> -SPDX-License-Identifier: BSD-2-Clause-Patent
> -
> -**/
> -
> -#include <Library/SpiFlashCommonLib.h>
> -#include <Library/SmmServicesTableLib.h> -#include <Protocol/Spi.h>
> -
> -extern PCH_SPI_PROTOCOL *mSpiProtocol;
> -
> -extern UINTN mFlashAreaBaseAddress;
> -extern UINTN mFlashAreaSize;
> -
> -/**
> - The library constructuor.
> -
> - The function does the necessary initialization work for this library
> - instance.
> -
> - @param[in] ImageHandle The firmware allocated handle for the UEFI
> image.
> - @param[in] SystemTable A pointer to the EFI system table.
> -
> - @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
> - It will ASSERT on error for debug version.
> - @retval EFI_ERROR Please reference LocateProtocol for error code
> details.
> -**/
> -EFI_STATUS
> -EFIAPI
> -SmmSpiFlashCommonLibConstructor (
> - IN EFI_HANDLE ImageHandle,
> - IN EFI_SYSTEM_TABLE *SystemTable
> - )
> -{
> - EFI_STATUS Status;
> -
> - mFlashAreaBaseAddress = (UINTN)PcdGet32 (PcdFlashAreaBaseAddress);
> - mFlashAreaSize = (UINTN)PcdGet32 (PcdFlashAreaSize);
> -
> - //
> - // Locate the SMM SPI protocol.
> - //
> - Status = gSmst->SmmLocateProtocol (
> - &gPchSmmSpiProtocolGuid,
> - NULL,
> - (VOID **) &mSpiProtocol
> - );
> - ASSERT_EFI_ERROR (Status);
> -
> - return Status;
> -}
> diff --git
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
> deleted file mode 100644
> index 0c5e72258c2d..000000000000
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
> +++ /dev/null
> @@ -1,98 +0,0 @@
> -/** @file
> - The header file includes the common header files, defines
> - internal structure and functions used by SpiFlashCommonLib.
> -
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> -SPDX-License-Identifier: BSD-2-Clause-Patent
> -
> -**/
> -
> -#ifndef __SPI_FLASH_COMMON_LIB_H__
> -#define __SPI_FLASH_COMMON_LIB_H__
> -
> -#include <Uefi.h>
> -#include <Library/BaseLib.h>
> -#include <Library/PcdLib.h>
> -#include <Library/DebugLib.h>
> -#include <Library/BaseMemoryLib.h>
> -#include <Library/MemoryAllocationLib.h> -#include
> <Library/UefiDriverEntryPoint.h> -#include
> <Library/UefiBootServicesTableLib.h>
> -
> -#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
> -/**
> - Enable block protection on the Serial Flash device.
> -
> - @retval EFI_SUCCESS Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashLock (
> - VOID
> - );
> -
> -/**
> - Read NumBytes bytes of data from the address specified by
> - PAddress into Buffer.
> -
> - @param[in] Address The starting physical address of the read.
> - @param[in,out] NumBytes On input, the number of bytes to read. On
> output, the number
> - of bytes actually read.
> - @param[out] Buffer The destination data buffer for the read.
> -
> - @retval EFI_SUCCESS Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashRead (
> - IN UINTN Address,
> - IN OUT UINT32 *NumBytes,
> - OUT UINT8 *Buffer
> - );
> -
> -/**
> - Write NumBytes bytes of data from Buffer to the address specified by
> - PAddresss.
> -
> - @param[in] Address The starting physical address of the write.
> - @param[in,out] NumBytes On input, the number of bytes to write. On
> output,
> - the actual number of bytes written.
> - @param[in] Buffer The source data buffer for the write.
> -
> - @retval EFI_SUCCESS Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashWrite (
> - IN UINTN Address,
> - IN OUT UINT32 *NumBytes,
> - IN UINT8 *Buffer
> - );
> -
> -/**
> - Erase the block starting at Address.
> -
> - @param[in] Address The starting physical address of the block to be
> erased.
> - This library assume that caller garantee that the PAddress
> - is at the starting address of this block.
> - @param[in] NumBytes On input, the number of bytes of the logical block
> to be erased.
> - On output, the actual number of bytes erased.
> -
> - @retval EFI_SUCCESS. Opertion is successful.
> - @retval EFI_DEVICE_ERROR If there is any device errors.
> -
> -**/
> -EFI_STATUS
> -EFIAPI
> -SpiFlashBlockErase (
> - IN UINTN Address,
> - IN UINTN *NumBytes
> - );
> -
> -#endif
> diff --git
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSp
> iFlashCommonLib.inf
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSp
> iFlashCommonLib.inf
> deleted file mode 100644
> index d712b9e5f769..000000000000
> ---
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSp
> iFlashCommonLib.inf
> +++ /dev/null
> @@ -1,53 +0,0 @@
> -### @file
> -# SMM Library instance of Spi Flash Common Library Class -# -# Copyright (c)
> 2017, Intel Corporation. All rights reserved.<BR> -# -# SPDX-License-Identifier:
> BSD-2-Clause-Patent -# -###
> -
> -[Defines]
> - INF_VERSION = 0x00010017
> - BASE_NAME = SmmSpiFlashCommonLib
> - FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47
> - VERSION_STRING = 1.0
> - MODULE_TYPE = DXE_SMM_DRIVER
> - LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
> - CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
> -#
> -# The following information is for reference only and not required by the build
> tools.
> -#
> -# VALID_ARCHITECTURES = IA32 X64
> -#
> -
> -[LibraryClasses]
> - PciLib
> - IoLib
> - MemoryAllocationLib
> - BaseLib
> - UefiLib
> - SmmServicesTableLib
> - BaseMemoryLib
> - DebugLib
> - MmPciLib
> -
> -[Packages]
> - MdePkg/MdePkg.dec
> - KabylakeSiliconPkg/SiPkg.dec
> -
> -[Pcd]
> - gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
> - gSiPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
> - gSiPkgTokenSpaceGuid.PcdBiosGuardEnable ## CONSUMES
> -
> -[Sources]
> - SpiFlashCommonSmmLib.c
> - SpiFlashCommon.c
> -
> -[Protocols]
> - gPchSmmSpiProtocolGuid ## CONSUMES
> - gSmmBiosGuardProtocolGuid ## CONSUMES
> -
> -[Depex.X64.DXE_SMM_DRIVER]
> - gPchSmmSpiProtocolGuid
> --
> 2.28.0.windows.1
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
2021-04-19 9:07 ` Chiu, Chasel
@ 2021-04-19 21:21 ` Michael Kubacki
0 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-19 21:21 UTC (permalink / raw)
To: devel, chasel.chiu; +Cc: Chaganty, Rangasai V
Thanks for pointing this out. I'm not sure how, but it appears locally
that patch 27 had an "ENQ" character introduced at the beginning of the
patch file. This resulted in:
1. Actual patch 26 (correct): https://edk2.groups.io/g/devel/message/74179
2. This version of patch 27 (incorrect):
https://edk2.groups.io/g/devel/message/74180 which retains the subject
line from actual patch 26 ("CoffeelakeSiliconPkg...") but the contents
from actual patch 27 (KabylakeSiliconPkg files modified).
Patch 27 should have had the subject "KabylakeSiliconPkg: Remove
SmmSpiFlashCommonLib" (as indicated in the cover letter).
I am still collecting feedback on v1. I will check for this in the v2
patch files.
- Michael
On 4/19/2021 2:07 AM, Chiu, Chasel wrote:
>
> Hi Michael,
>
> Please rename subject to "KabylakeSiliconPkg".
> With above change, Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
>
> Thanks,
> Chasel
>
>
>> -----Original Message-----
>> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
>> Sent: Friday, April 16, 2021 10:32 AM
>> To: devel@edk2.groups.io
>> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
>> <rangasai.v.chaganty@intel.com>
>> Subject: [edk2-platforms][PATCH v1 26/35] CoffeelakeSiliconPkg: Remove
>> SmmSpiFlashCommonLib
>>
>> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>>
>> The library has been consolidated with instances in other Intel silicon packages
>> as a single instance in IntelSiliconPkg
>>
>> Cc: Chasel Chiu <chasel.chiu@intel.com>
>> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
>> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
>> ---
>>
>> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashC
>> ommon.c | 196 --------------------
>>
>> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashC
>> ommonSmmLib.c | 54 ------
>> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
>> | 98 ----------
>>
>> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFl
>> ashCommonLib.inf | 53 ------
>> 4 files changed, 401 deletions(-)
>>
>> diff --git
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
>> hCommon.c
>> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
>> hCommon.c
>> deleted file mode 100644
>> index 7ee7ffab5001..000000000000
>> ---
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
>> hCommon.c
>> +++ /dev/null
>> @@ -1,196 +0,0 @@
>> -/** @file
>> - Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
>> - for module use.
>> -
>> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>> -SPDX-License-Identifier: BSD-2-Clause-Patent
>> -
>> -**/
>> -
>> -#include <Library/SpiFlashCommonLib.h>
>> -#include <Library/IoLib.h>
>> -#include <Library/PciLib.h>
>> -#include <PchAccess.h>
>> -#include <Library/MmPciLib.h>
>> -#include <Protocol/Spi.h>
>> -
>> -
>> -PCH_SPI_PROTOCOL *mSpiProtocol;
>> -
>> -//
>> -// FlashAreaBaseAddress and Size for boottime and runtime usage.
>> -//
>> -UINTN mFlashAreaBaseAddress = 0;
>> -UINTN mFlashAreaSize = 0;
>> -
>> -/**
>> - Enable block protection on the Serial Flash device.
>> -
>> - @retval EFI_SUCCESS Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashLock (
>> - VOID
>> - )
>> -{
>> - return EFI_SUCCESS;
>> -}
>> -
>> -/**
>> - Read NumBytes bytes of data from the address specified by
>> - PAddress into Buffer.
>> -
>> - @param[in] Address The starting physical address of the read.
>> - @param[in,out] NumBytes On input, the number of bytes to read. On
>> output, the number
>> - of bytes actually read.
>> - @param[out] Buffer The destination data buffer for the read.
>> -
>> - @retval EFI_SUCCESS Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashRead (
>> - IN UINTN Address,
>> - IN OUT UINT32 *NumBytes,
>> - OUT UINT8 *Buffer
>> - )
>> -{
>> - ASSERT ((NumBytes != NULL) && (Buffer != NULL));
>> - if ((NumBytes == NULL) || (Buffer == NULL)) {
>> - return EFI_INVALID_PARAMETER;
>> - }
>> -
>> - //
>> - // This function is implemented specifically for those platforms
>> - // at which the SPI device is memory mapped for read. So this
>> - // function just do a memory copy for Spi Flash Read.
>> - //
>> - CopyMem (Buffer, (VOID *) Address, *NumBytes);
>> -
>> - return EFI_SUCCESS;
>> -}
>> -
>> -/**
>> - Write NumBytes bytes of data from Buffer to the address specified by
>> - PAddresss.
>> -
>> - @param[in] Address The starting physical address of the write.
>> - @param[in,out] NumBytes On input, the number of bytes to write. On
>> output,
>> - the actual number of bytes written.
>> - @param[in] Buffer The source data buffer for the write.
>> -
>> - @retval EFI_SUCCESS Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashWrite (
>> - IN UINTN Address,
>> - IN OUT UINT32 *NumBytes,
>> - IN UINT8 *Buffer
>> - )
>> -{
>> - EFI_STATUS Status;
>> - UINTN Offset;
>> - UINT32 Length;
>> - UINT32 RemainingBytes;
>> -
>> - ASSERT ((NumBytes != NULL) && (Buffer != NULL));
>> - if ((NumBytes == NULL) || (Buffer == NULL)) {
>> - return EFI_INVALID_PARAMETER;
>> - }
>> -
>> - ASSERT (Address >= mFlashAreaBaseAddress);
>> -
>> - Offset = Address - mFlashAreaBaseAddress;
>> -
>> - ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
>> -
>> - Status = EFI_SUCCESS;
>> - RemainingBytes = *NumBytes;
>> -
>> -
>> - while (RemainingBytes > 0) {
>> - if (RemainingBytes > SECTOR_SIZE_4KB) {
>> - Length = SECTOR_SIZE_4KB;
>> - } else {
>> - Length = RemainingBytes;
>> - }
>> - Status = mSpiProtocol->FlashWrite (
>> - mSpiProtocol,
>> - FlashRegionBios,
>> - (UINT32) Offset,
>> - Length,
>> - Buffer
>> - );
>> - if (EFI_ERROR (Status)) {
>> - break;
>> - }
>> - RemainingBytes -= Length;
>> - Offset += Length;
>> - Buffer += Length;
>> - }
>> -
>> - //
>> - // Actual number of bytes written
>> - //
>> - *NumBytes -= RemainingBytes;
>> -
>> - return Status;
>> -}
>> -
>> -/**
>> - Erase the block starting at Address.
>> -
>> - @param[in] Address The starting physical address of the block to be
>> erased.
>> - This library assume that caller garantee that the PAddress
>> - is at the starting address of this block.
>> - @param[in] NumBytes On input, the number of bytes of the logical block
>> to be erased.
>> - On output, the actual number of bytes erased.
>> -
>> - @retval EFI_SUCCESS. Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashBlockErase (
>> - IN UINTN Address,
>> - IN UINTN *NumBytes
>> - )
>> -{
>> - EFI_STATUS Status;
>> - UINTN Offset;
>> - UINTN RemainingBytes;
>> -
>> - ASSERT (NumBytes != NULL);
>> - if (NumBytes == NULL) {
>> - return EFI_INVALID_PARAMETER;
>> - }
>> -
>> - ASSERT (Address >= mFlashAreaBaseAddress);
>> -
>> - Offset = Address - mFlashAreaBaseAddress;
>> -
>> - ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
>> - ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
>> -
>> - Status = EFI_SUCCESS;
>> - RemainingBytes = *NumBytes;
>> -
>> -
>> - Status = mSpiProtocol->FlashErase (
>> - mSpiProtocol,
>> - FlashRegionBios,
>> - (UINT32) Offset,
>> - (UINT32) RemainingBytes
>> - );
>> - return Status;
>> -}
>> -
>> diff --git
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
>> hCommonSmmLib.c
>> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
>> hCommonSmmLib.c
>> deleted file mode 100644
>> index 11133163d2d4..000000000000
>> ---
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlas
>> hCommonSmmLib.c
>> +++ /dev/null
>> @@ -1,54 +0,0 @@
>> -/** @file
>> - SMM Library instance of SPI Flash Common Library Class
>> -
>> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>> -SPDX-License-Identifier: BSD-2-Clause-Patent
>> -
>> -**/
>> -
>> -#include <Library/SpiFlashCommonLib.h>
>> -#include <Library/SmmServicesTableLib.h> -#include <Protocol/Spi.h>
>> -
>> -extern PCH_SPI_PROTOCOL *mSpiProtocol;
>> -
>> -extern UINTN mFlashAreaBaseAddress;
>> -extern UINTN mFlashAreaSize;
>> -
>> -/**
>> - The library constructuor.
>> -
>> - The function does the necessary initialization work for this library
>> - instance.
>> -
>> - @param[in] ImageHandle The firmware allocated handle for the UEFI
>> image.
>> - @param[in] SystemTable A pointer to the EFI system table.
>> -
>> - @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
>> - It will ASSERT on error for debug version.
>> - @retval EFI_ERROR Please reference LocateProtocol for error code
>> details.
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SmmSpiFlashCommonLibConstructor (
>> - IN EFI_HANDLE ImageHandle,
>> - IN EFI_SYSTEM_TABLE *SystemTable
>> - )
>> -{
>> - EFI_STATUS Status;
>> -
>> - mFlashAreaBaseAddress = (UINTN)PcdGet32 (PcdFlashAreaBaseAddress);
>> - mFlashAreaSize = (UINTN)PcdGet32 (PcdFlashAreaSize);
>> -
>> - //
>> - // Locate the SMM SPI protocol.
>> - //
>> - Status = gSmst->SmmLocateProtocol (
>> - &gPchSmmSpiProtocolGuid,
>> - NULL,
>> - (VOID **) &mSpiProtocol
>> - );
>> - ASSERT_EFI_ERROR (Status);
>> -
>> - return Status;
>> -}
>> diff --git
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
>> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
>> deleted file mode 100644
>> index 0c5e72258c2d..000000000000
>> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
>> +++ /dev/null
>> @@ -1,98 +0,0 @@
>> -/** @file
>> - The header file includes the common header files, defines
>> - internal structure and functions used by SpiFlashCommonLib.
>> -
>> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
>> -SPDX-License-Identifier: BSD-2-Clause-Patent
>> -
>> -**/
>> -
>> -#ifndef __SPI_FLASH_COMMON_LIB_H__
>> -#define __SPI_FLASH_COMMON_LIB_H__
>> -
>> -#include <Uefi.h>
>> -#include <Library/BaseLib.h>
>> -#include <Library/PcdLib.h>
>> -#include <Library/DebugLib.h>
>> -#include <Library/BaseMemoryLib.h>
>> -#include <Library/MemoryAllocationLib.h> -#include
>> <Library/UefiDriverEntryPoint.h> -#include
>> <Library/UefiBootServicesTableLib.h>
>> -
>> -#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
>> -/**
>> - Enable block protection on the Serial Flash device.
>> -
>> - @retval EFI_SUCCESS Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashLock (
>> - VOID
>> - );
>> -
>> -/**
>> - Read NumBytes bytes of data from the address specified by
>> - PAddress into Buffer.
>> -
>> - @param[in] Address The starting physical address of the read.
>> - @param[in,out] NumBytes On input, the number of bytes to read. On
>> output, the number
>> - of bytes actually read.
>> - @param[out] Buffer The destination data buffer for the read.
>> -
>> - @retval EFI_SUCCESS Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashRead (
>> - IN UINTN Address,
>> - IN OUT UINT32 *NumBytes,
>> - OUT UINT8 *Buffer
>> - );
>> -
>> -/**
>> - Write NumBytes bytes of data from Buffer to the address specified by
>> - PAddresss.
>> -
>> - @param[in] Address The starting physical address of the write.
>> - @param[in,out] NumBytes On input, the number of bytes to write. On
>> output,
>> - the actual number of bytes written.
>> - @param[in] Buffer The source data buffer for the write.
>> -
>> - @retval EFI_SUCCESS Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashWrite (
>> - IN UINTN Address,
>> - IN OUT UINT32 *NumBytes,
>> - IN UINT8 *Buffer
>> - );
>> -
>> -/**
>> - Erase the block starting at Address.
>> -
>> - @param[in] Address The starting physical address of the block to be
>> erased.
>> - This library assume that caller garantee that the PAddress
>> - is at the starting address of this block.
>> - @param[in] NumBytes On input, the number of bytes of the logical block
>> to be erased.
>> - On output, the actual number of bytes erased.
>> -
>> - @retval EFI_SUCCESS. Opertion is successful.
>> - @retval EFI_DEVICE_ERROR If there is any device errors.
>> -
>> -**/
>> -EFI_STATUS
>> -EFIAPI
>> -SpiFlashBlockErase (
>> - IN UINTN Address,
>> - IN UINTN *NumBytes
>> - );
>> -
>> -#endif
>> diff --git
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSp
>> iFlashCommonLib.inf
>> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSp
>> iFlashCommonLib.inf
>> deleted file mode 100644
>> index d712b9e5f769..000000000000
>> ---
>> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSp
>> iFlashCommonLib.inf
>> +++ /dev/null
>> @@ -1,53 +0,0 @@
>> -### @file
>> -# SMM Library instance of Spi Flash Common Library Class -# -# Copyright (c)
>> 2017, Intel Corporation. All rights reserved.<BR> -# -# SPDX-License-Identifier:
>> BSD-2-Clause-Patent -# -###
>> -
>> -[Defines]
>> - INF_VERSION = 0x00010017
>> - BASE_NAME = SmmSpiFlashCommonLib
>> - FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47
>> - VERSION_STRING = 1.0
>> - MODULE_TYPE = DXE_SMM_DRIVER
>> - LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
>> - CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
>> -#
>> -# The following information is for reference only and not required by the build
>> tools.
>> -#
>> -# VALID_ARCHITECTURES = IA32 X64
>> -#
>> -
>> -[LibraryClasses]
>> - PciLib
>> - IoLib
>> - MemoryAllocationLib
>> - BaseLib
>> - UefiLib
>> - SmmServicesTableLib
>> - BaseMemoryLib
>> - DebugLib
>> - MmPciLib
>> -
>> -[Packages]
>> - MdePkg/MdePkg.dec
>> - KabylakeSiliconPkg/SiPkg.dec
>> -
>> -[Pcd]
>> - gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
>> - gSiPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
>> - gSiPkgTokenSpaceGuid.PcdBiosGuardEnable ## CONSUMES
>> -
>> -[Sources]
>> - SpiFlashCommonSmmLib.c
>> - SpiFlashCommon.c
>> -
>> -[Protocols]
>> - gPchSmmSpiProtocolGuid ## CONSUMES
>> - gSmmBiosGuardProtocolGuid ## CONSUMES
>> -
>> -[Depex.X64.DXE_SMM_DRIVER]
>> - gPchSmmSpiProtocolGuid
>> --
>> 2.28.0.windows.1
>
>
>
>
>
^ permalink raw reply [flat|nested] 44+ messages in thread
* [edk2-platforms][PATCH v1 28/35] SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (26 preceding siblings ...)
2021-04-16 2:31 ` Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 29/35] TigerlakeOpenBoardPkg: " Michael Kubacki
` (7 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg
Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 194 --------------------
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ------
Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h | 98 ----------
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 50 -----
4 files changed, 396 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 9e3461cbd600..000000000000
--- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/** @file
- Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
- for module use.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <Protocol/Spi.h>
-
-
-EFI_SPI_PROTOCOL *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress = 0;
-UINTN mFlashAreaSize = 0;
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This function is implemented specifically for those platforms
- // at which the SPI device is memory mapped for read. So this
- // function just do a memory copy for Spi Flash Read.
- //
- CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINT32 Length;
- UINT32 RemainingBytes;
-
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mFlashAreaBaseAddress);
-
- Offset = Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- while (RemainingBytes > 0) {
- if (RemainingBytes > SECTOR_SIZE_4KB) {
- Length = SECTOR_SIZE_4KB;
- } else {
- Length = RemainingBytes;
- }
- Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
- RemainingBytes -= Length;
- Offset += Length;
- Buffer += Length;
- }
-
- //
- // Actual number of bytes written
- //
- *NumBytes -= RemainingBytes;
-
- return Status;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINTN RemainingBytes;
-
- ASSERT (NumBytes != NULL);
- if (NumBytes == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mFlashAreaBaseAddress);
-
- Offset = Address - mFlashAreaBaseAddress;
-
- ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
- ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- Status = mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
- return Status;
-}
-
diff --git a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
deleted file mode 100644
index 984b7733c6b9..000000000000
--- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/** @file
- SMM Library instance of SPI Flash Common Library Class
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
-
-extern EFI_SPI_PROTOCOL *mSpiProtocol;
-
-extern UINTN mFlashAreaBaseAddress;
-extern UINTN mFlashAreaSize;
-
-/**
- The library constructuor.
-
- The function does the necessary initialization work for this library
- instance.
-
- @param[in] ImageHandle The firmware allocated handle for the UEFI image.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
- It will ASSERT on error for debug version.
- @retval EFI_ERROR Please reference LocateProtocol for error code details.
-**/
-EFI_STATUS
-EFIAPI
-SmmSpiFlashCommonLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- mFlashAreaBaseAddress = (UINTN)PcdGet32 (PcdFlashAreaBaseAddress);
- mFlashAreaSize = (UINTN)PcdGet32 (PcdFlashAreaSize);
-
- //
- // Locate the SMM SPI protocol.
- //
- Status = gSmst->SmmLocateProtocol (
- &gEfiSmmSpiProtocolGuid,
- NULL,
- (VOID **) &mSpiProtocol
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h b/Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h
deleted file mode 100644
index 53c11bb59ac6..000000000000
--- a/Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
deleted file mode 100644
index 23b334a080e7..000000000000
--- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+++ /dev/null
@@ -1,50 +0,0 @@
-## @file
-# SMM Library instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SmmSpiFlashCommonLib
- FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47
- VERSION_STRING = 1.0
- MODULE_TYPE = DXE_SMM_DRIVER
- LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
- CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- PciLib
- IoLib
- MemoryAllocationLib
- BaseLib
- UefiLib
- SmmServicesTableLib
- BaseMemoryLib
- DebugLib
-
-[Packages]
- MdePkg/MdePkg.dec
- SimicsIch10Pkg/Ich10Pkg.dec
-
-[Pcd]
- gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
- gEfiPchTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
-
-[Sources]
- SpiFlashCommonSmmLib.c
- SpiFlashCommon.c
-
-[Protocols]
- gEfiSmmSpiProtocolGuid ## CONSUMES
-
-[Depex.X64.DXE_SMM_DRIVER]
- gEfiSmmSpiProtocolGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 29/35] TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (27 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 28/35] SimicsIch10Pkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 30/35] MinPlatformPkg: RemoveSpiFlashCommonLibNull Michael Kubacki
` (6 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 210 --------------------
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 58 ------
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 49 -----
3 files changed, 317 deletions(-)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index f86896dd1ff5..000000000000
--- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/** @file
- Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
- for module use.
-
- Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SpiFlashCommonLib.h>
-#include <Library/IoLib.h>
-#include <Protocol/Spi.h>
-
-PCH_SPI_PROTOCOL *mSpiProtocol;
-
-//
-// Variables for boottime and runtime usage.
-//
-UINTN mBiosAreaBaseAddress = 0;
-UINTN mBiosSize = 0;
-UINTN mBiosOffset = 0;
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Operation is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This function is implemented specifically for those platforms
- // at which the SPI device is memory mapped for read. So this
- // function just do a memory copy for Spi Flash Read.
- //
- CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Operation is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
- @retval EFI_INVALID_PARAMETER Invalid parameter.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINT32 Length;
- UINT32 RemainingBytes;
-
- ASSERT ((NumBytes != NULL) && (Buffer != NULL));
- if ((NumBytes == NULL) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mBiosAreaBaseAddress);
- if (Address < mBiosAreaBaseAddress) {
- return EFI_INVALID_PARAMETER;
- }
-
- Offset = Address - mBiosAreaBaseAddress;
-
- ASSERT ((*NumBytes + Offset) <= mBiosSize);
- if ((*NumBytes + Offset) > mBiosSize) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- while (RemainingBytes > 0) {
- if (RemainingBytes > SECTOR_SIZE_4KB) {
- Length = SECTOR_SIZE_4KB;
- } else {
- Length = RemainingBytes;
- }
- Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
- if (EFI_ERROR (Status)) {
- break;
- }
- RemainingBytes -= Length;
- Offset += Length;
- Buffer += Length;
- }
-
- //
- // Actual number of bytes written
- //
- *NumBytes -= RemainingBytes;
-
- return Status;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Operation is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
- @retval EFI_INVALID_PARAMETER Invalid parameter.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- EFI_STATUS Status;
- UINTN Offset;
- UINTN RemainingBytes;
-
- ASSERT (NumBytes != NULL);
- if (NumBytes == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT (Address >= mBiosAreaBaseAddress);
- if (Address < mBiosAreaBaseAddress) {
- return EFI_INVALID_PARAMETER;
- }
-
- Offset = Address - mBiosAreaBaseAddress;
-
- ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0);
- if ((*NumBytes % SECTOR_SIZE_4KB) != 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- ASSERT ((*NumBytes + Offset) <= mBiosSize);
- if ((*NumBytes + Offset) > mBiosSize) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = EFI_SUCCESS;
- RemainingBytes = *NumBytes;
-
-
- Status = mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
- return Status;
-}
-
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
deleted file mode 100644
index 7941b8f8720c..000000000000
--- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/** @file
- SMM Library instance of SPI Flash Common Library Class
-
- Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
-#include <Library/DebugLib.h>
-
-extern PCH_SPI_PROTOCOL *mSpiProtocol;
-
-extern UINTN mBiosAreaBaseAddress;
-extern UINTN mBiosSize;
-extern UINTN mBiosOffset;
-
-/**
- The library constructuor.
-
- The function does the necessary initialization work for this library
- instance.
-
- @param[in] ImageHandle The firmware allocated handle for the UEFI image.
- @param[in] SystemTable A pointer to the EFI system table.
-
- @retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
- It will ASSERT on error for debug version.
- @retval EFI_ERROR Please reference LocateProtocol for error code details.
-**/
-EFI_STATUS
-EFIAPI
-SmmSpiFlashCommonLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- UINT32 BaseAddr;
- UINT32 RegionSize;
-
- mBiosAreaBaseAddress = (UINTN)PcdGet32 (PcdBiosAreaBaseAddress);
- mBiosSize = (UINTN)PcdGet32 (PcdBiosSize);
-
- //
- // Locate the SMM SPI protocol.
- //
- Status = gSmst->SmmLocateProtocol (
- &gPchSmmSpiProtocolGuid,
- NULL,
- (VOID **) &mSpiProtocol
- );
- ASSERT_EFI_ERROR (Status);
-
- mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAddr, &RegionSize);
- mBiosOffset = BaseAddr;
- return Status;
-}
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
deleted file mode 100644
index 374f5ea52b98..000000000000
--- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+++ /dev/null
@@ -1,49 +0,0 @@
-## @file
-# SMM Library instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SmmSpiFlashCommonLib
- FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47
- VERSION_STRING = 1.0
- MODULE_TYPE = DXE_SMM_DRIVER
- LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER
- CONSTRUCTOR = SmmSpiFlashCommonLibConstructor
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
- IoLib
- MemoryAllocationLib
- BaseLib
- UefiLib
- SmmServicesTableLib
- BaseMemoryLib
- DebugLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MinPlatformPkg/MinPlatformPkg.dec
- TigerlakeSiliconPkg/SiPkg.dec
-
-[Pcd]
- gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
-
-[Sources]
- SpiFlashCommonSmmLib.c
- SpiFlashCommon.c
-
-[Protocols]
- gPchSmmSpiProtocolGuid ## CONSUMES
-
-[Depex.X64.DXE_SMM_DRIVER]
- gPchSmmSpiProtocolGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 30/35] MinPlatformPkg: RemoveSpiFlashCommonLibNull
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (28 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 29/35] TigerlakeOpenBoardPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 31/35] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec Michael Kubacki
` (5 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Liming Gao, Eric Dong
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The library instance has moved to IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c | 101 --------------------
Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf | 29 ------
Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h | 98 -------------------
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 2 -
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 4 -
5 files changed, 234 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
deleted file mode 100644
index 403b16a1b421..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/** @file
- Null Library instance of SPI Flash Common Library Class
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Uefi.h>
-#include <Library/DebugLib.h>
-
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- )
-{
- ASSERT(FALSE);
- return EFI_SUCCESS;
-}
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- )
-{
- ASSERT(FALSE);
- return EFI_SUCCESS;
-}
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- )
-{
- ASSERT(FALSE);
- return EFI_SUCCESS;
-}
-
diff --git a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
deleted file mode 100644
index 75ef1cb921df..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
+++ /dev/null
@@ -1,29 +0,0 @@
-### @file
-# NULL instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
- INF_VERSION = 0x00010017
- BASE_NAME = SpiFlashCommonLibNull
- FILE_GUID = F35BBEE7-A681-443E-BB15-07AF9FABBDED
- VERSION_STRING = 1.0
- MODULE_TYPE = BASE
- LIBRARY_CLASS = SpiFlashCommonLib
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[Sources]
- SpiFlashCommonLibNull.c
diff --git a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h b/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
deleted file mode 100644
index 0c5e72258c2d..000000000000
--- a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
- The header file includes the common header files, defines
- internal structure and functions used by SpiFlashCommonLib.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
-/**
- Enable block protection on the Serial Flash device.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
- VOID
- );
-
-/**
- Read NumBytes bytes of data from the address specified by
- PAddress into Buffer.
-
- @param[in] Address The starting physical address of the read.
- @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
- of bytes actually read.
- @param[out] Buffer The destination data buffer for the read.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- OUT UINT8 *Buffer
- );
-
-/**
- Write NumBytes bytes of data from Buffer to the address specified by
- PAddresss.
-
- @param[in] Address The starting physical address of the write.
- @param[in,out] NumBytes On input, the number of bytes to write. On output,
- the actual number of bytes written.
- @param[in] Buffer The source data buffer for the write.
-
- @retval EFI_SUCCESS Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
- IN UINTN Address,
- IN OUT UINT32 *NumBytes,
- IN UINT8 *Buffer
- );
-
-/**
- Erase the block starting at Address.
-
- @param[in] Address The starting physical address of the block to be erased.
- This library assume that caller garantee that the PAddress
- is at the starting address of this block.
- @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
- On output, the actual number of bytes erased.
-
- @retval EFI_SUCCESS. Opertion is successful.
- @retval EFI_DEVICE_ERROR If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
- IN UINTN Address,
- IN UINTN *NumBytes
- );
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 947431470a1f..8c6154099bf7 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -62,8 +62,6 @@ [LibraryClasses]
SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h
- SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
-
BoardInitLib|Include/Library/BoardInitLib.h
MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
SecBoardInitLib|Include/Library/SecBoardInitLib.h
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index 86ae30a5360a..a6964aafd7f3 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -109,7 +109,6 @@ [LibraryClasses.common.DXE_DRIVER]
TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/TpmPlatformHierarchyLib/TpmPlatformHierarchyLib.inf
[LibraryClasses.common.DXE_SMM_DRIVER]
- SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/SmmTestPointLib.inf
@@ -118,7 +117,6 @@ [LibraryClasses.common.MM_STANDALONE]
MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf
MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
VariableReadLib|MinPlatformPkg/Library/SmmVariableReadLib/StandaloneMmVariableReadLib.inf
VariableWriteLib|MinPlatformPkg/Library/SmmVariableWriteLib/StandaloneMmVariableWriteLib.inf
@@ -159,8 +157,6 @@ [Components]
MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
- MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
-
MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 31/35] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (29 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 30/35] MinPlatformPkg: RemoveSpiFlashCommonLibNull Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 32/35] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (4 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
This library now uses gPchSpiPpiGuid from IntelSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 1 +
1 file changed, 1 insertion(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
index 31518fb40ba7..b959cd1f4612 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
@@ -32,6 +32,7 @@ [Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
MinPlatformPkg/MinPlatformPkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
KabylakeSiliconPkg/SiPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 32/35] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (30 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 31/35] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 33/35] KabylakeSiliconPkg: " Michael Kubacki
` (3 subsequent siblings)
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in CoffeelakeSiliconPkg are removed and libs/
modules that need to reference IntelSiliconPkg are updated.
1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h | 27 --
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h | 295 --------------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 3 -
6 files changed, 3 insertions(+), 325 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h
deleted file mode 100644
index d3ff152742cf..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/** @file
- This file defines the PCH SPI PPI which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _PCH_SPI_PPI_H_
-#define _PCH_SPI_PPI_H_
-
-#include <Protocol/Spi.h>
-
-//
-// Extern the GUID for PPI users.
-//
-extern EFI_GUID gPchSpiPpiGuid;
-
-/**
- Reuse the PCH_SPI_PROTOCOL definitions
- This is possible becaues the PPI implementation does not rely on a PeiService pointer,
- as it uses EDKII Glue Lib to do IO accesses
-**/
-typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
-
-#endif
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
deleted file mode 100644
index 22df7fe35147..000000000000
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/** @file
- This file defines the PCH SPI Protocol which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID gPchSpiProtocolGuid;
-extern EFI_GUID gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
- Flash Region Type
-**/
-typedef enum {
- FlashRegionDescriptor,
- FlashRegionBios,
- FlashRegionMe,
- FlashRegionGbE,
- FlashRegionPlatformData,
- FlashRegionDer,
- FlashRegionEC = 8,
- FlashRegionAll,
- FlashRegionMax
-} FLASH_REGION_TYPE;
-
-//
-// Protocol member functions
-//
-
-/**
- Read data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *Buffer
- );
-
-/**
- Write data to the flash part. Remark: Erase may be needed before write to the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- IN UINT8 *Buffer
- );
-
-/**
- Erase some area on the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_ERASE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount
- );
-
-/**
- Read SFDP data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] Address The starting byte address for SFDP data read.
- @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
- @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *SfdpData
- );
-
-/**
- Read Jedec Id from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
- @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 ByteCount,
- OUT UINT8 *JedecId
- );
-
-/**
- Write the status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- IN UINT8 *StatusValue
- );
-
-/**
- Read status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- OUT UINT8 *StatusValue
- );
-
-/**
- Get the SPI region base and size, based on the enum type
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
- @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
- @param[out] RegionSize The size for the Region 'n'
-
- @retval EFI_SUCCESS Read success
- @retval EFI_INVALID_PARAMETER Invalid region type given
- @retval EFI_DEVICE_ERROR The region is not used
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- OUT UINT32 *BaseAddress,
- OUT UINT32 *RegionSize
- );
-
-/**
- Read PCH Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- Read CPU Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- These protocols/PPI allows a platform module to perform SPI operations through the
- Intel PCH SPI Host Controller Interface.
-**/
-struct _PCH_SPI_PROTOCOL {
- /**
- This member specifies the revision of this structure. This field is used to
- indicate backwards compatible changes to the protocol.
- **/
- UINT8 Revision;
- PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
- PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
- PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
- PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
- PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
- PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
- PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
- PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
- PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
- PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
-};
-
-/**
- PCH SPI PPI/PROTOCOL revision number
-
- Revision 1: Initial version
-**/
-#define PCH_SPI_SERVICES_REVISION 1
-
-#endif
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index fb2fad78d39e..4e4b456574f0 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -30,6 +30,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
CoffeelakeSiliconPkg/SiPkg.dec
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index ea23e628c80e..f5dc4ee0bfef 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -20,6 +20,7 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
CoffeelakeSiliconPkg/SiPkg.dec
[LibraryClasses]
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 77bd3ad72bff..231929151222 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -29,6 +29,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
CoffeelakeSiliconPkg/SiPkg.dec
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
index 5ea6fbb28411..efc2d8788168 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
@@ -303,11 +303,9 @@ [Protocols]
##
## PCH
##
-gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26, 0x9d, 0xe, 0xf3, 0x4a}}
gWdtProtocolGuid = {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5b, 0xe6, 0xcf, 0x09, 0xb1}}
gPchSerialIoUartDebugInfoProtocolGuid = {0x2fd2b1bd, 0x0387, 0x4ec6, {0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}}
gEfiSmmSmbusProtocolGuid = {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}}
-gPchSmmSpiProtocolGuid = {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
gPchSmmIoTrapControlGuid = {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}}
gPchTcoSmiDispatchProtocolGuid = {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}}
gPchPcieSmiDispatchProtocolGuid = {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}}
@@ -382,7 +380,6 @@ [Ppis]
## PCH
##
gWdtPpiGuid = {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x21, 0x83, 0x57, 0x0d}}
-gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}}
gPeiSmbusPolicyPpiGuid = {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}}
gPchResetCallbackPpiGuid = {0x17865dc0, 0x0b8b, 0x4da8, {0x8b, 0x42, 0x7c, 0x46, 0xb8, 0x5c, 0xca, 0x4d}}
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 33/35] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (31 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 32/35] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-19 9:04 ` Chiu, Chasel
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 34/35] SimicsIch10Pkg: Remove PCH SPI SMM " Michael Kubacki
` (2 subsequent siblings)
35 siblings, 1 reply; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in KabylakeSiliconPkg are removed and libs
modules that need to reference IntelSiliconPkg are updated.
1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 3 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h | 26 --
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h | 293 --------------------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 3 -
6 files changed, 4 insertions(+), 323 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
index 52e3b6ceba3e..bd12fa691d40 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
@@ -46,6 +46,7 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
KabylakeSiliconPkg/SiPkg.dec
SecurityPkg/SecurityPkg.dec
@@ -92,7 +93,7 @@ [Protocols]
gEfiMpServiceProtocolGuid ## CONSUMES
gDxeSiPolicyProtocolGuid ## CONSUMES
gHstiPublishCompleteProtocolGuid ## PRODUCES
-
+
[FixedPcd]
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
deleted file mode 100644
index e11f82edcaea..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/** @file
- This file defines the PCH SPI PPI which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-#ifndef _PCH_SPI_PPI_H_
-#define _PCH_SPI_PPI_H_
-
-#include <Protocol/Spi.h>
-
-//
-// Extern the GUID for PPI users.
-//
-extern EFI_GUID gPchSpiPpiGuid;
-
-/**
- Reuse the PCH_SPI_PROTOCOL definitions
- This is possible becaues the PPI implementation does not rely on a PeiService pointer,
- as it uses EDKII Glue Lib to do IO accesses
-**/
-typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
-
-#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
deleted file mode 100644
index 8c66e5063fa9..000000000000
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,293 +0,0 @@
-/** @file
- This file defines the PCH SPI Protocol which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID gPchSpiProtocolGuid;
-extern EFI_GUID gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
- Flash Region Type
-**/
-typedef enum {
- FlashRegionDescriptor,
- FlashRegionBios,
- FlashRegionMe,
- FlashRegionGbE,
- FlashRegionPlatformData,
- FlashRegionDer,
- FlashRegionAll,
- FlashRegionMax
-} FLASH_REGION_TYPE;
-
-//
-// Protocol member functions
-//
-
-/**
- Read data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *Buffer
- );
-
-/**
- Write data to the flash part. Remark: Erase may be needed before write to the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- IN UINT8 *Buffer
- );
-
-/**
- Erase some area on the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_ERASE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount
- );
-
-/**
- Read SFDP data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] Address The starting byte address for SFDP data read.
- @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
- @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *SfdpData
- );
-
-/**
- Read Jedec Id from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
- @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 ByteCount,
- OUT UINT8 *JedecId
- );
-
-/**
- Write the status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- IN UINT8 *StatusValue
- );
-
-/**
- Read status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- OUT UINT8 *StatusValue
- );
-
-/**
- Get the SPI region base and size, based on the enum type
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
- @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
- @param[out] RegionSize The size for the Region 'n'
-
- @retval EFI_SUCCESS Read success
- @retval EFI_INVALID_PARAMETER Invalid region type given
- @retval EFI_DEVICE_ERROR The region is not used
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- OUT UINT32 *BaseAddress,
- OUT UINT32 *RegionSize
- );
-
-/**
- Read PCH Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- Read CPU Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- These protocols/PPI allows a platform module to perform SPI operations through the
- Intel PCH SPI Host Controller Interface.
-**/
-struct _PCH_SPI_PROTOCOL {
- /**
- This member specifies the revision of this structure. This field is used to
- indicate backwards compatible changes to the protocol.
- **/
- UINT8 Revision;
- PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
- PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
- PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
- PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
- PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
- PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
- PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
- PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
- PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
- PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
-};
-
-/**
- PCH SPI PPI/PROTOCOL revision number
-
- Revision 1: Initial version
-**/
-#define PCH_SPI_SERVICES_REVISION 1
-
-#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index 31f4ffe43a23..c6bc1ad406c8 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -32,6 +32,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
KabylakeSiliconPkg/SiPkg.dec
[Sources]
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 964489064a74..819dc2439f30 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -30,6 +30,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
KabylakeSiliconPkg/SiPkg.dec
KabylakeSiliconPkg/KabylakeSiliconPrivate.dec
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index 5ff7b39ca60e..d9ae9f6dfd91 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -294,13 +294,11 @@ [Protocols]
##
## PCH
##
-gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26, 0x9d, 0xe, 0xf3, 0x4a}}
gPchSerialGpioProtocolGuid = {0xf52c3858, 0x5ef8, 0x4d41, {0x83, 0x4e, 0xc3, 0x9e, 0xef, 0x8a, 0x45, 0xa3}}
gWdtProtocolGuid = {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5b, 0xe6, 0xcf, 0x09, 0xb1}}
gPchInfoProtocolGuid = {0x984eb4e9, 0x5a95, 0x41de, {0xaa, 0xd0, 0x53, 0x66, 0x8c, 0xa5, 0x13, 0xc0}}
gPchSerialIoUartDebugInfoProtocolGuid = {0x2fd2b1bd, 0x0387, 0x4ec6, {0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}}
gEfiSmmSmbusProtocolGuid = {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}}
-gPchSmmSpiProtocolGuid = {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
gPchSmmIoTrapControlGuid = {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}}
gPchTcoSmiDispatchProtocolGuid = {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}}
gPchPcieSmiDispatchProtocolGuid = {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}}
@@ -361,7 +359,6 @@ [Ppis]
## PCH
##
gWdtPpiGuid = {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x21, 0x83, 0x57, 0x0d}}
-gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}}
gPeiSmbusPolicyPpiGuid = {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}}
gPchResetCallbackPpiGuid = {0x17865dc0, 0x0b8b, 0x4da8, {0x8b, 0x42, 0x7c, 0x46, 0xb8, 0x5c, 0xca, 0x4d}}
gPchResetPpiGuid = {0x433e0f9f, 0x05ae, 0x410a, {0xa0, 0xc3, 0xbf, 0x29, 0x8e, 0xcb, 0x25, 0xac}}
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* Re: [edk2-platforms][PATCH v1 33/35] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 33/35] KabylakeSiliconPkg: " Michael Kubacki
@ 2021-04-19 9:04 ` Chiu, Chasel
0 siblings, 0 replies; 44+ messages in thread
From: Chiu, Chasel @ 2021-04-19 9:04 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io; +Cc: Chaganty, Rangasai V
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Friday, April 16, 2021 10:32 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms][PATCH v1 33/35] KabylakeSiliconPkg: Remove PCH SPI
> PPI and Protocol from package
>
> From: Michael Kubacki <michael.kubacki@microsoft.com>
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>
> The following PPI and Protocols have moved to IntelSiliconPkg. The remaining
> definitions in KabylakeSiliconPkg are removed and libs modules that need to
> reference IntelSiliconPkg are updated.
>
> 1. gPchSpiProtocolGuid
> 2. gPchSmmSpiProtocolGuid
> 3. gPchSpiPpiGuid
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> ---
> Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 3 +-
> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h | 26 --
> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h | 293 ----------
> ----------
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
> Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
> Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 3 -
> 6 files changed, 4 insertions(+), 323 deletions(-)
>
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
> b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
> index 52e3b6ceba3e..bd12fa691d40 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
> @@ -46,6 +46,7 @@ [Sources]
> [Packages]
> MdePkg/MdePkg.dec
> UefiCpuPkg/UefiCpuPkg.dec
> + IntelSiliconPkg/IntelSiliconPkg.dec
> KabylakeSiliconPkg/SiPkg.dec
> SecurityPkg/SecurityPkg.dec
>
> @@ -92,7 +93,7 @@ [Protocols]
> gEfiMpServiceProtocolGuid ## CONSUMES
> gDxeSiPolicyProtocolGuid ## CONSUMES
> gHstiPublishCompleteProtocolGuid ## PRODUCES
> -
> +
> [FixedPcd]
> gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1
> gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
> deleted file mode 100644
> index e11f82edcaea..000000000000
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -/** @file
> - This file defines the PCH SPI PPI which implements the
> - Intel(R) PCH SPI Host Controller Compatibility Interface.
> -
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> -SPDX-License-Identifier: BSD-2-Clause-Patent
> -
> -**/
> -#ifndef _PCH_SPI_PPI_H_
> -#define _PCH_SPI_PPI_H_
> -
> -#include <Protocol/Spi.h>
> -
> -//
> -// Extern the GUID for PPI users.
> -//
> -extern EFI_GUID gPchSpiPpiGuid;
> -
> -/**
> - Reuse the PCH_SPI_PROTOCOL definitions
> - This is possible becaues the PPI implementation does not rely on a PeiService
> pointer,
> - as it uses EDKII Glue Lib to do IO accesses -**/ -typedef PCH_SPI_PROTOCOL
> PCH_SPI_PPI;
> -
> -#endif
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
> deleted file mode 100644
> index 8c66e5063fa9..000000000000
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
> +++ /dev/null
> @@ -1,293 +0,0 @@
> -/** @file
> - This file defines the PCH SPI Protocol which implements the
> - Intel(R) PCH SPI Host Controller Compatibility Interface.
> -
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> -SPDX-License-Identifier: BSD-2-Clause-Patent
> -
> -**/
> -#ifndef _PCH_SPI_PROTOCOL_H_
> -#define _PCH_SPI_PROTOCOL_H_
> -
> -//
> -// Extern the GUID for protocol users.
> -//
> -extern EFI_GUID gPchSpiProtocolGuid;
> -extern EFI_GUID gPchSmmSpiProtocolGuid;
> -
> -//
> -// Forward reference for ANSI C compatibility -// -typedef struct
> _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
> -
> -//
> -// SPI protocol data structures and definitions -//
> -
> -/**
> - Flash Region Type
> -**/
> -typedef enum {
> - FlashRegionDescriptor,
> - FlashRegionBios,
> - FlashRegionMe,
> - FlashRegionGbE,
> - FlashRegionPlatformData,
> - FlashRegionDer,
> - FlashRegionAll,
> - FlashRegionMax
> -} FLASH_REGION_TYPE;
> -
> -//
> -// Protocol member functions
> -//
> -
> -/**
> - Read data from the flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] FlashRegionType The Flash Region type for flash cycle which is
> listed in the Descriptor.
> - @param[in] Address The Flash Linear Address must fall within a region
> for which BIOS has access permissions.
> - @param[in] ByteCount Number of bytes in the data portion of the SPI
> cycle.
> - @param[out] Buffer The Pointer to caller-allocated buffer containing
> the dada received.
> - It is the caller's responsibility to make sure Buffer is large
> enough for the total number of bytes read.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_READ) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN FLASH_REGION_TYPE FlashRegionType,
> - IN UINT32 Address,
> - IN UINT32 ByteCount,
> - OUT UINT8 *Buffer
> - );
> -
> -/**
> - Write data to the flash part. Remark: Erase may be needed before write to the
> flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] FlashRegionType The Flash Region type for flash cycle which is
> listed in the Descriptor.
> - @param[in] Address The Flash Linear Address must fall within a region
> for which BIOS has access permissions.
> - @param[in] ByteCount Number of bytes in the data portion of the SPI
> cycle.
> - @param[in] Buffer Pointer to caller-allocated buffer containing the
> data sent during the SPI cycle.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_WRITE) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN FLASH_REGION_TYPE FlashRegionType,
> - IN UINT32 Address,
> - IN UINT32 ByteCount,
> - IN UINT8 *Buffer
> - );
> -
> -/**
> - Erase some area on the flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] FlashRegionType The Flash Region type for flash cycle which is
> listed in the Descriptor.
> - @param[in] Address The Flash Linear Address must fall within a region
> for which BIOS has access permissions.
> - @param[in] ByteCount Number of bytes in the data portion of the SPI
> cycle.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_ERASE) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN FLASH_REGION_TYPE FlashRegionType,
> - IN UINT32 Address,
> - IN UINT32 ByteCount
> - );
> -
> -/**
> - Read SFDP data from the flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] ComponentNumber The Componen Number for chip select
> - @param[in] Address The starting byte address for SFDP data read.
> - @param[in] ByteCount Number of bytes in SFDP data portion of the SPI
> cycle
> - @param[out] SfdpData The Pointer to caller-allocated buffer containing
> the SFDP data received
> - It is the caller's responsibility to make sure Buffer is large
> enough for the total number of bytes read
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN UINT8 ComponentNumber,
> - IN UINT32 Address,
> - IN UINT32 ByteCount,
> - OUT UINT8 *SfdpData
> - );
> -
> -/**
> - Read Jedec Id from the flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] ComponentNumber The Componen Number for chip select
> - @param[in] ByteCount Number of bytes in JedecId data portion of the
> SPI cycle, the data size is 3 typically
> - @param[out] JedecId The Pointer to caller-allocated buffer containing
> JEDEC ID received
> - It is the caller's responsibility to make sure Buffer is large
> enough for the total number of bytes read.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN UINT8 ComponentNumber,
> - IN UINT32 ByteCount,
> - OUT UINT8 *JedecId
> - );
> -
> -/**
> - Write the status register in the flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] ByteCount Number of bytes in Status data portion of the SPI
> cycle, the data size is 1 typically
> - @param[in] StatusValue The Pointer to caller-allocated buffer containing
> the value of Status register writing
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN UINT32 ByteCount,
> - IN UINT8 *StatusValue
> - );
> -
> -/**
> - Read status register in the flash part.
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] ByteCount Number of bytes in Status data portion of the SPI
> cycle, the data size is 1 typically
> - @param[out] StatusValue The Pointer to caller-allocated buffer
> containing the value of Status register received.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN UINT32 ByteCount,
> - OUT UINT8 *StatusValue
> - );
> -
> -/**
> - Get the SPI region base and size, based on the enum type
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] FlashRegionType The Flash Region type for for the base
> address which is listed in the Descriptor.
> - @param[out] BaseAddress The Flash Linear Address for the Region 'n'
> Base
> - @param[out] RegionSize The size for the Region 'n'
> -
> - @retval EFI_SUCCESS Read success
> - @retval EFI_INVALID_PARAMETER Invalid region type given
> - @retval EFI_DEVICE_ERROR The region is not used
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN FLASH_REGION_TYPE FlashRegionType,
> - OUT UINT32 *BaseAddress,
> - OUT UINT32 *RegionSize
> - );
> -
> -/**
> - Read PCH Soft Strap Values
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
> - @param[in] ByteCount Number of bytes in SoftStrap data portion of the
> SPI cycle
> - @param[out] SoftStrapValue The Pointer to caller-allocated buffer
> containing PCH Soft Strap Value.
> - If the value of ByteCount is 0, the data type of
> SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap
> Length
> - It is the caller's responsibility to make sure Buffer is large
> enough for the total number of bytes read.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN UINT32 SoftStrapAddr,
> - IN UINT32 ByteCount,
> - OUT VOID *SoftStrapValue
> - );
> -
> -/**
> - Read CPU Soft Strap Values
> -
> - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
> - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
> - @param[in] ByteCount Number of bytes in SoftStrap data portion of the
> SPI cycle.
> - @param[out] SoftStrapValue The Pointer to caller-allocated buffer
> containing CPU Soft Strap Value.
> - If the value of ByteCount is 0, the data type of
> SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap
> Length
> - It is the caller's responsibility to make sure Buffer is large
> enough for the total number of bytes read.
> -
> - @retval EFI_SUCCESS Command succeed.
> - @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
> - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
> -**/
> -typedef
> -EFI_STATUS
> -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
> - IN PCH_SPI_PROTOCOL *This,
> - IN UINT32 SoftStrapAddr,
> - IN UINT32 ByteCount,
> - OUT VOID *SoftStrapValue
> - );
> -
> -/**
> - These protocols/PPI allows a platform module to perform SPI operations
> through the
> - Intel PCH SPI Host Controller Interface.
> -**/
> -struct _PCH_SPI_PROTOCOL {
> - /**
> - This member specifies the revision of this structure. This field is used to
> - indicate backwards compatible changes to the protocol.
> - **/
> - UINT8 Revision;
> - PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash
> part.
> - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash
> part. Remark: Erase may be needed before write to the flash part.
> - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the
> flash part.
> - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data
> from the flash part.
> - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id
> from the flash part.
> - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status
> register in the flash part.
> - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status
> register in the flash part.
> - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI
> region base and size
> - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft
> Strap Values
> - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft
> Strap Values
> -};
> -
> -/**
> - PCH SPI PPI/PROTOCOL revision number
> -
> - Revision 1: Initial version
> -**/
> -#define PCH_SPI_SERVICES_REVISION 1
> -
> -#endif
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
> index 31f4ffe43a23..c6bc1ad406c8 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i
> +++ nf
> @@ -32,6 +32,7 @@ [LibraryClasses]
>
> [Packages]
> MdePkg/MdePkg.dec
> + IntelSiliconPkg/IntelSiliconPkg.dec
> KabylakeSiliconPkg/SiPkg.dec
>
> [Sources]
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
> index 964489064a74..819dc2439f30 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
> @@ -30,6 +30,7 @@ [LibraryClasses]
>
> [Packages]
> MdePkg/MdePkg.dec
> +IntelSiliconPkg/IntelSiliconPkg.dec
> KabylakeSiliconPkg/SiPkg.dec
> KabylakeSiliconPkg/KabylakeSiliconPrivate.dec
>
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
> b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
> index 5ff7b39ca60e..d9ae9f6dfd91 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
> +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
> @@ -294,13 +294,11 @@ [Protocols]
> ##
> ## PCH
> ##
> -gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26,
> 0x9d, 0xe, 0xf3, 0x4a}} gPchSerialGpioProtocolGuid = {0xf52c3858, 0x5ef8,
> 0x4d41, {0x83, 0x4e, 0xc3, 0x9e, 0xef, 0x8a, 0x45, 0xa3}} gWdtProtocolGuid =
> {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5b, 0xe6, 0xcf, 0x09, 0xb1}}
> gPchInfoProtocolGuid = {0x984eb4e9, 0x5a95, 0x41de, {0xaa, 0xd0, 0x53, 0x66,
> 0x8c, 0xa5, 0x13, 0xc0}} gPchSerialIoUartDebugInfoProtocolGuid =
> {0x2fd2b1bd, 0x0387, 0x4ec6, {0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}}
> gEfiSmmSmbusProtocolGuid = {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c,
> 0x93, 0x4a, 0x9e, 0x9c, 0x0c}} -gPchSmmSpiProtocolGuid = {0x56521f06,
> 0xa62, 0x4822, {0x99, 0x63, 0xdf, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
> gPchSmmIoTrapControlGuid = {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0x70,
> 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}} gPchTcoSmiDispatchProtocolGuid =
> {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}}
> gPchPcieSmiDispatchProtocolGuid = {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, 0x6b,
> 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}} @@ -361,7 +359,6 @@ [Ppis] ## PCH ##
> gWdtPpiGuid = {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x21,
> 0x83, 0x57, 0x0d}} -gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82,
> 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}} gPeiSmbusPolicyPpiGuid =
> {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}}
> gPchResetCallbackPpiGuid = {0x17865dc0, 0x0b8b, 0x4da8, {0x8b, 0x42, 0x7c,
> 0x46, 0xb8, 0x5c, 0xca, 0x4d}} gPchResetPpiGuid = {0x433e0f9f, 0x05ae,
> 0x410a, {0xa0, 0xc3, 0xbf, 0x29, 0x8e, 0xcb, 0x25, 0xac}}
> --
> 2.28.0.windows.1
^ permalink raw reply [flat|nested] 44+ messages in thread
* [edk2-platforms][PATCH v1 34/35] SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (32 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 33/35] KabylakeSiliconPkg: " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 35/35] TigerlakeSiliconPkg: Remove PCH SPI PPI and " Michael Kubacki
2021-05-13 21:18 ` [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Nate DeSimone
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
gEfiSmmSpiProtocolGuid is now declared in IntelSiliconPkg.dec. This
change updates Ich10Pkg to remove the protocol declaration in the
package and update libraries and modules to use the protocol from
IntelSiliconPkg.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 24 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 4 +-
Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec | 5 -
Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h | 295 --------------------
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 26 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 3 +-
6 files changed, 29 insertions(+), 328 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index f2907ef53bfc..fc2a8be76b6a 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -158,7 +158,7 @@ PchPmTimerStallRuntimeSafe (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -197,7 +197,7 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -235,7 +235,7 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount
@@ -274,7 +274,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -328,7 +328,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -379,7 +379,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -414,7 +414,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -450,7 +450,7 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
@@ -510,7 +510,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -568,7 +568,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -626,7 +626,7 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
@@ -897,7 +897,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
index 0baf730a4823..e4a81f91316c 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
@@ -92,11 +92,11 @@ InstallPchSpi (
return Status;
}
//
- // Install the SMM EFI_SPI_PROTOCOL interface
+ // Install the SMM PCH_SPI_PROTOCOL interface
//
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gEfiSmmSpiProtocolGuid,
+ &gPchSmmSpiProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
index 8d395a8b4370..58850f54e95c 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
+++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
@@ -13,8 +13,3 @@ [Defines]
[Includes]
Include
-
-[Ppis]
-
-[Protocols]
- gEfiSmmSpiProtocolGuid = {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0xb2, 0x6f, 0x1f, 0xc6, 0xb4, 0x37}}
diff --git a/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h b/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
deleted file mode 100644
index b0c5b3d0e624..000000000000
--- a/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/** @file
- This file defines the PCH SPI Protocol which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID gEfiSpiProtocolGuid;
-extern EFI_GUID gEfiSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL EFI_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
- Flash Region Type
-**/
-typedef enum {
- FlashRegionDescriptor,
- FlashRegionBios,
- FlashRegionMe,
- FlashRegionGbE,
- FlashRegionPlatformData,
- FlashRegionDer,
- FlashRegionAll,
- FlashRegionMax
-} FLASH_REGION_TYPE;
-
-
-//
-// Protocol member functions
-//
-
-/**
- Read data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *Buffer
- );
-
-/**
- Write data to the flash part. Remark: Erase may be needed before write to the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- IN UINT8 *Buffer
- );
-
-/**
- Erase some area on the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_ERASE) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount
- );
-
-/**
- Read SFDP data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] Address The starting byte address for SFDP data read.
- @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
- @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *SfdpData
- );
-
-/**
- Read Jedec Id from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
- @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 ByteCount,
- OUT UINT8 *JedecId
- );
-
-/**
- Write the status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- IN UINT8 *StatusValue
- );
-
-/**
- Read status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- OUT UINT8 *StatusValue
- );
-
-/**
- Get the SPI region base and size, based on the enum type
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
- @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
- @param[out] RegionSize The size for the Region 'n'
-
- @retval EFI_SUCCESS Read success
- @retval EFI_INVALID_PARAMETER Invalid region type given
- @retval EFI_DEVICE_ERROR The region is not used
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- OUT UINT32 *BaseAddress,
- OUT UINT32 *RegionSize
- );
-
-/**
- Read PCH Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- Read CPU Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- These protocols/PPI allows a platform module to perform SPI operations through the
- Intel PCH SPI Host Controller Interface.
-**/
-struct _PCH_SPI_PROTOCOL {
- /**
- This member specifies the revision of this structure. This field is used to
- indicate backwards compatible changes to the protocol.
- **/
- UINT8 Revision;
- PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
- PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
- PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
- PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
- PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
- PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
- PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
- PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
- PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
- PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
-};
-
-/**
- PCH SPI PPI/PROTOCOL revision number
-
- Revision 1: Initial version
-**/
-#define PCH_SPI_SERVICES_REVISION 1
-
-#endif
diff --git a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
index cf60f1fd5881..2c8162ac8170 100644
--- a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
@@ -48,7 +48,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- EFI_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT16 ReadPermission;
@@ -148,7 +148,7 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -171,7 +171,7 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -193,7 +193,7 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount
@@ -216,7 +216,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -298,7 +298,7 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
@@ -321,7 +321,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -344,7 +344,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -367,7 +367,7 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
@@ -388,7 +388,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
index 7b60d36c5b9c..35655ed5b5aa 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
@@ -28,6 +28,7 @@ [Defines]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
SimicsIch10Pkg/Ich10Pkg.dec
[Sources]
@@ -36,7 +37,7 @@ [Sources]
[Protocols]
- gEfiSmmSpiProtocolGuid # PRODUCES #SERVER_BIOS
+ gPchSmmSpiProtocolGuid # PRODUCES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* [edk2-platforms][PATCH v1 35/35] TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (33 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 34/35] SimicsIch10Pkg: Remove PCH SPI SMM " Michael Kubacki
@ 2021-04-16 2:31 ` Michael Kubacki
2021-05-13 21:18 ` [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Nate DeSimone
35 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-04-16 2:31 UTC (permalink / raw)
To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in TigerlakeSiliconPkg are removed and libs/
modules that need to reference IntelSiliconPkg are updated.
1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h | 301 --------------------
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 3 -
5 files changed, 3 insertions(+), 304 deletions(-)
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h b/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h
deleted file mode 100644
index c13dc5a5f5f5..000000000000
--- a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,301 +0,0 @@
-/** @file
- This file defines the PCH SPI Protocol which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
- Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID gPchSpiProtocolGuid;
-extern EFI_GUID gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
- Flash Region Type
-**/
-typedef enum {
- FlashRegionDescriptor,
- FlashRegionBios,
- FlashRegionMe,
- FlashRegionGbE,
- FlashRegionPlatformData,
- FlashRegionDer,
- FlashRegionSecondaryBios,
- FlashRegionuCodePatch,
- FlashRegionEC,
- FlashRegionDeviceExpansion2,
- FlashRegionIE,
- FlashRegion10Gbe_A,
- FlashRegion10Gbe_B,
- FlashRegion13,
- FlashRegion14,
- FlashRegion15,
- FlashRegionAll,
- FlashRegionMax
-} FLASH_REGION_TYPE;
-//
-// Protocol member functions
-//
-
-/**
- Read data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *Buffer
- );
-
-/**
- Write data to the flash part. Remark: Erase may be needed before write to the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- IN UINT8 *Buffer
- );
-
-/**
- Erase some area on the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_ERASE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount
- );
-
-/**
- Read SFDP data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] Address The starting byte address for SFDP data read.
- @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
- @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *SfdpData
- );
-
-/**
- Read Jedec Id from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
- @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 ByteCount,
- OUT UINT8 *JedecId
- );
-
-/**
- Write the status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- IN UINT8 *StatusValue
- );
-
-/**
- Read status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- OUT UINT8 *StatusValue
- );
-
-/**
- Get the SPI region base and size, based on the enum type
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
- @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
- @param[out] RegionSize The size for the Region 'n'
-
- @retval EFI_SUCCESS Read success
- @retval EFI_INVALID_PARAMETER Invalid region type given
- @retval EFI_DEVICE_ERROR The region is not used
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- OUT UINT32 *BaseAddress,
- OUT UINT32 *RegionSize
- );
-
-/**
- Read PCH Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- Read CPU Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- These protocols/PPI allows a platform module to perform SPI operations through the
- Intel PCH SPI Host Controller Interface.
-**/
-struct _PCH_SPI_PROTOCOL {
- /**
- This member specifies the revision of this structure. This field is used to
- indicate backwards compatible changes to the protocol.
- **/
- UINT8 Revision;
- PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
- PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
- PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
- PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
- PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
- PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
- PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
- PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
- PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
- PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
-};
-
-/**
- PCH SPI PPI/PROTOCOL revision number
-
- Revision 1: Initial version
-**/
-#define PCH_SPI_SERVICES_REVISION 1
-
-#endif
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
index a1a54677457e..2686dff41e25 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
@@ -19,6 +19,7 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
[LibraryClasses]
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
index 033134cea171..f64b84880b31 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
@@ -30,6 +30,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf b/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
index 4941ff0f498d..95182e50651e 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
@@ -49,6 +49,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
index 37f61cc5ee18..7cdbb3748155 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
@@ -624,11 +624,9 @@ [Protocols]
## PCH
##
gThcProtocolGuid = {0x00860921, 0x7B9B, 0x4EA8, {0xAD, 0x23, 0x3C, 0xCA, 0x33, 0x9E, 0x7D, 0xFE}}
-gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26, 0x9d, 0xe, 0xf3, 0x4a}}
gWdtProtocolGuid = {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5b, 0xe6, 0xcf, 0x09, 0xb1}}
gPchSerialIoUartDebugInfoProtocolGuid = {0x2fd2b1bd, 0x0387, 0x4ec6, {0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}}
gEfiSmmSmbusProtocolGuid = {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}}
-gPchSmmSpiProtocolGuid = {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
gPchSmmIoTrapControlGuid = {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}}
gPchTcoSmiDispatchProtocolGuid = {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}}
gPchPcieSmiDispatchProtocolGuid = {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}}
@@ -751,7 +749,6 @@ [Ppis]
## PCH
##
gWdtPpiGuid = {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x21, 0x83, 0x57, 0x0d}}
-gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}}
gPeiSmbusPolicyPpiGuid = {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}}
##
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 44+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances
2021-04-16 2:31 [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
` (34 preceding siblings ...)
2021-04-16 2:31 ` [edk2-platforms][PATCH v1 35/35] TigerlakeSiliconPkg: Remove PCH SPI PPI and " Michael Kubacki
@ 2021-05-13 21:18 ` Nate DeSimone
2021-05-19 4:21 ` Michael Kubacki
35 siblings, 1 reply; 44+ messages in thread
From: Nate DeSimone @ 2021-05-13 21:18 UTC (permalink / raw)
To: devel@edk2.groups.io, Michael Kubacki
Cc: Agyeman, Prince, Chiu, Chasel, Kethi Reddy, Deepika, Dong, Eric,
Luo, Heng, Jeremy Soller, Esakkithevar, Kathappan, Liming Gao,
Chaganty, Rangasai V, mikuback@linux.microsoft.com
Hi Michael,
You patch series does not apply to edk2-platforms master branch. I tried both today's tip and a snapshot from Apr. 15 and I could not get your series to apply at either point in history. Based on some of the SHA data I see in the series I suspect you didn't have the parent of this patch series derive from a commit on master branch at the time you generated it. Please rebase your patch series to latest master branch and send it again.
Thanks,
Nate
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, April 15, 2021 7:31 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Kethi Reddy, Deepika <deepika.kethi.reddy@intel.com>; Dong, Eric <eric.dong@intel.com>; Luo, Heng <heng.luo@intel.com>; Jeremy Soller <jeremy@system76.com>; Esakkithevar, Kathappan <kathappan.esakkithevar@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
SpiFlashCommonLib is duplicated in multiple places across the MinPlatform design in edk2-platforms.I'm planning to build some additional functionality on top of SpiFlashCommonLib and, ideally, this duplication will be consolidated into a single instance usable across all current library consumers.
This patch series focuses on consolidating the various SpiFlashCommonLib instances as agreed upon in https://edk2.groups.io/g/devel/message/71701.
Read the BZ for more general background around this series.
I only have an UpXtreme board on hand so maintainers/reviewers of other board packages should test these changes on those boards.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Michael Kubacki (35):
CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
IntelSiliconPkg: Add BIOS area base address and size PCDs
IntelSiliconPkg: Add microcode FV PCDs
IntelSiliconPkg: Add PCH SPI PPI
IntelSiliconPkg: Add PCH SPI Protocol
IntelSiliconPkg: Add SpiFlashCommonLib
IntelSiliconPkg: Add SmmSpiFlashCommonLib
IntelSiliconPkg: Add MM SPI FVB services
CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs
CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
MinPlatformPkg: Remove SpiFvbService modules
CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib
SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
MinPlatformPkg: Remove SpiFlashCommonLibNull
KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 -------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c | 4 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c | 8 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c | 0
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c | 0
{Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 3 +-
{Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c | 12 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 -------------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 194 -------------
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 26 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 +-
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 42 +--
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 2 +-
Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 10 +-
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 44 +--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 10 +-
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 44 +--
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +-
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 1 +
Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h | 98 -------
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 2 -
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 6 -
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 9 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8 +-
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 8 +-
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 +-
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 40 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 2 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 10 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf | 42 +--
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | 10 +-
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | 42 +--
Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h | 295 --------------------
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 51 ----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 8 -
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h | 0
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 6 +-
{Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf | 6 +-
Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h | 2 +-
Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h | 4 +-
Silicon/Intel/{TigerlakeSiliconPkg => IntelSiliconPkg}/Include/Protocol/Spi.h | 0
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 19 ++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 17 ++
{Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 21 +-
{Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf | 3 +-
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 3 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h | 98 -------
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h | 26 --
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h | 293 -------------------
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 53 ----
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 13 +-
Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec | 11 -
Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h | 98 -------
Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h | 295 --------------------
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 26 +-
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 50 ----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 5 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 3 +-
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 8 -
89 files changed, 323 insertions(+), 2407 deletions(-) delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c (96%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c (94%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c (100%) rename Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c (100%) rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c (95%) rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c (83%) delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
delete mode 100644 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf (88%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf (88%) rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h (96%) rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h (85%) rename Silicon/Intel/{TigerlakeSiliconPkg => IntelSiliconPkg}/Include/Protocol/Spi.h (100%) rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf (69%) rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf (91%) delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
--
2.28.0.windows.1
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^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances
2021-05-13 21:18 ` [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances Nate DeSimone
@ 2021-05-19 4:21 ` Michael Kubacki
0 siblings, 0 replies; 44+ messages in thread
From: Michael Kubacki @ 2021-05-19 4:21 UTC (permalink / raw)
To: Desimone, Nathaniel L, devel@edk2.groups.io, Michael Kubacki
Cc: Agyeman, Prince, Chiu, Chasel, Kethi Reddy, Deepika, Dong, Eric,
Luo, Heng, Jeremy Soller, Esakkithevar, Kathappan, Liming Gao,
Chaganty, Rangasai V
Hi Nate,
The v1 series was based on commit 7545558.
It did not apply cleanly for me on the current master due to some
conflicting changes that have gone in since the series, mainly a series
related to ucode PCDs in the FDFs and another related to
ReportCpuHobLib. I rebased the series in v2 and it applied cleanly on
the current edk2-platforms master (32183bd) for me.
V2 series: https://edk2.groups.io/g/devel/message/75306
However, IntelSiliconPkg currently has a build error due to a change
that went in last week. Bug is filed
https://bugzilla.tianocore.org/show_bug.cgi?id=3404 and patch is sent
for that - https://edk2.groups.io/g/devel/message/75342.
**MAINTAINERS**: This patch series has been on the list for over 1 month
and has only received a couple of reviews. PLEASE be more prompt with v2.
Thanks,
Michael
On 5/13/2021 2:18 PM, Desimone, Nathaniel L wrote:
> Hi Michael,
>
> You patch series does not apply to edk2-platforms master branch. I tried both today's tip and a snapshot from Apr. 15 and I could not get your series to apply at either point in history. Based on some of the SHA data I see in the series I suspect you didn't have the parent of this patch series derive from a commit on master branch at the time you generated it. Please rebase your patch series to latest master branch and send it again.
>
> Thanks,
> Nate
>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
> Sent: Thursday, April 15, 2021 7:31 PM
> To: devel@edk2.groups.io
> Cc: Agyeman, Prince <prince.agyeman@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Kethi Reddy, Deepika <deepika.kethi.reddy@intel.com>; Dong, Eric <eric.dong@intel.com>; Luo, Heng <heng.luo@intel.com>; Jeremy Soller <jeremy@system76.com>; Esakkithevar, Kathappan <kathappan.esakkithevar@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Subject: [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances
>
> From: Michael Kubacki <michael.kubacki@microsoft.com>
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>
> SpiFlashCommonLib is duplicated in multiple places across the MinPlatform design in edk2-platforms.I'm planning to build some additional functionality on top of SpiFlashCommonLib and, ideally, this duplication will be consolidated into a single instance usable across all current library consumers.
>
> This patch series focuses on consolidating the various SpiFlashCommonLib instances as agreed upon in https://edk2.groups.io/g/devel/message/71701.
>
> Read the BZ for more general background around this series.
>
> I only have an UpXtreme board on hand so maintainers/reviewers of other board packages should test these changes on those boards.
>
> Cc: Agyeman Prince <prince.agyeman@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Heng Luo <heng.luo@intel.com>
> Cc: Jeremy Soller <jeremy@system76.com>
> Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
>
> Michael Kubacki (35):
> CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
> WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
> CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
> IntelSiliconPkg: Add BIOS area base address and size PCDs
> IntelSiliconPkg: Add microcode FV PCDs
> IntelSiliconPkg: Add PCH SPI PPI
> IntelSiliconPkg: Add PCH SPI Protocol
> IntelSiliconPkg: Add SpiFlashCommonLib
> IntelSiliconPkg: Add SmmSpiFlashCommonLib
> IntelSiliconPkg: Add MM SPI FVB services
> CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
> TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs
> CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
> KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
> SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
> TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
> WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
> MinPlatformPkg: Remove SpiFvbService modules
> CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
> KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib
> SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
> TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
> MinPlatformPkg: Remove SpiFlashCommonLibNull
> KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
> CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
> KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
> SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
> TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
>
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 -------------
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c | 0
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c | 4 +-
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c | 8 +-
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c | 0
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c | 0
> Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c | 0
> {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 3 +-
> {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c | 12 +-
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 196 -------------
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
> Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 194 -------------
> Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c | 54 ----
> Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 26 +-
> Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 4 +-
> Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
> Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
> Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 +-
> Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 42 +--
> Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 2 +-
> Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
> Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
> Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf | 4 +-
> Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 10 +-
> Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 44 +--
> Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf | 4 +-
> Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 10 +-
> Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 44 +--
> Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +-
> Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 1 +
> Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h | 98 -------
> Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 2 -
> Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc | 6 -
> Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 9 +-
> Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
> Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8 +-
> Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 8 +-
> Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
> Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 +-
> Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 40 +--
> Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 4 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
> Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf | 4 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf | 4 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 2 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | 10 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf | 42 +--
> Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | 10 +-
> Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | 42 +--
> Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 +-
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h | 295 --------------------
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 1 +
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 51 ----
> Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
> Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 8 -
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h | 0
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h | 0
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf | 6 +-
> {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf | 6 +-
> Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h | 2 +-
> Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h | 4 +-
> Silicon/Intel/{TigerlakeSiliconPkg => IntelSiliconPkg}/Include/Protocol/Spi.h | 0
> Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 19 ++
> Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 17 ++
> {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 21 +-
> {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf | 3 +-
> Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf | 4 +-
> Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 3 +-
> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h | 98 -------
> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h | 26 --
> Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h | 293 -------------------
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1 +
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 53 ----
> Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1 +
> Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 13 +-
> Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec | 11 -
> Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h | 98 -------
> Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h | 295 --------------------
> Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 26 +-
> Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 50 ----
> Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 5 +-
> Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 3 +-
> Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf | 1 +
> Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 1 +
> Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf | 1 +
> Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 8 -
> 89 files changed, 323 insertions(+), 2407 deletions(-) delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
> delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
> rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c (96%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c (94%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c (100%) rename Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c (100%) rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c (95%) rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c (83%) delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
> delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
> delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
> delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
> delete mode 100644 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
> delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
> delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
> rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h (100%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf (88%) rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf (88%) rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h (96%) rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h (85%) rename Silicon/Intel/{TigerlakeSiliconPkg => IntelSiliconPkg}/Include/Protocol/Spi.h (100%) rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf (69%) rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf (91%) delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
> delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
> delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
> delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
> delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h
> delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
> delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
>
> --
> 2.28.0.windows.1
>
>
>
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