From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) by mx.groups.io with SMTP id smtpd.web12.6342.1618822173381816738 for ; Mon, 19 Apr 2021 01:49:33 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=JVbhN6ZQ; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.208.47, mailfrom: mw@semihalf.com) Received: by mail-ed1-f47.google.com with SMTP id j12so14636059edy.3 for ; Mon, 19 Apr 2021 01:49:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pbDe3ZTFnhLBaXKZHQ2y8hh1rhBNyRHuyqtnfDisL3g=; b=JVbhN6ZQd7WEhIWEmqh9RWnrUOTvn1AtIXdsABUCOM/8ADHADeRoNGOTkZbzo7HW1N LuM3RysYRkxdymswurLhP8hRgJqCJplhzueVjDjrArD2defve3FCuZ+Z83U6azWgKT5Y KAvtfIPtqbOF8UXqyrMcbLU/O806Clvxx0Ud1O2dhZUgnBsme9cIAWoKeZGMZbILYkT5 4Z+O0viq9lop4thG9gb0yZi5CNJMlUEryPvyeZG6ah5KhwURekEajwMrvRw+17tAAoZS sQvRG9hQUWG1oPfS7rt9i+yHeP/Gs+VLtkKeFRklhhPz3XFMnfGB2Jc6RbetVbPqzJBw PxAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pbDe3ZTFnhLBaXKZHQ2y8hh1rhBNyRHuyqtnfDisL3g=; b=WIWTl9a1L7DwBFnXJGcL/fHW9ODMF/TuIaZSSwb63EdlLZIQ4JeeJ+EHw3tc30A199 Op92jqkV7keNv4Vum942wchw8IjEwImTGRqTlx0lFD4xkvelYCl8LSWKvVJQQqPoOKNV S3wZmNPgdoxd4xaA2X1i0LfexdNBWILn6Q14nqxP0Qm5nb+H4OOVoSS6EWeXOLq736w+ plmhTTYi5xo1lsspDuTAfXvJ3Fk7puVYXPObCiaOFdOJIr13zA4wE1hRHclmhTksDMIL 5NoEMrZNt1CmiW7mOL8erZxlPD1U7IhyekrYuCMOU/RyqOHojkFeywrdsjKndV7RUdHJ MSZA== X-Gm-Message-State: AOAM53329AF15Suq+03jlcs9YyZ5TPKvyCq0ksQVaz8JiNvkNJXo1xt3 8CXvXeLSEzxzs7pKsmq/So3dQ1DQXpDwAQ== X-Google-Smtp-Source: ABdhPJzu7/HqDdrI50+CpfBF0VZW9XAiUuwoztt02dBsB0kDTNJnDfxMbhxsCvbyPZGfr2sWEYYQCw== X-Received: by 2002:a50:e702:: with SMTP id a2mr24753757edn.3.1618822171957; Mon, 19 Apr 2021 01:49:31 -0700 (PDT) Return-Path: Received: from gilgamesh.semihalf.com (host-193.106.246.138.static.3s.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id z17sm12351102edx.36.2021.04.19.01.49.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Apr 2021 01:49:31 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif@nuviainc.com, ardb+tianocore@kernel.org, mw@semihalf.com, jaz@semihalf.com, kostap@marvell.com, upstream@semihalf.com Subject: [edk2-platforms PATCH 4/6] Marvell/Armada70x0Db: Introduce SD/MMC ACPI description Date: Mon, 19 Apr 2021 10:48:59 +0200 Message-Id: <20210419084901.380576-5-mw@semihalf.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20210419084901.380576-1-mw@semihalf.com> References: <20210419084901.380576-1-mw@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable This patch adds a new description of the board's SD/MMC interfaces in DSDT table that can work with the newly introduced support in Linux. Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 56 +++++++++= +++++++++++ 1 file changed, 56 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/= Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl index af6dbdaef0..d4902652ec 100644 --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl @@ -62,6 +62,62 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMAD= A7K", 3) })=0D }=0D =0D + Device (MMC0)=0D + {=0D + Name (_HID, "MRVL0002") // _HID: Hardware ID=0D + Name (_UID, 0x00) // _UID: Unique ID=0D + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute= =0D +=0D + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Set= tings=0D + {=0D + Memory32Fixed (ReadWrite,=0D + 0xF06E0000, // Address Base (MMIO)=0D + 0x00000300, // Address Length=0D + )=0D + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,= ,, )=0D + {=0D + 48=0D + }=0D + })=0D + Name (_DSD, Package () {=0D + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),=0D + Package () {=0D + Package () { "clock-frequency", 400000000 },=0D + Package () { "bus-width", 4 },=0D + Package () { "marvell,xenon-phy-slow-mode", 0x1 },=0D + Package () { "no-1-8-v", 0x1 },=0D + Package () { "non-removable", 0x1 },=0D + }=0D + })=0D + }=0D +=0D + Device (MMC1)=0D + {=0D + Name (_HID, "MRVL0004") // _HID: Hardware ID=0D + Name (_UID, 0x01) // _UID: Unique ID=0D + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute= =0D +=0D + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Set= tings=0D + {=0D + Memory32Fixed (ReadWrite,=0D + 0xF2780000, // Address Base (MMIO)=0D + 0x00000300, // Address Length=0D + )=0D + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,= ,, )=0D + {=0D + CP_GIC_SPI_CP0_SDMMC=0D + }=0D + })=0D + Name (_DSD, Package () {=0D + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),=0D + Package () {=0D + Package () { "clock-frequency", 400000000 },=0D + Package () { "bus-width", 4 },=0D + Package () { "non-removable", 0x1 },=0D + }=0D + })=0D + }=0D +=0D Device (XHC0)=0D {=0D Name (_HID, "PNP0D10") // _HID: Hardware ID=0D --=20 2.29.0