From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web11.2187.1619361707983443525 for ; Sun, 25 Apr 2021 07:41:48 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: yun.lou@intel.com) IronPort-SDR: hbjC79jjn5y7VP2WNhDjjNlTte84tyu0xOeaX+C0C365sE2WWbPXYf5C3zBgEHHqWH0DzYG26T yrnpvwLUdJ+A== X-IronPort-AV: E=McAfee;i="6200,9189,9965"; a="216931739" X-IronPort-AV: E=Sophos;i="5.82,250,1613462400"; d="scan'208";a="216931739" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2021 07:41:47 -0700 IronPort-SDR: vvYbutZI1J9wwjh2ncV/RfcEz5Wf+DbcV8Fd2xbF/L0D5OppzfWnygUjkNtaYoVvKNbn5z45Mv 7wu6LLW2M56g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,250,1613462400"; d="scan'208";a="429053663" Received: from shwdeopenlab102.ccr.corp.intel.com ([10.239.183.74]) by orsmga008.jf.intel.com with ESMTP; 25 Apr 2021 07:41:45 -0700 From: "Jason Lou" To: devel@edk2.groups.io Cc: Jason Lou , Chasel Chiu , Nate DeSimone , Star Zeng , Ray Ni Subject: [PATCH v1] Intel/TigerlakeOpenBoardPkg: Simplify microcode related PCD usage Date: Sun, 25 Apr 2021 22:41:36 +0800 Message-Id: <20210425144137.16411-3-yun.lou@intel.com> X-Mailer: git-send-email 2.28.0.windows.1 In-Reply-To: <20210425144137.16411-1-yun.lou@intel.com> References: <20210425144137.16411-1-yun.lou@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jason Lou REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3334 There are following PCDs in IntelFsp2WrapperPkg for microcode location: * IntelFsp2WrapperPkg: PcdCpuMicrocodePatchAddress PcdCpuMicrocodePatchRegionSize PcdFlashMicrocodeOffset The change simplify the platform code to use following PCDs instead: * MinPlatformPkg PcdFlashFvMicrocodeOffset PcdFlashFvMicrocodeBase =3D $(BIOS_BASE) + PcdFlashFvMicrocodeOffset PcdFlashFvMicrocodeSize PcdMicrocodeOffsetInFv Signed-off-by: Jason Lou Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ray Ni --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 4 +-= -- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPk= g.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf index 0f645ed63e..c1fd2be6af 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf @@ -47,14 +47,12 @@ SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(= gSiPkgTokenSpaceGuid.PcdBio SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize)=0D SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicroc= odeOffset)=0D SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMic= rocodeOffset)=0D -SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gUef= iCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress)=0D -SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(g= UefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize)=0D -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset =3D $(gSiPkgTo= kenSpaceGuid.PcdFlashMicrocodeOffset)=0D SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress=0D SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize=0D SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgTokenSp= aceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashF= vFspTOffset)=0D SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgTokenSp= aceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashF= vFspMOffset)=0D SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgTokenSp= aceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashF= vFspSOffset)=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeOffset=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset=0D --=20 2.28.0.windows.1