From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.10477.1620726537998796077 for ; Tue, 11 May 2021 02:48:59 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: nathaniel.l.desimone@intel.com) IronPort-SDR: 6nMdICrpDLLIsLG9ZgnnzwvSc05iLjb68CRF5kzGvnQPTEKkqGdy7e9UNBMXaBWdd6d+GkAm2Y 3jizFWXimkng== X-IronPort-AV: E=McAfee;i="6200,9189,9980"; a="178994725" X-IronPort-AV: E=Sophos;i="5.82,290,1613462400"; d="scan'208";a="178994725" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2021 02:48:55 -0700 IronPort-SDR: qqz3zuRXIWa4RUuWed04qkjaTFlsR2cMSaysEcRC/Ww32K8DJaJo1pX6Eba6Jf1+4GWgSTC8D4 UDf2C3i8PFJA== X-IronPort-AV: E=Sophos;i="5.82,290,1613462400"; d="scan'208";a="436574022" Received: from nldesimo-desk1.amr.corp.intel.com ([10.209.66.229]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2021 02:48:54 -0700 From: "Nate DeSimone" To: devel@edk2.groups.io Cc: Chasel Chiu , Mike Kinney , Isaac Oram , Mohamed Abbas , Michael Kubacki , Zachary Bobroff , Harikrishna Doppalapudi Subject: [edk2-platforms] [PATCH V1 13/18] PurleyOpenBoardPkg/Acpi: Add BoardAcpiDxe Date: Tue, 11 May 2021 02:48:21 -0700 Message-Id: <20210511094826.12495-14-nathaniel.l.desimone@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: <20210511094826.12495-1-nathaniel.l.desimone@intel.com> References: <20210511094826.12495-1-nathaniel.l.desimone@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Cc: Chasel Chiu Cc: Mike Kinney Cc: Isaac Oram Cc: Mohamed Abbas Cc: Michael Kubacki Cc: Zachary Bobroff Cc: Harikrishna Doppalapudi Signed-off-by: Nate DeSimone --- .../Acpi/BoardAcpiDxe/AmlOffsetTable.c | 290 ++++++++++ .../Acpi/BoardAcpiDxe/BoardAcpiDxe.c | 547 ++++++++++++++++++ .../Acpi/BoardAcpiDxe/BoardAcpiDxe.h | 82 +++ .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 71 +++ .../Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c | 516 +++++++++++++++++ .../Acpi/BoardAcpiDxe/Dsdt.inf | 29 + 6 files changed, 1535 insertions(+) create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/AmlOffsetTable.c create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.h create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c create mode 100644 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt.inf diff --git a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/AmlOffsetTable.c b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/AmlOffsetTable.c new file mode 100644 index 0000000000..abb484172e --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/AmlOffsetTable.c @@ -0,0 +1,290 @@ +/** @file + Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +/* + * + * Intel ACPI Component Architecture + * + * + */ +#ifndef __AML_OFFSET_TABLE_H +#define __AML_OFFSET_TABLE_H + +typedef struct { + char *Pathname; /* Full pathname (from root) to the object */ + unsigned short ParentOpcode; /* AML opcode for the parent object */ + unsigned long NamesegOffset; /* Offset of last nameseg in the parent namepath */ + unsigned char Opcode; /* AML opcode for the data */ + unsigned long Offset; /* Offset for the data */ + unsigned long long Value; /* Original value of the data (as applicable) */ +} AML_OFFSET_TABLE_ENTRY; + +#endif /* __AML_OFFSET_TABLE_H */ + +/* + * Information specific to the supported object types: + * + * Integers: + * Opcode is the integer prefix, indicates length of the data + * (One of: BYTE, WORD, DWORD, QWORD, ZERO, ONE, ONES) + * Offset points to the actual integer data + * Value is the existing value in the AML + * + * Packages: + * Opcode is the package or var_package opcode + * Offset points to the package opcode + * Value is the package element count + * + * Operation Regions: + * Opcode is the address integer prefix, indicates length of the data + * Offset points to the region address + * Value is the existing address value in the AML + * + * Control Methods: + * Offset points to the method flags byte + * Value is the existing flags value in the AML + * + * Processors: + * Offset points to the first byte of the PBlock Address + * + * Resource Descriptors: + * Opcode is the descriptor type + * Offset points to the start of the descriptor + * + * Scopes/Devices/ThermalZones: + * Nameseg offset only + */ +AML_OFFSET_TABLE_ENTRY DSDT_PLATWFP__OffsetTable[] = +{ + {"PSYS", 0x5B80, 0x0000038B, 0x0C, 0x00000391, 0x0000000030584946}, /* OPERATIONREGION */ + {"_SB_.PC00.FIX1", 0x0011, 0x00000000, 0x88, 0x0000D187, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC00.FIX2", 0x0011, 0x00000000, 0x88, 0x0000D1AF, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC00.FIX5", 0x0011, 0x00000000, 0x87, 0x0000D1BF, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC00.FIX3", 0x0011, 0x00000000, 0x87, 0x0000D20D, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC00.FIX4", 0x0011, 0x00000000, 0x8A, 0x0000D227, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC01.FIX1", 0x0011, 0x00000000, 0x88, 0x0000EA9B, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC01.FIX5", 0x0011, 0x00000000, 0x87, 0x0000EAAB, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC01.FIX2", 0x0011, 0x00000000, 0x88, 0x0000EAC5, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC01.FIX6", 0x0011, 0x00000000, 0x88, 0x0000EAD5, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC01.FIX7", 0x0011, 0x00000000, 0x88, 0x0000EAE5, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC01.FIX3", 0x0011, 0x00000000, 0x87, 0x0000EAF5, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC01.FIX4", 0x0011, 0x00000000, 0x8A, 0x0000EB0F, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC01.BR1A.MCTL", 0x5B80, 0x0000EB91, 0x0C, 0x0000EB97, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC01.BR1B.MCTL", 0x5B80, 0x0000F3B2, 0x0C, 0x0000F3B8, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC01.BR1C.MCTL", 0x5B80, 0x0000FBD3, 0x0C, 0x0000FBD9, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC01.BR1D.MCTL", 0x5B80, 0x000103F4, 0x0C, 0x000103FA, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC02.FIX1", 0x0011, 0x00000000, 0x88, 0x00010E93, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC02.FIX5", 0x0011, 0x00000000, 0x87, 0x00010EA3, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC02.FIX2", 0x0011, 0x00000000, 0x88, 0x00010EBD, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC02.FIX6", 0x0011, 0x00000000, 0x88, 0x00010ECD, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC02.FIX7", 0x0011, 0x00000000, 0x88, 0x00010EDD, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC02.FIX3", 0x0011, 0x00000000, 0x87, 0x00010EED, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC02.FIX4", 0x0011, 0x00000000, 0x8A, 0x00010F07, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC02.BR2A.MCTL", 0x5B80, 0x00010F89, 0x0C, 0x00010F8F, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC02.BR2B.MCTL", 0x5B80, 0x00011969, 0x0C, 0x0001196F, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC02.BR2C.MCTL", 0x5B80, 0x0001218A, 0x0C, 0x00012190, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC02.BR2D.MCTL", 0x5B80, 0x000129AB, 0x0C, 0x000129B1, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC03.FIX1", 0x0011, 0x00000000, 0x88, 0x000133E4, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC03.FIX5", 0x0011, 0x00000000, 0x87, 0x000133F4, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC03.FIX2", 0x0011, 0x00000000, 0x88, 0x0001340E, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC03.FIX6", 0x0011, 0x00000000, 0x88, 0x0001341E, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC03.FIX7", 0x0011, 0x00000000, 0x88, 0x0001342E, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC03.FIX3", 0x0011, 0x00000000, 0x87, 0x0001343E, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC03.FIX4", 0x0011, 0x00000000, 0x8A, 0x00013458, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC03.BR3A.MCTL", 0x5B80, 0x000134DA, 0x0C, 0x000134E0, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC03.BR3B.MCTL", 0x5B80, 0x00013CFB, 0x0C, 0x00013D01, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC03.BR3C.MCTL", 0x5B80, 0x0001451C, 0x0C, 0x00014522, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC03.BR3D.MCTL", 0x5B80, 0x00014D3D, 0x0C, 0x00014D43, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC04.FIX1", 0x0011, 0x00000000, 0x88, 0x000156F0, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC04.FIX5", 0x0011, 0x00000000, 0x87, 0x00015700, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC04.FIX2", 0x0011, 0x00000000, 0x88, 0x0001571A, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC04.FIX6", 0x0011, 0x00000000, 0x88, 0x0001572A, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC04.FIX7", 0x0011, 0x00000000, 0x88, 0x0001573A, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC04.FIX3", 0x0011, 0x00000000, 0x87, 0x0001574A, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC04.FIX4", 0x0011, 0x00000000, 0x8A, 0x00015764, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC04.MCP0.MCTL", 0x5B80, 0x000157E6, 0x0C, 0x000157EC, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC05.FIX1", 0x0011, 0x00000000, 0x88, 0x0001612D, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC05.FIX5", 0x0011, 0x00000000, 0x87, 0x0001613D, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC05.FIX2", 0x0011, 0x00000000, 0x88, 0x00016157, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC05.FIX6", 0x0011, 0x00000000, 0x88, 0x00016167, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC05.FIX7", 0x0011, 0x00000000, 0x88, 0x00016177, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC05.FIX3", 0x0011, 0x00000000, 0x87, 0x00016187, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC05.FIX4", 0x0011, 0x00000000, 0x8A, 0x000161A1, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC05.MCP1.MCTL", 0x5B80, 0x00016223, 0x0C, 0x00016229, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC06.FIX1", 0x0011, 0x00000000, 0x88, 0x00016FD9, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC06.FIX5", 0x0011, 0x00000000, 0x87, 0x00016FE9, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC06.FIX2", 0x0011, 0x00000000, 0x88, 0x00017003, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC06.FIX6", 0x0011, 0x00000000, 0x88, 0x00017013, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC06.FIX7", 0x0011, 0x00000000, 0x88, 0x00017023, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC06.FIX3", 0x0011, 0x00000000, 0x87, 0x00017033, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC06.FIX4", 0x0011, 0x00000000, 0x8A, 0x0001704D, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC06.QRP0.MCTL", 0x5B80, 0x00017149, 0x0C, 0x0001714F, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC07.FIX1", 0x0011, 0x00000000, 0x88, 0x00017BC4, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC07.FIX5", 0x0011, 0x00000000, 0x87, 0x00017BD4, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC07.FIX2", 0x0011, 0x00000000, 0x88, 0x00017BEE, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC07.FIX6", 0x0011, 0x00000000, 0x88, 0x00017BFE, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC07.FIX7", 0x0011, 0x00000000, 0x88, 0x00017C0E, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC07.FIX3", 0x0011, 0x00000000, 0x87, 0x00017C1E, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC07.FIX4", 0x0011, 0x00000000, 0x8A, 0x00017C38, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC07.QR1A.MCTL", 0x5B80, 0x00017CCA, 0x0C, 0x00017CD0, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC07.QR1B.MCTL", 0x5B80, 0x00018506, 0x0C, 0x0001850C, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC07.QR1C.MCTL", 0x5B80, 0x00018D42, 0x0C, 0x00018D48, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC07.QR1D.MCTL", 0x5B80, 0x0001957E, 0x0C, 0x00019584, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC08.FIX1", 0x0011, 0x00000000, 0x88, 0x0001A04E, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC08.FIX5", 0x0011, 0x00000000, 0x87, 0x0001A05E, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC08.FIX2", 0x0011, 0x00000000, 0x88, 0x0001A078, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC08.FIX6", 0x0011, 0x00000000, 0x88, 0x0001A088, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC08.FIX7", 0x0011, 0x00000000, 0x88, 0x0001A098, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC08.FIX3", 0x0011, 0x00000000, 0x87, 0x0001A0A8, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC08.FIX4", 0x0011, 0x00000000, 0x8A, 0x0001A0C2, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC08.QR2A.MCTL", 0x5B80, 0x0001A154, 0x0C, 0x0001A15A, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC08.QR2B.MCTL", 0x5B80, 0x0001A990, 0x0C, 0x0001A996, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC08.QR2C.MCTL", 0x5B80, 0x0001B1CC, 0x0C, 0x0001B1D2, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC08.QR2D.MCTL", 0x5B80, 0x0001BA08, 0x0C, 0x0001BA0E, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC09.FIX1", 0x0011, 0x00000000, 0x88, 0x0001C461, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC09.FIX5", 0x0011, 0x00000000, 0x87, 0x0001C471, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC09.FIX2", 0x0011, 0x00000000, 0x88, 0x0001C48B, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC09.FIX6", 0x0011, 0x00000000, 0x88, 0x0001C49B, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC09.FIX7", 0x0011, 0x00000000, 0x88, 0x0001C4AB, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC09.FIX3", 0x0011, 0x00000000, 0x87, 0x0001C4BB, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC09.FIX4", 0x0011, 0x00000000, 0x8A, 0x0001C4D5, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC09.QR3A.MCTL", 0x5B80, 0x0001C567, 0x0C, 0x0001C56D, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC09.QR3B.MCTL", 0x5B80, 0x0001CDA3, 0x0C, 0x0001CDA9, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC09.QR3C.MCTL", 0x5B80, 0x0001D5DF, 0x0C, 0x0001D5E5, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC09.QR3D.MCTL", 0x5B80, 0x0001DE1B, 0x0C, 0x0001DE21, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC10.FIX1", 0x0011, 0x00000000, 0x88, 0x0001E7EE, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC10.FIX5", 0x0011, 0x00000000, 0x87, 0x0001E7FE, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC10.FIX2", 0x0011, 0x00000000, 0x88, 0x0001E818, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC10.FIX6", 0x0011, 0x00000000, 0x88, 0x0001E828, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC10.FIX7", 0x0011, 0x00000000, 0x88, 0x0001E838, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC10.FIX3", 0x0011, 0x00000000, 0x87, 0x0001E848, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC10.FIX4", 0x0011, 0x00000000, 0x8A, 0x0001E862, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC10.MCP2.MCTL", 0x5B80, 0x0001E8F4, 0x0C, 0x0001E8FA, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC11.FIX1", 0x0011, 0x00000000, 0x88, 0x0001F250, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC11.FIX5", 0x0011, 0x00000000, 0x87, 0x0001F260, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC11.FIX2", 0x0011, 0x00000000, 0x88, 0x0001F27A, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC11.FIX6", 0x0011, 0x00000000, 0x88, 0x0001F28A, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC11.FIX7", 0x0011, 0x00000000, 0x88, 0x0001F29A, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC11.FIX3", 0x0011, 0x00000000, 0x87, 0x0001F2AA, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC11.FIX4", 0x0011, 0x00000000, 0x8A, 0x0001F2C4, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC11.MCP3.MCTL", 0x5B80, 0x0001F356, 0x0C, 0x0001F35C, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC12.FIX1", 0x0011, 0x00000000, 0x88, 0x0002011C, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC12.FIX5", 0x0011, 0x00000000, 0x87, 0x0002012C, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC12.FIX2", 0x0011, 0x00000000, 0x88, 0x00020146, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC12.FIX6", 0x0011, 0x00000000, 0x88, 0x00020156, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC12.FIX7", 0x0011, 0x00000000, 0x88, 0x00020166, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC12.FIX3", 0x0011, 0x00000000, 0x87, 0x00020176, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC12.FIX4", 0x0011, 0x00000000, 0x8A, 0x00020190, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC12.RRP0.MCTL", 0x5B80, 0x0002028C, 0x0C, 0x00020292, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC13.FIX1", 0x0011, 0x00000000, 0x88, 0x00020D07, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC13.FIX5", 0x0011, 0x00000000, 0x87, 0x00020D17, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC13.FIX2", 0x0011, 0x00000000, 0x88, 0x00020D31, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC13.FIX6", 0x0011, 0x00000000, 0x88, 0x00020D41, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC13.FIX7", 0x0011, 0x00000000, 0x88, 0x00020D51, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC13.FIX3", 0x0011, 0x00000000, 0x87, 0x00020D61, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC13.FIX4", 0x0011, 0x00000000, 0x8A, 0x00020D7B, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC13.RR1A.MCTL", 0x5B80, 0x00020E0D, 0x0C, 0x00020E13, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC13.RR1B.MCTL", 0x5B80, 0x00021649, 0x0C, 0x0002164F, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC13.RR1C.MCTL", 0x5B80, 0x00021E85, 0x0C, 0x00021E8B, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC13.RR1D.MCTL", 0x5B80, 0x000226C1, 0x0C, 0x000226C7, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC14.FIX1", 0x0011, 0x00000000, 0x88, 0x0002316F, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC14.FIX5", 0x0011, 0x00000000, 0x87, 0x0002317F, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC14.FIX2", 0x0011, 0x00000000, 0x88, 0x00023199, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC14.FIX6", 0x0011, 0x00000000, 0x88, 0x000231A9, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC14.FIX7", 0x0011, 0x00000000, 0x88, 0x000231B9, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC14.FIX3", 0x0011, 0x00000000, 0x87, 0x000231C9, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC14.FIX4", 0x0011, 0x00000000, 0x8A, 0x000231E3, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC14.RR2A.MCTL", 0x5B80, 0x00023275, 0x0C, 0x0002327B, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC14.RR2B.MCTL", 0x5B80, 0x00023AB1, 0x0C, 0x00023AB7, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC14.RR2C.MCTL", 0x5B80, 0x000242ED, 0x0C, 0x000242F3, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC14.RR2D.MCTL", 0x5B80, 0x00024B29, 0x0C, 0x00024B2F, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC15.FIX1", 0x0011, 0x00000000, 0x88, 0x00025582, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC15.FIX5", 0x0011, 0x00000000, 0x87, 0x00025592, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC15.FIX2", 0x0011, 0x00000000, 0x88, 0x000255AC, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC15.FIX6", 0x0011, 0x00000000, 0x88, 0x000255BC, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC15.FIX7", 0x0011, 0x00000000, 0x88, 0x000255CC, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC15.FIX3", 0x0011, 0x00000000, 0x87, 0x000255DC, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC15.FIX4", 0x0011, 0x00000000, 0x8A, 0x000255F6, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC15.RR3A.MCTL", 0x5B80, 0x00025688, 0x0C, 0x0002568E, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC15.RR3B.MCTL", 0x5B80, 0x00025EC4, 0x0C, 0x00025ECA, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC15.RR3C.MCTL", 0x5B80, 0x00026700, 0x0C, 0x00026706, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC15.RR3D.MCTL", 0x5B80, 0x00026F3C, 0x0C, 0x00026F42, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC16.FIX1", 0x0011, 0x00000000, 0x88, 0x0002790F, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC16.FIX5", 0x0011, 0x00000000, 0x87, 0x0002791F, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC16.FIX2", 0x0011, 0x00000000, 0x88, 0x00027939, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC16.FIX6", 0x0011, 0x00000000, 0x88, 0x00027949, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC16.FIX7", 0x0011, 0x00000000, 0x88, 0x00027959, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC16.FIX3", 0x0011, 0x00000000, 0x87, 0x00027969, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC16.FIX4", 0x0011, 0x00000000, 0x8A, 0x00027983, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC16.MCP4.MCTL", 0x5B80, 0x00027A15, 0x0C, 0x00027A1B, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC17.FIX1", 0x0011, 0x00000000, 0x88, 0x00028371, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC17.FIX5", 0x0011, 0x00000000, 0x87, 0x00028381, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC17.FIX2", 0x0011, 0x00000000, 0x88, 0x0002839B, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC17.FIX6", 0x0011, 0x00000000, 0x88, 0x000283AB, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC17.FIX7", 0x0011, 0x00000000, 0x88, 0x000283BB, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC17.FIX3", 0x0011, 0x00000000, 0x87, 0x000283CB, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC17.FIX4", 0x0011, 0x00000000, 0x8A, 0x000283E5, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC17.MCP5.MCTL", 0x5B80, 0x00028477, 0x0C, 0x0002847D, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC18.FIX1", 0x0011, 0x00000000, 0x88, 0x0002923D, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC18.FIX5", 0x0011, 0x00000000, 0x87, 0x0002924D, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC18.FIX2", 0x0011, 0x00000000, 0x88, 0x00029267, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC18.FIX6", 0x0011, 0x00000000, 0x88, 0x00029277, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC18.FIX7", 0x0011, 0x00000000, 0x88, 0x00029287, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC18.FIX3", 0x0011, 0x00000000, 0x87, 0x00029297, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC18.FIX4", 0x0011, 0x00000000, 0x8A, 0x000292B1, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC18.SRP0.MCTL", 0x5B80, 0x000293AD, 0x0C, 0x000293B3, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC19.FIX1", 0x0011, 0x00000000, 0x88, 0x00029E28, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC19.FIX5", 0x0011, 0x00000000, 0x87, 0x00029E38, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC19.FIX2", 0x0011, 0x00000000, 0x88, 0x00029E52, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC19.FIX6", 0x0011, 0x00000000, 0x88, 0x00029E62, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC19.FIX7", 0x0011, 0x00000000, 0x88, 0x00029E72, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC19.FIX3", 0x0011, 0x00000000, 0x87, 0x00029E82, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC19.FIX4", 0x0011, 0x00000000, 0x8A, 0x00029E9C, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC19.SR1A.MCTL", 0x5B80, 0x00029F2E, 0x0C, 0x00029F34, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC19.SR1B.MCTL", 0x5B80, 0x0002A76A, 0x0C, 0x0002A770, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC19.SR1C.MCTL", 0x5B80, 0x0002AFA6, 0x0C, 0x0002AFAC, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC19.SR1D.MCTL", 0x5B80, 0x0002B7E2, 0x0C, 0x0002B7E8, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC20.FIX1", 0x0011, 0x00000000, 0x88, 0x0002C2B2, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC20.FIX5", 0x0011, 0x00000000, 0x87, 0x0002C2C2, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC20.FIX2", 0x0011, 0x00000000, 0x88, 0x0002C2DC, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC20.FIX6", 0x0011, 0x00000000, 0x88, 0x0002C2EC, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC20.FIX7", 0x0011, 0x00000000, 0x88, 0x0002C2FC, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC20.FIX3", 0x0011, 0x00000000, 0x87, 0x0002C30C, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC20.FIX4", 0x0011, 0x00000000, 0x8A, 0x0002C326, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC20.SR2A.MCTL", 0x5B80, 0x0002C3B8, 0x0C, 0x0002C3BE, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC20.SR2B.MCTL", 0x5B80, 0x0002CBF4, 0x0C, 0x0002CBFA, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC20.SR2C.MCTL", 0x5B80, 0x0002D430, 0x0C, 0x0002D436, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC20.SR2D.MCTL", 0x5B80, 0x0002DC6C, 0x0C, 0x0002DC72, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC21.FIX1", 0x0011, 0x00000000, 0x88, 0x0002E6C5, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC21.FIX5", 0x0011, 0x00000000, 0x87, 0x0002E6D5, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC21.FIX2", 0x0011, 0x00000000, 0x88, 0x0002E6EF, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC21.FIX6", 0x0011, 0x00000000, 0x88, 0x0002E6FF, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC21.FIX7", 0x0011, 0x00000000, 0x88, 0x0002E70F, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC21.FIX3", 0x0011, 0x00000000, 0x87, 0x0002E71F, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC21.FIX4", 0x0011, 0x00000000, 0x8A, 0x0002E739, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC21.SR3A.MCTL", 0x5B80, 0x0002E7CB, 0x0C, 0x0002E7D1, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC21.SR3B.MCTL", 0x5B80, 0x0002F007, 0x0C, 0x0002F00D, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC21.SR3C.MCTL", 0x5B80, 0x0002F843, 0x0C, 0x0002F849, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC21.SR3D.MCTL", 0x5B80, 0x0003007F, 0x0C, 0x00030085, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC22.FIX1", 0x0011, 0x00000000, 0x88, 0x00030A52, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC22.FIX5", 0x0011, 0x00000000, 0x87, 0x00030A62, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC22.FIX2", 0x0011, 0x00000000, 0x88, 0x00030A7C, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC22.FIX6", 0x0011, 0x00000000, 0x88, 0x00030A8C, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC22.FIX7", 0x0011, 0x00000000, 0x88, 0x00030A9C, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC22.FIX3", 0x0011, 0x00000000, 0x87, 0x00030AAC, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC22.FIX4", 0x0011, 0x00000000, 0x8A, 0x00030AC6, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC22.MCP6.MCTL", 0x5B80, 0x00030B58, 0x0C, 0x00030B5E, 0x0000000038584946}, /* OPERATIONREGION */ + {"_SB_.PC23.FIX1", 0x0011, 0x00000000, 0x88, 0x000314B4, 0x0000000000000000}, /* WORDBUSNUMBER */ + {"_SB_.PC23.FIX5", 0x0011, 0x00000000, 0x87, 0x000314C4, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC23.FIX2", 0x0011, 0x00000000, 0x88, 0x000314DE, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC23.FIX6", 0x0011, 0x00000000, 0x88, 0x000314EE, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC23.FIX7", 0x0011, 0x00000000, 0x88, 0x000314FE, 0x0000000000000000}, /* WORDIO */ + {"_SB_.PC23.FIX3", 0x0011, 0x00000000, 0x87, 0x0003150E, 0x0000000000000000}, /* DWORDMEMORY */ + {"_SB_.PC23.FIX4", 0x0011, 0x00000000, 0x8A, 0x00031528, 0x0000000000000000}, /* QWORDMEMORY */ + {"_SB_.PC23.MCP7.MCTL", 0x5B80, 0x000315BA, 0x0C, 0x000315C0, 0x0000000038584946}, /* OPERATIONREGION */ + {NULL,0,0,0,0,0} /* Table terminator */ +}; + diff --git a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c new file mode 100644 index 0000000000..66da23c561 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c @@ -0,0 +1,547 @@ +/** @file + +Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "BoardAcpiDxe.h" + +EFI_STATUS +PatchDsdtTable ( + IN OUT EFI_ACPI_COMMON_HEADER *Table + ); + +#pragma optimize("",off) + +BIOS_ACPI_PARAM *mAcpiParameter; + +EFI_IIO_UDS_PROTOCOL *mIioUds; + +UINT32 mNumOfBitShift; +BOOLEAN mForceX2ApicId; +BOOLEAN mX2ApicEnabled; + +struct SystemMemoryMapHob *mSystemMemoryMap; + +SOCKET_MP_LINK_CONFIGURATION mSocketMpLinkConfiguration; +SOCKET_IIO_CONFIGURATION mSocketIioConfiguration; +SOCKET_POWERMANAGEMENT_CONFIGURATION mSocketPowermanagementConfiguration; + +BOOLEAN mFirstNotify; +PCH_RC_CONFIGURATION mPchRcConfiguration; + +UINT8 mKBPresent = 0; +UINT8 mMousePresent = 0; + +/** + + Locate the first instance of a protocol. If the protocol requested is an + FV protocol, then it will return the first FV that contains the ACPI table + storage file. + + @param Protocol - The protocol to find. + Instance - Return pointer to the first instance of the protocol. + Type - The type of protocol to locate. + + @retval EFI_SUCCESS - The function completed successfully. + @retval EFI_NOT_FOUND - The protocol could not be located. + @retval EFI_OUT_OF_RESOURCES - There are not enough resources to find the protocol. + +**/ +EFI_STATUS +LocateSupportProtocol ( + IN EFI_GUID *Protocol, + IN EFI_GUID *gEfiAcpiMultiTableStorageGuid, + OUT VOID **Instance, + IN UINT32 Type + ) +{ + EFI_STATUS Status; + EFI_HANDLE *HandleBuffer; + UINTN NumberOfHandles; + EFI_FV_FILETYPE FileType; + UINT32 FvStatus; + EFI_FV_FILE_ATTRIBUTES Attributes; + UINTN Size; + UINTN Index; + + FvStatus = 0; + // + // Locate protocol. + // + Status = gBS->LocateHandleBuffer ( + ByProtocol, + Protocol, + NULL, + &NumberOfHandles, + &HandleBuffer + ); + if (EFI_ERROR (Status)) { + // + // Defined errors at this time are not found and out of resources. + // + return Status; + } + // + // Looking for FV with ACPI storage file + // + for (Index = 0; Index < NumberOfHandles; Index++) { + // + // Get the protocol on this handle + // This should not fail because of LocateHandleBuffer + // + Status = gBS->HandleProtocol ( + HandleBuffer[Index], + Protocol, + Instance + ); + ASSERT (!EFI_ERROR (Status)); + + if (!Type) { + // + // Not looking for the FV protocol, so find the first instance of the + // protocol. There should not be any errors because our handle buffer + // should always contain at least one or LocateHandleBuffer would have + // returned not found. + // + break; + } + // + // See if it has the ACPI storage file + // + Status = ((EFI_FIRMWARE_VOLUME2_PROTOCOL *) (*Instance))->ReadFile ( + *Instance, + gEfiAcpiMultiTableStorageGuid, + NULL, + &Size, + &FileType, + &Attributes, + &FvStatus + ); + + // + // If we found it, then we are done + // + if (!EFI_ERROR (Status)) { + break; + } + } + // + // Our exit status is determined by the success of the previous operations + // If the protocol was found, Instance already points to it. + // + // + // Free any allocated buffers + // + gBS->FreePool (HandleBuffer); + + return Status; +} + +/** + + GC_TODO: add routine description + + @param None + + @retval EFI_SUCCESS - GC_TODO: add retval description + +**/ +EFI_STATUS +PlatformHookInit ( + VOID + ) +{ + EFI_STATUS Status; + EFI_PHYSICAL_ADDRESS AcpiParameterAddr; + UINT32 RegEax; + UINT32 RegEbx; + UINT32 RegEcx; + UINT32 RegEdx; + + CopyMem (&mSocketMpLinkConfiguration, PcdGetPtr(PcdSocketMpLinkConfigData), sizeof(SOCKET_MP_LINK_CONFIGURATION)); + CopyMem (&mSocketPowermanagementConfiguration, PcdGetPtr(PcdSocketPowerManagementConfigData), sizeof(SOCKET_POWERMANAGEMENT_CONFIGURATION)); + CopyMem (&mSocketIioConfiguration, PcdGetPtr(PcdSocketIioConfigData), sizeof(SOCKET_IIO_CONFIGURATION)); + CopyMem (&mPchRcConfiguration, PcdGetPtr(PcdPchRcConfigurationData), sizeof(PCH_RC_CONFIGURATION)); + + DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled)); + DEBUG ((DEBUG_INFO, "mForceX2ApicId - 0x%x\n", mForceX2ApicId)); + + { + UINT32 Index; + + for (Index = 0; Index < 4; Index++) { + AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, Index, &RegEax, &RegEbx, &RegEcx, &RegEdx); + DEBUG ((DEBUG_INFO, "CPUID(0xB - %d) - 0x%08x.0x%08x.0x%08x.0x%08x\n", Index, RegEax, RegEbx, RegEcx, RegEdx)); + } + } + + // + // Allocate 256 runtime memory to pass ACPI parameter + // This Address must be < 4G because we only have 32bit in the dsdt + // + AcpiParameterAddr = 0xffffffff; + Status = gBS->AllocatePages ( + AllocateMaxAddress, + EfiACPIMemoryNVS, + EFI_SIZE_TO_PAGES (sizeof(BIOS_ACPI_PARAM)), + &AcpiParameterAddr + ); + ASSERT_EFI_ERROR (Status); + mAcpiParameter = (BIOS_ACPI_PARAM *)AcpiParameterAddr; + + DEBUG ((EFI_D_ERROR, "ACPI Parameter Block Address: 0x%X\n", mAcpiParameter)); + Status = PcdSet64S (PcdAcpiGnvsAddress, (UINT64)(UINTN)mAcpiParameter); + ASSERT_EFI_ERROR (Status); + + ZeroMem (mAcpiParameter, sizeof (BIOS_ACPI_PARAM)); + mAcpiParameter->PlatformId = 0; +#if MAX_SOCKET > 4 + mAcpiParameter->IoApicEnable = PcdGet32 (PcdPcIoApicEnable); +#else + mAcpiParameter->IoApicEnable = (PcdGet32 (PcdPcIoApicEnable) << 1) | 1; +#endif + DEBUG((EFI_D_ERROR, "io apic settings:%d\n", mAcpiParameter->IoApicEnable)); + + AsmCpuid (CPUID_VERSION_INFO, &RegEax, &RegEbx, &RegEcx, &RegEdx); + mAcpiParameter->ProcessorId = (RegEax & 0xFFFF0); + + // support up to 64 threads/socket + AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL); + mNumOfBitShift &= 0x1F; + + // Set the bit shift value for CPU SKU + mAcpiParameter->CpuSkuNumOfBitShift = (UINT8) mNumOfBitShift; + + mAcpiParameter->ProcessorApicIdBase[0] = (UINT32) (0 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[1] = (UINT32) (1 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[2] = (UINT32) (2 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[3] = (UINT32) (3 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[4] = (UINT32) (4 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[5] = (UINT32) (5 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[6] = (UINT32) (6 << mNumOfBitShift); + mAcpiParameter->ProcessorApicIdBase[7] = (UINT32) (7 << mNumOfBitShift); + + if(mForceX2ApicId) { + mAcpiParameter->ProcessorApicIdBase[0] = 0x7F00; + mAcpiParameter->ProcessorApicIdBase[1] = 0x7F20; + mAcpiParameter->ProcessorApicIdBase[2] = 0x7F40; + mAcpiParameter->ProcessorApicIdBase[3] = 0x7F60; + mAcpiParameter->ProcessorApicIdBase[4] = 0x7F80; + mAcpiParameter->ProcessorApicIdBase[5] = 0x7Fa0; + mAcpiParameter->ProcessorApicIdBase[6] = 0x7Fc0; + mAcpiParameter->ProcessorApicIdBase[7] = 0x7Fe0; + + if (mNumOfBitShift == 4) { + mAcpiParameter->ProcessorApicIdBase[0] = 0x7F00; + mAcpiParameter->ProcessorApicIdBase[1] = 0x7F10; + mAcpiParameter->ProcessorApicIdBase[2] = 0x7F20; + mAcpiParameter->ProcessorApicIdBase[3] = 0x7F30; + mAcpiParameter->ProcessorApicIdBase[4] = 0x7F40; + mAcpiParameter->ProcessorApicIdBase[5] = 0x7F50; + mAcpiParameter->ProcessorApicIdBase[6] = 0x7F60; + mAcpiParameter->ProcessorApicIdBase[7] = 0x7F70; + } else if(mNumOfBitShift == 6) { + mAcpiParameter->ProcessorApicIdBase[0] = 0x7E00; + mAcpiParameter->ProcessorApicIdBase[1] = 0x7E20; + mAcpiParameter->ProcessorApicIdBase[2] = 0x7E40; + mAcpiParameter->ProcessorApicIdBase[3] = 0x7E60; + mAcpiParameter->ProcessorApicIdBase[4] = 0x7E80; + mAcpiParameter->ProcessorApicIdBase[5] = 0x7Ea0; + mAcpiParameter->ProcessorApicIdBase[6] = 0x7Ec0; + mAcpiParameter->ProcessorApicIdBase[7] = 0x7Ee0; + } + } + + // + // If SNC is enabled, and NumOfCluster is 2, set the ACPI variable for PXM value + // + if(mIioUds->IioUdsPtr->SystemStatus.OutSncEn && (mIioUds->IioUdsPtr->SystemStatus.OutNumOfCluster == 2)){ + mAcpiParameter->SncAnd2Cluster = 1; + } else { + mAcpiParameter->SncAnd2Cluster = 0; + } + + mAcpiParameter->MmCfg = (UINT32)mIioUds->IioUdsPtr->PlatformData.PciExpressBase; + mAcpiParameter->TsegSize = (UINT32)(mIioUds->IioUdsPtr->PlatformData.MemTsegSize >> 20); + + return EFI_SUCCESS; +} + +/** + + This function will update any runtime platform specific information. + This currently includes: + Setting OEM table values, ID, table ID, creator ID and creator revision. + Enabling the proper processor entries in the APIC tables. + + @param Table - The table to update + + @retval EFI_SUCCESS - The function completed successfully. + +**/ +EFI_STATUS +PlatformUpdateTables ( + IN OUT EFI_ACPI_COMMON_HEADER *Table, + IN OUT EFI_ACPI_TABLE_VERSION *Version + ) +{ + EFI_STATUS Status; + + Status = EFI_SUCCESS; + + // + // By default, a table belongs in all ACPI table versions published. + // Some tables will override this because they have different versions of the table. + // + *Version = EFI_ACPI_TABLE_VERSION_2_0; + // + // Update the processors in the APIC table + // + switch (Table->Signature) { + + case EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE: + // + // Patch the memory resource + // + Status = PatchDsdtTable(Table); + break; + + default: + ASSERT(FALSE); + break; + } + // + // + // Update the hardware signature in the FACS structure + // + // + // + return Status; +} + + + +/** + + GC_TODO: Add function description + + @param Event - GC_TODO: add argument description + @param Context - GC_TODO: add argument description + + @retval GC_TODO: add return values + +**/ +STATIC +VOID +EFIAPI +OnReadyToBoot ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINT32 RegEax; + UINT32 RegEbx; + UINT32 RegEcx; + UINT32 RegEdx; + + if (mFirstNotify) { + return ; + } + + mFirstNotify = TRUE; + + CopyMem (&mSocketIioConfiguration, PcdGetPtr(PcdSocketIioConfigData), sizeof(SOCKET_IIO_CONFIGURATION)); + CopyMem (&mSocketPowermanagementConfiguration,PcdGetPtr(PcdSocketPowerManagementConfigData), sizeof(SOCKET_POWERMANAGEMENT_CONFIGURATION)); + CopyMem (&mPchRcConfiguration, PcdGetPtr(PcdPchRcConfigurationData), sizeof(PCH_RC_CONFIGURATION)); + + // CpuPm.Asl: External (CSEN, FieldUnitObj) + mAcpiParameter->CStateEnable = !mSocketPowermanagementConfiguration.ProcessorAutonomousCstateEnable; + // CpuPm.Asl: External (C3EN, FieldUnitObj) + mAcpiParameter->C3Enable = mSocketPowermanagementConfiguration.C3Enable; + // CpuPm.Asl: External (C6EN, FieldUnitObj) + if (mSocketPowermanagementConfiguration.C6Enable == PPM_AUTO) { + mAcpiParameter->C6Enable = 1; //POR Default = Enabled + } else { + mAcpiParameter->C6Enable = mSocketPowermanagementConfiguration.C6Enable; + } + if(mAcpiParameter->C6Enable && mAcpiParameter->C3Enable) { //C3 and C6 enable are exclusive + mAcpiParameter->C6Enable = 1; + mAcpiParameter->C3Enable = 0; + } + // CpuPm.Asl: External (C7EN, FieldUnitObj) + mAcpiParameter->C7Enable = 0; + // CpuPm.Asl: External (OSCX, FieldUnitObj) + mAcpiParameter->OSCX = mSocketPowermanagementConfiguration.OSCx; + // CpuPm.Asl: External (MWOS, FieldUnitObj) + mAcpiParameter->MonitorMwaitEnable = 1; + // CpuPm.Asl: External (PSEN, FieldUnitObj) + mAcpiParameter->PStateEnable = mSocketPowermanagementConfiguration.ProcessorEistEnable; + // CpuPm.Asl: External (HWAL, FieldUnitObj) + mAcpiParameter->HWAllEnable = 0; //Update in PatchGv3SsdtTable + + mAcpiParameter->KBPresent = mKBPresent; + mAcpiParameter->MousePresent = mMousePresent; + mAcpiParameter->TStateEnable = mSocketPowermanagementConfiguration.TStateEnable; + //Fine grained T state + AsmCpuid (CPUID_THERMAL_POWER_MANAGEMENT, &RegEax, &RegEbx, &RegEcx, &RegEdx); + if ((RegEax & EFI_FINE_GRAINED_CLOCK_MODULATION) && (mSocketPowermanagementConfiguration.OnDieThermalThrottling > 0)){ + mAcpiParameter->TStateFineGrained = 1; + } + if(RegEax & B_CPUID_POWER_MANAGEMENT_EAX_HWP_LVT_INTERRUPT_SUPPORT) { + mAcpiParameter->HwpInterrupt = 1; + } + // CpuPm.Asl: External (HWEN, FieldUnitObj) + mAcpiParameter->HWPMEnable = mSocketPowermanagementConfiguration.ProcessorHWPMEnable; + // CpuPm.Asl: External (ACEN, FieldUnitObj) + mAcpiParameter->AutoCstate = mSocketPowermanagementConfiguration.ProcessorAutonomousCstateEnable; + + mAcpiParameter->EmcaEn = 0; + + mAcpiParameter->PcieAcpiHotPlugEnable = (UINT8) (BOOLEAN) (mSocketIioConfiguration.PcieAcpiHotPlugEnable != 0); + // + // Initialize USB3 mode from setup data + // + // If mode != manual control + // just copy mode from setup + if (mPchRcConfiguration.PchUsbManualMode != 1) { + mAcpiParameter->XhciMode = mPchRcConfiguration.PchUsbManualMode; + } + +} + +/** + + Entry point for Acpi platform driver. + + @param ImageHandle - A handle for the image that is initializing this driver. + @param SystemTable - A pointer to the EFI system table. + + @retval EFI_SUCCESS - Driver initialized successfully. + @retval EFI_LOAD_ERROR - Failed to Initialize or has been loaded. + @retval EFI_OUT_OF_RESOURCES - Could not allocate needed resources. + +**/ +EFI_STATUS +EFIAPI +InstallAcpiBoard ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_STATUS AcpiStatus; + EFI_ACPI_TABLE_PROTOCOL *AcpiTable; + EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol; + INTN Instance; + EFI_ACPI_COMMON_HEADER *CurrentTable; + UINTN TableHandle; + UINT32 FvStatus; + UINT32 Size; + EFI_EVENT Event; + EFI_ACPI_TABLE_VERSION TableVersion; + EFI_HOB_GUID_TYPE *GuidHob; + + mFirstNotify = FALSE; + + TableVersion = EFI_ACPI_TABLE_VERSION_NONE; + Instance = 0; + CurrentTable = NULL; + TableHandle = 0; + + // + // Locate the IIO Protocol Interface + // + Status = gBS->LocateProtocol (&gEfiIioUdsProtocolGuid,NULL,&mIioUds); + ASSERT_EFI_ERROR (Status); + + GuidHob = GetFirstGuidHob (&gEfiMemoryMapGuid); + ASSERT (GuidHob != NULL); + if (GuidHob == NULL) { + return EFI_NOT_FOUND; + } + mSystemMemoryMap = GET_GUID_HOB_DATA(GuidHob); + + PlatformHookInit (); + + // + // Find the AcpiTable protocol + // + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, &AcpiTable); + ASSERT_EFI_ERROR (Status); + + // + // Locate the firmware volume protocol + // + Status = LocateSupportProtocol ( + &gEfiFirmwareVolume2ProtocolGuid, + &gEfiCallerIdGuid, + &FwVol, + TRUE + ); + ASSERT_EFI_ERROR (Status); + + Status = EFI_SUCCESS; + Instance = 0; + + // + // Read tables from the storage file. + // + while (!EFI_ERROR (Status)) { + CurrentTable = NULL; + + Status = FwVol->ReadSection ( + FwVol, + &gEfiCallerIdGuid, + EFI_SECTION_RAW, + Instance, + &CurrentTable, + (UINTN *) &Size, + &FvStatus + ); + + if (!EFI_ERROR (Status)) { + // + // Allow platform specific code to reject the table or update it + // + { + // + // Perform any table specific updates. + // + AcpiStatus = PlatformUpdateTables (CurrentTable, &TableVersion); + if (!EFI_ERROR (AcpiStatus)) { + // + // Add the table + // + TableHandle = 0; + if (TableVersion != EFI_ACPI_TABLE_VERSION_NONE) { + AcpiStatus = AcpiTable->InstallAcpiTable ( + AcpiTable, + CurrentTable, + CurrentTable->Length, + &TableHandle + ); + } + ASSERT_EFI_ERROR (AcpiStatus); + } + } + // + // Increment the instance + // + Instance++; + } + } + + Status = EfiCreateEventReadyToBootEx( + TPL_NOTIFY, + OnReadyToBoot, + NULL, + &Event + ); + + // + // Finished + // + return EFI_SUCCESS; +} diff --git a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.h b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.h new file mode 100644 index 0000000000..fbfd9abc7f --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.h @@ -0,0 +1,82 @@ +/** @file + +Copyright (c) 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _ACPI_PLATFORM_H_ +#define _ACPI_PLATFORM_H_ + +// +// Statements that include other header files +// +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "Platform.h" +#include "Register/PchRegsUsb.h" +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include + +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "Register/PchRegsUsb.h" + +#include +#define EFI_FINE_GRAINED_CLOCK_MODULATION BIT5 +#define B_CPUID_POWER_MANAGEMENT_EAX_HWP_LVT_INTERRUPT_SUPPORT BIT9 + +#endif diff --git a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf new file mode 100644 index 0000000000..cd420b5b88 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf @@ -0,0 +1,71 @@ +## @file +# +# Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = BoardAcpiDxe + FILE_GUID = F3253A17-2AFE-419E-A5DA-B95A3F7DAB25 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = InstallAcpiBoard + +[Sources] + Dsdt/WFPPlatform.asl + AmlOffsetTable.c + BoardAcpiDxe.c + BoardAcpiDxeDsdt.c + +[Packages] + PurleyOpenBoardPkg/OpenBoardPkg.dec + PurleyRefreshSiliconPkg/SiPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + MinPlatformPkg/MinPlatformPkg.dec + +[LibraryClasses] + UefiBootServicesTableLib + UefiDriverEntryPoint + BaseMemoryLib + DebugLib + UefiLib + UefiRuntimeServicesTableLib + HobLib + PcdLib + BoardAcpiTableLib + +[Protocols] + gEfiMpServiceProtocolGuid + gEfiIioUdsProtocolGuid + gEfiGlobalNvsAreaProtocolGuid + gEfiPciIoProtocolGuid + gEfiFirmwareVolume2ProtocolGuid + gEfiAcpiTableProtocolGuid + gEfiPciRootBridgeIoProtocolGuid + +[Guids] + gEfiMemoryMapGuid + +[Pcd] + gOemSkuTokenSpaceGuid.PcdPchRcConfigurationData + gOemSkuTokenSpaceGuid.PcdSocketIioConfigData + gOemSkuTokenSpaceGuid.PcdSocketMpLinkConfigData + gOemSkuTokenSpaceGuid.PcdSocketPowerManagementConfigData + gOemSkuTokenSpaceGuid.PcdSocketProcessorCoreConfigData + gOemSkuTokenSpaceGuid.PcdAcpiGnvsAddress + gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable + +[Depex] + gEfiAcpiTableProtocolGuid AND + gEfiMpServiceProtocolGuid + +[BuildOptions] + # add -vr and -so to generate offset.h + *_*_*_ASL_FLAGS = -oi -vr -so + + diff --git a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c new file mode 100644 index 0000000000..a4d58cab60 --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxeDsdt.c @@ -0,0 +1,516 @@ +/** @file + +Copyright (c) 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +// +// Statements that include other files +// + +// +// Statements that include other header files +// +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "Register/PchRegsUsb.h" + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include + +#include + +extern BOOLEAN mCpuOrderSorted; + +typedef struct { + char *Pathname; /* Full pathname (from root) to the object */ + unsigned short ParentOpcode; /* AML opcode for the parent object */ + unsigned long NamesegOffset; /* Offset of last nameseg in the parent namepath */ + unsigned char Opcode; /* AML opcode for the data */ + unsigned long Offset; /* Offset for the data */ + unsigned long long Value; /* Original value of the data (as applicable) */ +} AML_OFFSET_TABLE_ENTRY; + +extern AML_OFFSET_TABLE_ENTRY *mAmlOffsetTablePointer; +extern AML_OFFSET_TABLE_ENTRY DSDT_PLATWFP__OffsetTable[]; + +#define AML_NAME_OP 0x08 +#define AML_NAME_PREFIX_SIZE 0x06 +#define AML_NAME_DWORD_SIZE 0x0C + +#define MEM_ADDR_SHFT_VAL 26 // For 64 MB granularity + +#pragma pack(1) + +typedef struct { + UINT8 DescriptorType; + UINT16 ResourceLength; + UINT8 ResourceType; + UINT8 Flags; + UINT8 SpecificFlags; + UINT64 Granularity; + UINT64 Minimum; + UINT64 Maximum; + UINT64 TranslationOffset; + UINT64 AddressLength; +} AML_RESOURCE_ADDRESS64; + + +typedef struct { + UINT8 DescriptorType; + UINT16 ResourceLength; + UINT8 ResourceType; + UINT8 Flags; + UINT8 SpecificFlags; + UINT32 Granularity; + UINT32 Minimum; + UINT32 Maximum; + UINT32 TranslationOffset; + UINT32 AddressLength; +} AML_RESOURCE_ADDRESS32; + + +typedef struct { + UINT8 DescriptorType; + UINT16 ResourceLength; + UINT8 ResourceType; + UINT8 Flags; + UINT8 SpecificFlags; + UINT16 Granularity; + UINT16 Minimum; + UINT16 Maximum; + UINT16 TranslationOffset; + UINT16 AddressLength; +} AML_RESOURCE_ADDRESS16; + +#pragma pack() + +#define PCIE_PORT_4_DEV 0x00 +#define PCIE_PORT_5_DEV 0x00 + +#define PORTS_PER_SOCKET 0x0F +#define PCIE_PORT_ALL_FUNC 0x00 + +typedef struct _PCIE_PORT_INFO { + UINT8 Device; + UINT8 Stack; +} PCIE_PORT_INFO; + +#pragma optimize("",off) + +extern BIOS_ACPI_PARAM *mAcpiParameter; + +extern struct SystemMemoryMapHob *mSystemMemoryMap; +extern EFI_IIO_UDS_PROTOCOL *mIioUds; + + +extern SOCKET_MP_LINK_CONFIGURATION mSocketMpLinkConfiguration; +extern SOCKET_IIO_CONFIGURATION mSocketIioConfiguration; +extern SOCKET_POWERMANAGEMENT_CONFIGURATION mSocketPowermanagementConfiguration; + +extern UINT32 mNumOfBitShift; + +AML_OFFSET_TABLE_ENTRY *mAmlOffsetTablePointer = DSDT_PLATWFP__OffsetTable; + +/** + + Update the DSDT table + + @param *TableHeader - The table to be set + + @retval EFI_SUCCESS - DSDT updated + @retval EFI_INVALID_PARAMETER - DSDT not updated + +**/ +EFI_STATUS +PatchDsdtTable ( + IN OUT EFI_ACPI_COMMON_HEADER *Table + ) +{ + PCIE_PORT_INFO PCIEPortDefaults[] = { + // DMI/PCIE 0 + { PCIE_PORT_0_DEV, IIO_CSTACK }, + //IOU0 + { PCIE_PORT_1A_DEV, IIO_PSTACK0 }, + { PCIE_PORT_1B_DEV, IIO_PSTACK0 }, + { PCIE_PORT_1C_DEV, IIO_PSTACK0 }, + { PCIE_PORT_1D_DEV, IIO_PSTACK0 }, + //IOU1 + { PCIE_PORT_2A_DEV, IIO_PSTACK1 }, + { PCIE_PORT_2B_DEV, IIO_PSTACK1 }, + { PCIE_PORT_2C_DEV, IIO_PSTACK1 }, + { PCIE_PORT_2D_DEV, IIO_PSTACK1 }, + //IOU2 + { PCIE_PORT_3A_DEV, IIO_PSTACK2 }, + { PCIE_PORT_3B_DEV, IIO_PSTACK2 }, + { PCIE_PORT_3C_DEV, IIO_PSTACK2 }, + { PCIE_PORT_3D_DEV, IIO_PSTACK2 }, + //MCP0 and MCP1 + { PCIE_PORT_4_DEV, IIO_PSTACK3 }, + { PCIE_PORT_5_DEV, IIO_PSTACK4 } + }; + EFI_STATUS Status; + UINT8 *DsdtPointer; + UINT32 *Signature; + UINT32 Fixes, NodeIndex; + UINT8 Counter; + UINT16 i; // DSDT_PLATEXRP_OffsetTable LUT entries extends beyond 256! + UINT64 MemoryBaseLimit = 0; + UINT64 PciHGPEAddr = 0; + UINT64 BusDevFunc = 0; + UINT64 PcieHpBus = 0; + UINT64 PcieHpDev = 0; + UINT64 PcieHpFunc= 0; + UINT8 PortCount = 0; + UINT8 StackNumBus = 0; + UINT8 StackNumIo = 0; + UINT8 StackNumMem32 = 0; + UINT8 StackNumMem64 = 0; + UINT8 StackNumVgaIo0 = 1; // Start looking for Stack 1 + UINT8 StackNumVgaIo1 = 1; // Start looking for Stack 1 + UINT8 StackNumVgaMmioL = 0; + UINT8 Stack = 0; + UINT8 CurrSkt = 0, CurrStack = 0; + UINT64 IioBusIndex = 0; + UINT8 BusBase = 0, BusLimit = 0; + UINT16 IoBase = 0, IoLimit = 0; + UINT32 MemBase32 = 0, MemLimit32 = 0; + UINT64 MemBase64 = 0, MemLimit64 = 0; + AML_RESOURCE_ADDRESS16 *AmlResourceAddress16Pointer; + AML_RESOURCE_ADDRESS32 *AmlResourceAddress32Pointer; + AML_RESOURCE_ADDRESS64 *AmlResourceAddress64Pointer; + EFI_ACPI_DESCRIPTION_HEADER *TableHeader; + + Status = EFI_SUCCESS; + TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *)Table; + + if (mAmlOffsetTablePointer == NULL) return EFI_INVALID_PARAMETER; + + mAcpiParameter->MemoryBoardBitMask = 0; + + for(Counter = 0; Counter < mSystemMemoryMap->numberEntries; Counter++) { + NodeIndex = mSystemMemoryMap->Element[Counter].NodeId; + if((mAcpiParameter->MemoryBoardBitMask) & (1 << NodeIndex)){ + MemoryBaseLimit = mAcpiParameter->MemoryBoardRange[NodeIndex] + LShiftU64(mSystemMemoryMap->Element[Counter].ElementSize, MEM_ADDR_SHFT_VAL); + mAcpiParameter->MemoryBoardRange[NodeIndex] = MemoryBaseLimit; + } else { + mAcpiParameter->MemoryBoardBitMask |= 1 << NodeIndex; + MemoryBaseLimit = LShiftU64(mSystemMemoryMap->Element[Counter].BaseAddress, 30); + mAcpiParameter->MemoryBoardBase[NodeIndex] = MemoryBaseLimit; + MemoryBaseLimit = LShiftU64((mSystemMemoryMap->Element[Counter].BaseAddress + mSystemMemoryMap->Element[Counter].ElementSize), MEM_ADDR_SHFT_VAL); + mAcpiParameter->MemoryBoardRange[NodeIndex] = MemoryBaseLimit; + } + } + + // + // Mark all spare memory controllers as 1 in MemSpareMask bitmap. + // + mAcpiParameter->MemSpareMask = ~mAcpiParameter->MemoryBoardBitMask; + + mAcpiParameter->IioPresentBitMask = 0; + mAcpiParameter->SocketBitMask = 0; + + for (Counter = 0; Counter < MAX_SOCKET; Counter++) { + if (!mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Counter].Valid) continue; + mAcpiParameter->SocketBitMask |= 1 << Counter; + mAcpiParameter->IioPresentBitMask |= LShiftU64(mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Counter].stackPresentBitmap, (Counter * 8)); + for (Stack = 0; Stack < MAX_IIO_STACK; Stack++) { + mAcpiParameter->BusBase[Counter * MAX_IIO_STACK + Stack] = mIioUds->IioUdsPtr->PlatformData.IIO_resource[Counter].StackRes[Stack].BusBase; + } + } + + PciHGPEAddr = mIioUds->IioUdsPtr->PlatformData.PciExpressBase + 0x188; + BusDevFunc = 0x00; + PcieHpBus = 0; + PcieHpDev = 0; + PcieHpFunc = 0; + + Fixes = 0; + // + // Loop through the AML looking for values that we must fix up. + // + for (i = 0; mAmlOffsetTablePointer[i].Pathname != 0; i++) { + // + // Point to offset in DSDT for current item in AmlOffsetTable. + // + DsdtPointer = (UINT8 *) (TableHeader) + mAmlOffsetTablePointer[i].Offset; + + if (mAmlOffsetTablePointer[i].Opcode == AML_DWORD_PREFIX) { + // + // If Opcode is 0x0C, then operator is Name() or OperationRegion(). + // (TableHeader + AmlOffsetTable.Offset) is at offset for value to change. + // + // The assert below confirms that AML structure matches the offsets table. + // If not then patching the AML would just corrupt it and result in OS failure. + // If you encounter this assert something went wrong in *.offset.h files + // generation. Remove the files and rebuild. + // + ASSERT(DsdtPointer[-1] == mAmlOffsetTablePointer[i].Opcode); + // + // AmlOffsetTable.Value has FIX tag, so check that to decide what to modify. + // + Signature = (UINT32 *) (&mAmlOffsetTablePointer[i].Value); + switch (*Signature) { + // + // PSYS - "FIX0" OperationRegion() in Acpi\AcpiTables\Dsdt\CommonPlatform.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '0')): + DEBUG ((DEBUG_INFO, "FIX0 - 0x%x\n", mAcpiParameter)); + * (UINT32 *) DsdtPointer = (UINT32) (UINTN) mAcpiParameter; + // + // "FIX8" OperationRegion() in Acpi\AcpiTables\Dsdt\PcieHp.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '8')): + Stack = PCIEPortDefaults[PortCount % PORTS_PER_SOCKET].Stack; + PcieHpBus = mIioUds->IioUdsPtr->PlatformData.IIO_resource[IioBusIndex].StackRes[Stack].BusBase; + PcieHpDev = PCIEPortDefaults[PortCount % PORTS_PER_SOCKET].Device; + PcieHpFunc = PCIE_PORT_ALL_FUNC; + + //DEBUG((DEBUG_ERROR,"IioBus = %x, hpDev = %x, HpFunc= %x\n",IioBusIndex, PcieHpDev,PcieHpFunc)); + PciHGPEAddr &= ~(0xFFFF000); // clear bus device func numbers + BusDevFunc = (PcieHpBus << 8) | (PcieHpDev << 3) | PcieHpFunc; + * (UINT32 *) DsdtPointer = (UINT32) (UINTN) (PciHGPEAddr + (BusDevFunc << 12)); + //DEBUG((DEBUG_ERROR,", BusDevFunc= %x, PortCount = %x\n",BusDevFunc, PortCount)); + + PortCount++; + Fixes++; + break; + + default: + break; + } + } else if (mAmlOffsetTablePointer[i].Opcode == AML_INDEX_OP) { + // + // If Opcode is 0x88, then operator is WORDBusNumber() or WORDIO(). + // (TableHeader + AmlOffsetTable.Offset) must be cast to AML_RESOURCE_ADDRESS16 to change values. + // + AmlResourceAddress16Pointer = (AML_RESOURCE_ADDRESS16 *) (DsdtPointer); + // + // The assert below confirms that AML structure matches the offsets table. + // If not then patching the AML would just corrupt it and result in OS failure. + // If you encounter this assert something went wrong in *.offset.h files + // generation. Remove the files and rebuild. + // + ASSERT(AmlResourceAddress16Pointer->DescriptorType == mAmlOffsetTablePointer[i].Opcode); + + // + // Last 4 chars of AmlOffsetTable.Pathname has FIX tag. + // + Signature = (UINT32 *) (mAmlOffsetTablePointer[i].Pathname + AsciiStrLen(mAmlOffsetTablePointer[i].Pathname) - 4); + switch (*Signature) { + // + // "FIX1" BUS resource for PCXX in Acpi\AcpiTables\Dsdt\SysBus.asi and PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '1')): + CurrSkt = StackNumBus / MAX_IIO_STACK; + CurrStack = StackNumBus % MAX_IIO_STACK; + BusBase = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].BusBase; + BusLimit = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].BusLimit; + AmlResourceAddress16Pointer->Granularity = 0; + if (BusLimit > BusBase) { + AmlResourceAddress16Pointer->Minimum = (UINT16) BusBase; + AmlResourceAddress16Pointer->Maximum = (UINT16) BusLimit; + AmlResourceAddress16Pointer->AddressLength = (UINT16) (BusLimit - BusBase + 1); + } + //DEBUG((DEBUG_ERROR,", FIX1 BusBase = 0x%x, BusLimit = 0x%x\n",BusBase, BusLimit)); + StackNumBus++; + Fixes++; + break; + + // + // "FIX2" IO resource for for PCXX in Acpi\AcpiTables\Dsdt\SysBus.asi and PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '2')): + AmlResourceAddress16Pointer->Granularity = 0; + CurrSkt = StackNumIo / MAX_IIO_STACK; + CurrStack = StackNumIo % MAX_IIO_STACK; + IoBase = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].PciResourceIoBase; + IoLimit = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].PciResourceIoLimit; + if (IoLimit > IoBase) { + AmlResourceAddress16Pointer->Minimum = (UINT16) IoBase; + AmlResourceAddress16Pointer->Maximum = (UINT16) IoLimit; + AmlResourceAddress16Pointer->AddressLength = (UINT16) (IoLimit - IoBase + 1); + } + //DEBUG((DEBUG_ERROR,", FIX2 IoBase = 0x%x, IoLimit = 0x%x\n",IoBase, IoLimit)); + StackNumIo++; + Fixes++; + break; + + // + // "FIX6" IO resource for PCXX in Acpi\AcpiTables\Dsdt\PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '6')): + AmlResourceAddress16Pointer->Granularity = 0; + CurrSkt = StackNumVgaIo0 / MAX_IIO_STACK; + CurrStack = StackNumVgaIo0 % MAX_IIO_STACK; + if ((mSocketMpLinkConfiguration.LegacyVgaSoc == CurrSkt) && + (mSocketMpLinkConfiguration.LegacyVgaStack == CurrStack)){ + AmlResourceAddress16Pointer->Minimum = (UINT16) 0x03b0; + AmlResourceAddress16Pointer->Maximum = (UINT16) 0x03bb; + AmlResourceAddress16Pointer->AddressLength = (UINT16) 0x000C; + } + StackNumVgaIo0++; + Fixes++; + break; + + // + // "FIX7" IO resource for PCXX in Acpi\AcpiTables\Dsdt\PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '7')): + AmlResourceAddress16Pointer->Granularity = 0; + CurrSkt = StackNumVgaIo1 / MAX_IIO_STACK; + CurrStack = StackNumVgaIo1 % MAX_IIO_STACK; + if ((mSocketMpLinkConfiguration.LegacyVgaSoc == CurrSkt) && + (mSocketMpLinkConfiguration.LegacyVgaStack == CurrStack)) { + AmlResourceAddress16Pointer->Minimum = (UINT16) 0x03c0; + AmlResourceAddress16Pointer->Maximum = (UINT16) 0x03df; + AmlResourceAddress16Pointer->AddressLength = (UINT16) 0x0020; + } + StackNumVgaIo1++; + Fixes++; + break; + + default: + break; + } + } else if (mAmlOffsetTablePointer[i].Opcode == AML_SIZE_OF_OP) { + // + // If Opcode is 0x87, then operator is DWORDMemory(). + // (TableHeader + AmlOffsetTable.Offset) must be cast to AML_RESOURCE_ADDRESS32 to change values. + // + AmlResourceAddress32Pointer = (AML_RESOURCE_ADDRESS32 *) (DsdtPointer); + // + // The assert below confirms that AML structure matches the offsets table. + // If not then patching the AML would just corrupt it and result in OS failure. + // If you encounter this assert something went wrong in *.offset.h files + // generation. Remove the files and rebuild. + // + ASSERT(AmlResourceAddress32Pointer->DescriptorType == mAmlOffsetTablePointer[i].Opcode); + // + // Last 4 chars of AmlOffsetTable.Pathname has FIX tag. + // + Signature = (UINT32 *) (mAmlOffsetTablePointer[i].Pathname + AsciiStrLen(mAmlOffsetTablePointer[i].Pathname) - 4); + switch (*Signature) { + // + // "FIX3" PCI32 resource for PCXX in Acpi\AcpiTables\Dsdt\SysBus.asi and PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '3')): + AmlResourceAddress32Pointer->Granularity = 0; + CurrSkt = StackNumMem32 / MAX_IIO_STACK; + CurrStack = StackNumMem32 % MAX_IIO_STACK; + MemBase32 = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].PciResourceMem32Base; + MemLimit32 = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].PciResourceMem32Limit; + if (MemLimit32 > MemBase32) { + AmlResourceAddress32Pointer->Minimum = (UINT32) MemBase32; + AmlResourceAddress32Pointer->Maximum = (UINT32) MemLimit32; + AmlResourceAddress32Pointer->AddressLength = (UINT32) (MemLimit32 - MemBase32 + 1); + } + //DEBUG((DEBUG_ERROR,", FIX3 MemBase32 = 0x%08x, MemLimit32 = 0x%08x\n",MemBase32, MemLimit32)); + StackNumMem32++; + Fixes++; + break; + + // + // "FIX5" IO resource for PCXX in Acpi\AcpiTables\Dsdt\PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '5')): + AmlResourceAddress32Pointer->Granularity = 0; + CurrSkt = StackNumVgaMmioL / MAX_IIO_STACK; + CurrStack = StackNumVgaMmioL % MAX_IIO_STACK; + if ((mSocketMpLinkConfiguration.LegacyVgaSoc == CurrSkt) && + (mSocketMpLinkConfiguration.LegacyVgaStack == CurrStack)) { + AmlResourceAddress32Pointer->Minimum = 0x000a0000; + AmlResourceAddress32Pointer->Maximum = 0x000bffff; + AmlResourceAddress32Pointer->AddressLength = 0x00020000; + } + StackNumVgaMmioL++; + Fixes++; + break; + + default: + break; + } + } else if (mAmlOffsetTablePointer[i].Opcode == AML_CREATE_DWORD_FIELD_OP) { + // + // If Opcode is 0x8A, then operator is QWORDMemory(). + // (TableHeader + AmlOffsetTable.Offset) must be cast to AML_RESOURCE_ADDRESS64 to change values. + // + AmlResourceAddress64Pointer = (AML_RESOURCE_ADDRESS64 *) (DsdtPointer); + // + // The assert below confirms that AML structure matches the offsets table. + // If not then patching the AML would just corrupt it and result in OS failure. + // If you encounter this assert something went wrong in *.offset.h files + // generation. Remove the files and rebuild. + // + ASSERT(AmlResourceAddress64Pointer->DescriptorType == mAmlOffsetTablePointer[i].Opcode); + // + // Last 4 chars of AmlOffsetTable.Pathname has FIX tag. + // + Signature = (UINT32 *) (mAmlOffsetTablePointer[i].Pathname + AsciiStrLen(mAmlOffsetTablePointer[i].Pathname) - 4); + switch (*Signature) { + // + // "FIX4" PCI64 resource for PCXX in Acpi\AcpiTables\Dsdt\SysBus.asi and PCXX.asi + // + case (SIGNATURE_32 ('F', 'I', 'X', '4')): + DEBUG((DEBUG_ERROR,"Pci64BitResourceAllocation = 0x%x\n",mSocketIioConfiguration.Pci64BitResourceAllocation)); + if (mSocketIioConfiguration.Pci64BitResourceAllocation) { + AmlResourceAddress64Pointer->Granularity = 0; + CurrSkt = StackNumMem64 / MAX_IIO_STACK; + CurrStack = StackNumMem64 % MAX_IIO_STACK; + MemBase64 = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].PciResourceMem64Base; + MemLimit64 = mIioUds->IioUdsPtr->PlatformData.IIO_resource[CurrSkt].StackRes[CurrStack].PciResourceMem64Limit; + if (MemLimit64 > MemBase64) { + AmlResourceAddress64Pointer->Minimum = (UINT64) MemBase64; + AmlResourceAddress64Pointer->Maximum = (UINT64) MemLimit64; + AmlResourceAddress64Pointer->AddressLength = (UINT64) (MemLimit64 - MemBase64 + 1); + } + DEBUG((DEBUG_ERROR,", FIX4 MemBase64 = 0x%x, MemLimit64 = 0x%x\n",MemBase64, MemLimit64)); + StackNumMem64++; + Fixes++; + } + break; + default: + break; + } + } + } + + //return Status; + return EFI_SUCCESS; + +} diff --git a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt.inf b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt.inf new file mode 100644 index 0000000000..fd1595017f --- /dev/null +++ b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt.inf @@ -0,0 +1,29 @@ +## @file +# +# Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = Dsdt + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD + MODULE_TYPE = USER_DEFINED + VERSION_STRING = 1.0 + +[Sources] + Dsdt/WFPPlatform.asl + +[Packages] + MdePkg/MdePkg.dec + PurleyOpenBoardPkg/OpenBoardPkg.dec + PurleyRefreshSiliconPkg/SiPkg.dec + MinPlatformPkg/MinPlatformPkg.dec + +[BuildOptions] + # add -vr and -so to generate offset.h + *_*_*_ASL_FLAGS = -oi -vr -so + + -- 2.27.0.windows.1