From: "Nate DeSimone" <nathaniel.l.desimone@intel.com>
To: devel@edk2.groups.io
Cc: Chasel Chiu <chasel.chiu@intel.com>,
Mike Kinney <michael.d.kinney@intel.com>,
Isaac Oram <isaac.w.oram@intel.com>,
Mohamed Abbas <mohamed.abbas@intel.com>,
Michael Kubacki <michael.kubacki@microsoft.com>,
Zachary Bobroff <zacharyb@ami.com>,
Harikrishna Doppalapudi <harikrishnad@ami.com>
Subject: [edk2-non-osi] [PATCH V1 4/9] PurleySiliconBinPkg/FV: Add RELEASE FvPostMemorySilicon
Date: Tue, 11 May 2021 02:54:29 -0700 [thread overview]
Message-ID: <20210511095434.12575-5-nathaniel.l.desimone@intel.com> (raw)
In-Reply-To: <20210511095434.12575-1-nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Mike Kinney <michael.d.kinney@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Mohamed Abbas <mohamed.abbas@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Zachary Bobroff <zacharyb@ami.com>
Cc: Harikrishna Doppalapudi <harikrishnad@ami.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../RELEASE/FVPOSTMEMORYSILICON.Fv | Bin 0 -> 196608 bytes
.../RELEASE/FVPOSTMEMORYSILICON.Fv.txt | 3 +
.../RELEASE/FvPostMemorySilicon.inf | 267 ++++++++++++++++++
3 files changed, 270 insertions(+)
create mode 100644 Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv
create mode 100644 Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv.txt
create mode 100644 Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FvPostMemorySilicon.inf
diff --git a/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv b/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv
new file mode 100644
index 0000000000000000000000000000000000000000..abc6494e6c973b2dd2a164a4c49a1132d7031100
GIT binary patch
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diff --git a/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv.txt b/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv.txt
new file mode 100644
index 0000000..d8e922b
--- /dev/null
+++ b/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FVPOSTMEMORYSILICON.Fv.txt
@@ -0,0 +1,3 @@
+EFI_FV_TOTAL_SIZE = 0x30000
+EFI_FV_TAKEN_SIZE = 0x5028
+0x000000E8 299D6F8B-2EC9-4E40-9EC6-DDAA7EBF5FD9
diff --git a/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FvPostMemorySilicon.inf b/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FvPostMemorySilicon.inf
new file mode 100644
index 0000000..b206408
--- /dev/null
+++ b/Silicon/Intel/PurleySiliconBinPkg/FV/FvPostMemorySilicon/RELEASE/FvPostMemorySilicon.inf
@@ -0,0 +1,267 @@
+### @file
+#
+# Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010017
+ BASE_NAME = FvPostMemorySilicon
+ FILE_GUID = 2BB16628-138D-455A-91C6-3409341AD6A2
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+
+[Binaries]
+ FV|FVPOSTMEMORYSILICON.Fv
+
+
+#![Pcd]
+#! gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0xFFE20000
+
+# ## @file
+# # Component description file for the Silicon Init Post Memory module.
+# #
+# #@copyright
+# # Copyright (c) 2013 - 2016 Intel Corporation. All rights reserved
+# # This software and associated documentation (if any) is furnished
+# # under a license and may only be used or copied in accordance
+# # with the terms of the license. Except as permitted by the
+# # license, no part of this software or documentation may be
+# # reproduced, stored in a retrieval system, or transmitted in any
+# # form or by any means without the express written consent of
+# # Intel Corporation.
+# # This file contains an 'Intel Peripheral Driver' and is uniquely
+# # identified as "Intel Reference Module" and is licensed for Intel
+# # CPUs and chipsets under the terms of your license agreement with
+# # Intel or your vendor. This file may be modified by the user, subject
+# # to additional terms of the license agreement.
+# #
+# #@par Specification
+# #
+# ##
+#
+# # DO NOT EDIT
+# # FILE auto-generated
+#
+# [Defines]
+# INF_VERSION = 0x00010017
+# BASE_NAME = SiInit
+# FILE_GUID = 299D6F8B-2EC9-4E40-9EC6-DDAA7EBF5FD9
+# MODULE_TYPE = PEIM
+# VERSION_STRING = 1.0
+# ENTRY_POINT = SiInit
+#
+[Packages.IA32]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ PurleyRefreshSiliconPkg/SiPkg.dec
+ PurleyRefreshSiliconPkg/Override/IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec
+
+# [Binaries.IA32]
+# PE32|SiInit.efi
+# PEI_DEPEX|SiInit.depex
+# DISPOSABLE|SiInit.pdb
+#
+[PatchPcd.IA32]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x0000000080000000|0x4910 # 0x47D0+0x140
+
+
+# [Protocols.IA32]
+#
+# [Ppis.IA32]
+# ## CONSUMES
+# ## CONSUMES
+# gEfiEndOfPeiSignalPpiGuid
+#
+# ## SOMETIMES_CONSUMES
+# gPcdPpiGuid
+#
+# ## CONSUMES
+# gEfiPeiPcdPpiGuid
+#
+# ## SOMETIMES_CONSUMES
+# gGetPcdInfoPpiGuid
+#
+# ## SOMETIMES_CONSUMES
+# gEfiGetPcdInfoPpiGuid
+#
+# ## SOMETIMES_PRODUCES
+# gEfiPeiFirmwareVolumeInfoPpiGuid
+#
+# ## SOMETIMES_PRODUCES
+# gEfiPeiFirmwareVolumeInfo2PpiGuid
+#
+# gPeiSmmControlPpiGuid
+#
+# #SERVER_BIOS gPchSpiPpiGuid ## PRODUCES
+# ## PRODUCES #SERVER_BIOS
+# gPeiSpiPpiGuid
+#
+# ## CONSUMES #SERVER_BIOS
+# gPchPlatformPolicyPpiGuid
+#
+# ## PRODUCES
+# gWdtPpiGuid
+#
+# ## PRODUCES
+# gPchResetPpiGuid
+#
+# ## CONSUMES
+# gPchResetCallbackPpiGuid
+#
+# ## CONSUMES
+# gEfiPeiMemoryDiscoveredPpiGuid
+#
+# ## PRODUCES
+# gEfiPeiSmbus2PpiGuid
+#
+# ## CONSUMES
+# gPchPcieDeviceTablePpiGuid
+#
+# ## CONSUMES
+# gPchHdaVerbTablePpiGuid
+#
+# ## CONSUMES
+# gPchHsioPtssTablePpiGuid
+#
+# ## CONSUMES
+# gPchPmcXramOffsetDataPpiGuid
+#
+# #SERVER_BIOS gHeciPpiGuid ## CONSUMES
+# ## CONSUMES #SERVER_BIOS
+# gPeiCachePpiGuid
+#
+# ## CONSUMES #SERVER_BIOS
+# gPchInitPpiGuid
+#
+# ## CONSUMES #SERVER_BIOS
+# gPchPeiInitDonePpiGuid
+#
+# ## PRODUCES #SERVER_BIOS
+# gDirtyWarmResetSignalGuid
+#
+# ## PRODUCES #SERVER_BIOS
+# gDirtyWarmResetGuid
+#
+#
+# [Guids.IA32]
+# ## CONSUMES
+# gSiPolicyHobGuid
+#
+# ## SOMETIMES_PRODUCES ## HOB # MemoryAllocation StackHob
+# gEfiHobMemoryAllocStackGuid
+#
+# ## SOMETIMES_PRODUCES ## HOB # MemoryAllocation BspStoreHob
+# gEfiHobMemoryAllocBspStoreGuid
+#
+# ## SOMETIMES_PRODUCES ## HOB # MemoryAllocation ModuleHob
+# gEfiHobMemoryAllocModuleGuid
+#
+# ## SOMETIMES_PRODUCES ## GUID # FV File System Guid.
+# gEfiFirmwareFileSystem2Guid
+#
+# gEfiCpRcPkgTokenSpaceGuid
+#
+# gPlatformGpioConfigGuid
+#
+# gEfiSmbusArpMapGuid
+#
+# gPchPolicyHobGuid
+#
+# gPchDeviceTableHobGuid
+#
+# gPchChipsetInitHobGuid
+#
+# gWdtHobGuid
+#
+# #PCH_SERVER_BIOS_FLAG
+# gPchPsfErrorHobGuid
+#
+#
+[PcdEx.IA32]
+ gEfiCpRcPkgTokenSpaceGuid.PcdPcieMmcfgTablePtr
+
+
+# [LibraryClasses.IA32]
+# ## @LIB_INSTANCES
+# # MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
+# # MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+# # MdePkg/Library/PeiHobLib/PeiHobLib.inf
+# # MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
+# # MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+# # MdePkg/Library/BaseLib/BaseLib.inf
+# # MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+# # MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+# # MdePkg/Library/BasePrintLib/BasePrintLib.inf
+# # MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+# # PurleyRcPkg/Library/UsraRegisterFilterLibNull/UsraRegisterFilterLibNull.inf
+# # PurleySktPkg/Library/USRATraceLib/USRATraceLib.inf
+# # PurleySktPkg/Library/PcieAddressLib/PcieAddressLib.inf
+# # PurleySktPkg/Library/CsrToPcieLib/CsrToPciePeiLib.inf
+# # MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf
+# # PurleyRcPkg/Library/UsraAccessLib/UsraAccessLib.inf
+# # PurleyRcPkg/Library/MmPciBaseLib/MmPciBaseLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchInfoLib/PeiDxeSmmPchInfoLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchP2sbLib/PeiDxeSmmPchP2sbLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchCycleDecodingLib/PeiDxeSmmPchCycleDecodingLib.inf
+# # MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchPcieRpLib/PeiDxeSmmPchPcieRpLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf
+# # MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchHsioLib/PeiDxeSmmPchHsioLib.inf
+# # LewisburgPkg/LibraryPrivate/PeiDxeSmmPchWdtCommonLib/PeiDxeSmmPchWdtCommonLib.inf
+# # LewisburgPkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+# # LewisburgPkg/LibraryPrivate/PeiDxeSmmPchSmbusCommonLib/PeiDxeSmmPchSmbusCommonLib.inf
+# # LewisburgPkg/LibraryPrivate/BasePchResetCommonLib/BasePchResetCommonLib.inf
+# # LewisburgPkg/LibraryPrivate/PeiDxeSmmPchInitCommonLib/PeiDxeSmmPchInitCommonLib.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchSerialIoLib/PeiDxeSmmPchSerialIoLib.inf
+# # LewisburgPkg/LibraryPrivate/PeiPchSmmControlLib/PeiPchSmmControlLib.inf
+# # LewisburgPkg/LibraryPrivate/PeiDxeSmmGpioPrivateLib/PeiDxeSmmGpioPrivateLib.inf
+# # LewisburgPkg/LibraryPrivate/PeiDxeSmmPchPciExpressHelpersLib/PeiDxeSmmPchPciExpressHelpersLib.inf
+# # LewisburgPkg/Library/BaseTraceHubInitLibNull/BaseTraceHubInitLibNull.inf
+# # LewisburgPkg/Library/PeiDxeSmmPchGbeLib/PeiDxeSmmPchGbeLib.inf
+# # PcAtChipsetPkg/Library/AcpiTimerLib/PeiAcpiTimerLib.inf
+# # MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+# # LewisburgPkg/LibraryPrivate/PeiPchInitLib/PeiPchInitLib.inf
+#
+# [Depex.IA32]
+# # (gEfiPeiMemoryDiscoveredPpiGuid) AND (gEfiPeiPcdPpiGuid) AND ()
+#
+#
+#
+#
+#
+# [BuildOptions.IA32]
+# ## @AsBuilt
+# ## MSFT:RELEASE_VS2015x86_IA32_SYMRENAME_FLAGS = Symbol renaming not needed for
+# ## MSFT:RELEASE_VS2015x86_IA32_ASLDLINK_FLAGS = /NODEFAULTLIB /ENTRY:ReferenceAcpiTable /SUBSYSTEM:CONSOLE
+# ## MSFT:RELEASE_VS2015x86_IA32_VFR_FLAGS = -n
+# ## MSFT:RELEASE_VS2015x86_IA32_PP_FLAGS = /nologo /E /TC /FIAutoGen.h -D CRB_FLAG -D TRAD_FLAG=1 $(ULT_BUILD_OPTION) -D PCH_SERVER_BIOS_FLAG=1 -D SUS_WELL_RESTORE=1 -D SERVER_BIOS_FLAG=1 -D PCH_SPT -D PURLEY_FLAG $(SPARING_SCRATCHPAD_OPTION) $(TRACE_HUB_DEBUG_BUILD_OPTIONS) $(TRACE_HUB_INIT_BUILD_OPTIONS) -D MAX_SOCKET=2 -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT -D SKX_HOST -D CLX_HOST -D MDEPKG_NDEBUG -D SILENT_MODE
+# ## MSFT:RELEASE_VS2015x86_IA32_GENFW_FLAGS =
+# ## MSFT:RELEASE_VS2015x86_IA32_OPTROM_FLAGS = -e
+# ## MSFT:RELEASE_VS2015x86_IA32_SLINK_FLAGS = /NOLOGO /LTCG
+# ## MSFT:RELEASE_VS2015x86_IA32_ASM_FLAGS = /nologo /c /WX /W3 /Cx /coff /Zd /Zi
+# ## MSFT:RELEASE_VS2015x86_IA32_ASL_FLAGS =
+# ## MSFT:RELEASE_VS2015x86_IA32_CC_FLAGS = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw -D CRB_FLAG -D TRAD_FLAG=1 $(ULT_BUILD_OPTION) -D PCH_SERVER_BIOS_FLAG=1 -D SUS_WELL_RESTORE=1 -D SERVER_BIOS_FLAG=1 -D PCH_SPT -D PURLEY_FLAG $(SPARING_SCRATCHPAD_OPTION) $(TRACE_HUB_DEBUG_BUILD_OPTIONS) $(TRACE_HUB_INIT_BUILD_OPTIONS) -D MAX_SOCKET=2 -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT -D SKX_HOST -D CLX_HOST -D MDEPKG_NDEBUG -D SILENT_MODE /Zi /Gm
+# ## MSFT:RELEASE_VS2015x86_IA32_NASMB_FLAGS = -f bin
+# ## MSFT:RELEASE_VS2015x86_IA32_VFRPP_FLAGS = /nologo /E /TC /DVFRCOMPILE /FI$(MODULE_NAME)StrDefs.h -D CRB_FLAG -D TRAD_FLAG=1 $(ULT_BUILD_OPTION) -D PCH_SERVER_BIOS_FLAG=1 -D SUS_WELL_RESTORE=1 -D SERVER_BIOS_FLAG=1 -D PCH_SPT -D PURLEY_FLAG $(SPARING_SCRATCHPAD_OPTION) $(TRACE_HUB_DEBUG_BUILD_OPTIONS) $(TRACE_HUB_INIT_BUILD_OPTIONS) -D MAX_SOCKET=2 -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT -D SKX_HOST -D CLX_HOST -D MDEPKG_NDEBUG -D SILENT_MODE
+# ## MSFT:RELEASE_VS2015x86_IA32_ASLCC_FLAGS = /nologo /c /FIAutoGen.h /TC /Dmain=ReferenceAcpiTable -D CRB_FLAG -D TRAD_FLAG=1 $(ULT_BUILD_OPTION) -D PCH_SERVER_BIOS_FLAG=1 -D SUS_WELL_RESTORE=1 -D SERVER_BIOS_FLAG=1 -D PCH_SPT -D PURLEY_FLAG $(SPARING_SCRATCHPAD_OPTION) $(TRACE_HUB_DEBUG_BUILD_OPTIONS) $(TRACE_HUB_INIT_BUILD_OPTIONS) -D MAX_SOCKET=2 -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT -D SKX_HOST -D CLX_HOST -D MDEPKG_NDEBUG -D SILENT_MODE
+# ## MSFT:RELEASE_VS2015x86_IA32_APP_FLAGS = /nologo /E /TC -D CRB_FLAG -D TRAD_FLAG=1 $(ULT_BUILD_OPTION) -D PCH_SERVER_BIOS_FLAG=1 -D SUS_WELL_RESTORE=1 -D SERVER_BIOS_FLAG=1 -D PCH_SPT -D PURLEY_FLAG $(SPARING_SCRATCHPAD_OPTION) $(TRACE_HUB_DEBUG_BUILD_OPTIONS) $(TRACE_HUB_INIT_BUILD_OPTIONS) -D MAX_SOCKET=2 -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT -D SKX_HOST -D CLX_HOST -D MDEPKG_NDEBUG -D SILENT_MODE
+# ## MSFT:RELEASE_VS2015x86_IA32_DLINK2_FLAGS =
+# ## MSFT:RELEASE_VS2015x86_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:X86 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data /DEBUG
+# ## MSFT:RELEASE_VS2015x86_IA32_ASLPP_FLAGS = /nologo /E /C /FIAutoGen.h -D CRB_FLAG -D TRAD_FLAG=1 $(ULT_BUILD_OPTION) -D PCH_SERVER_BIOS_FLAG=1 -D SUS_WELL_RESTORE=1 -D SERVER_BIOS_FLAG=1 -D PCH_SPT -D PURLEY_FLAG $(SPARING_SCRATCHPAD_OPTION) $(TRACE_HUB_DEBUG_BUILD_OPTIONS) $(TRACE_HUB_INIT_BUILD_OPTIONS) -D MAX_SOCKET=2 -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT -D SKX_HOST -D CLX_HOST -D MDEPKG_NDEBUG -D SILENT_MODE
+# ## MSFT:RELEASE_VS2015x86_IA32_OBJCOPY_FLAGS = objcopy not needed for
+# ## MSFT:RELEASE_VS2015x86_IA32_MAKE_FLAGS = /nologo
+# ## MSFT:RELEASE_VS2015x86_IA32_ASMLINK_FLAGS = /nologo /tiny
+# ## MSFT:RELEASE_VS2015x86_IA32_NASM_FLAGS = -Ox -f win32
--
2.27.0.windows.1
next prev parent reply other threads:[~2021-05-11 9:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-11 9:54 [edk2-non-osi] [PATCH V1 0/9] PurleySiliconBinPkg: Restore Silicon FVs Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 1/9] PurleySiliconBinPkg/FV: Add License.txt Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 2/9] PurleySiliconBinPkg/FV: Add RELEASE FvLateSilicon Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 3/9] PurleySiliconBinPkg/FV: Remove DEBUG FvLateSilicon Nate DeSimone
2021-05-11 9:54 ` Nate DeSimone [this message]
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 5/9] PurleySiliconBinPkg/FV: Add DEBUG FvPostMemorySilicon Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 6/9] PurleySiliconBinPkg/FV: Add RELEASE FvPreMemorySilicon Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 7/9] PurleySiliconBinPkg/FV: Add DEBUG FvPreMemorySilicon Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 8/9] PurleySiliconBinPkg/FV: Add RELEASE FvTempMemorySilicon Nate DeSimone
2021-05-11 9:54 ` [edk2-non-osi] [PATCH V1 9/9] PurleySiliconBinPkg/FV: Add DEBUG FvTempMemorySilicon Nate DeSimone
2021-05-11 22:19 ` [edk2-non-osi] [PATCH V1 0/9] PurleySiliconBinPkg: Restore Silicon FVs Oram, Isaac W
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