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From: "Daniel Schaefer" <daniel.schaefer@hpe.com>
To: <devel@edk2.groups.io>
Cc: Abner Chang <abner.chang@hpe.com>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Liming Gao <gaoliming@byosoft.com.cn>,
	Zhiguang Liu <zhiguang.liu@intel.com>,
	Leif Lindholm <leif@nuviainc.com>
Subject: [PATCH v1 1/1] Add MemoryFence implementation for RiscV64
Date: Sun, 16 May 2021 02:12:34 +0800	[thread overview]
Message-ID: <20210515181234.15186-1-daniel.schaefer@hpe.com> (raw)

Cc: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
 MdePkg/Library/BaseLib/BaseLib.inf           |  1 +
 MdePkg/Library/BaseLib/RiscV64/MemoryFence.S | 33 ++++++++++++++++++++
 2 files changed, 34 insertions(+)

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index b76f3af380ea..b7ab5f632366 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -399,6 +399,7 @@
   RiscV64/DisableInterrupts.c
   RiscV64/EnableInterrupts.c
   RiscV64/CpuPause.c
+  RiscV64/MemoryFence.S             | GCC
   RiscV64/RiscVSetJumpLongJump.S    | GCC
   RiscV64/RiscVCpuBreakpoint.S      | GCC
   RiscV64/RiscVCpuPause.S           | GCC
diff --git a/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
new file mode 100644
index 000000000000..283df9356a9a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
@@ -0,0 +1,33 @@
+##------------------------------------------------------------------------------
+#
+# MemoryFence() for RiscV64
+
+# Copyright (c) 2021, Hewlett Packard Enterprise Development. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##------------------------------------------------------------------------------
+
+.text
+.p2align 2
+
+ASM_GLOBAL ASM_PFX(MemoryFence)
+
+
+#/**
+#  Used to serialize load and store operations.
+#
+#  All loads and stores that proceed calls to this function are guaranteed to be
+#  globally visible when this function returns.
+#
+#**/
+#VOID
+#EFIAPI
+#MemoryFence (
+#  VOID
+#  );
+#
+ASM_PFX(MemoryFence):
+    // Fence on all memory and I/O
+    fence
+    ret
-- 
2.30.1


             reply	other threads:[~2021-05-15 18:12 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-15 18:12 Daniel Schaefer [this message]
2021-05-18  1:04 ` 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 gaoliming
2021-05-18  2:35   ` Daniel Schaefer
2021-05-21  5:14     ` 回复: " gaoliming
2021-05-21  5:27       ` Daniel Schaefer
2021-05-21  6:35         ` 回复: " gaoliming
2021-05-21 12:45           ` Daniel Schaefer
2021-06-01  0:56             ` 回复: " gaoliming
2021-06-01  7:58               ` Laszlo Ersek
2021-06-02  2:16                 ` 回复: " gaoliming
2021-06-02  2:35                   ` Daniel Schaefer
2021-07-14 14:11 ` Abner Chang
2021-07-20  5:50   ` 回复: " gaoliming

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