From: "Michael Kubacki" <mikuback@linux.microsoft.com>
To: devel@edk2.groups.io
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>,
Nate DeSimone <nathaniel.l.desimone@intel.com>,
Heng Luo <heng.luo@intel.com>
Subject: [edk2-platforms][PATCH v2 14/35] TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
Date: Tue, 18 May 2021 20:59:26 -0700 [thread overview]
Message-ID: <20210519035947.1234-15-mikuback@linux.microsoft.com> (raw)
In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com>
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 8 ++---
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 4 +--
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 38 ++++++++++----------
3 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 66c8814c97bb..56da991ab544 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -39,8 +39,8 @@ [Packages]
BoardModulePkg/BoardModulePkg.dec
[Pcd]
- gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase ## CONSUMES
@@ -61,8 +61,8 @@ [Pcd]
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
- gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUMES
+ gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase ## CONSUMES
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
index b21ae6401f12..24e2a963ba64 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -37,8 +37,8 @@
## Build script checks the requirement.
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00800000 # Flash addr (0xFFC00000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00880000 # Flash addr (0xFFC80000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that this value change
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00880000 # Flash addr (0xFFC80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that this value change
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x008F0000 # Flash addr (0xFFC00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00080000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00970000 # Flash addr (0xFFD70000)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index c1fd2be6af54..e3b2f048524c 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.TigerlakeURvp]
# assigned with PCD values. Instead, it uses the definitions for its variety, which
# are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
#
-BaseAddress = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
-Size = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
+BaseAddress = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress #The base address of the FLASH Device.
+Size = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = $(FLASH_BLOCK_SIZE)
NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -41,23 +41,23 @@ [FD.TigerlakeURvp]
# Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x1000
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
@@ -153,8 +153,8 @@ [FD.TigerlakeURvp]
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase|gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize
FV = FvFwBinaries
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
#Microcode
FV = FvMicrocode
--
2.28.0.windows.1
next prev parent reply other threads:[~2021-05-19 4:00 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-19 3:59 [edk2-platforms][PATCH v2 00/35] Consolidate SpiFlashCommonLib instances Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 01/35] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry Michael Kubacki
2021-05-19 8:58 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 02/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 03/35] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF Michael Kubacki
2021-05-19 8:59 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 04/35] IntelSiliconPkg: Add BIOS area base address and size PCDs Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 05/35] IntelSiliconPkg: Add microcode FV PCDs Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 06/35] IntelSiliconPkg: Add PCH SPI PPI Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 07/35] IntelSiliconPkg: Add PCH SPI Protocol Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 08/35] IntelSiliconPkg: Add SpiFlashCommonLib Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 09/35] IntelSiliconPkg: Add SmmSpiFlashCommonLib Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 10/35] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 11/35] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 12/35] KabylakeOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 13/35] SimicsOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` Michael Kubacki [this message]
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 15/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 16/35] CoffeelakeSiliconPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 17/35] KabylakeSiliconPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 18/35] SimicsIch10Pkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 19/35] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 20/35] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
2021-05-19 8:58 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 21/35] KabylakeOpenBoardPkg: " Michael Kubacki
2021-05-19 8:49 ` [edk2-devel] " Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 22/35] SimicsOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 23/35] TigerlakeOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 24/35] WhiskeylakeOpenBoardPkg: " Michael Kubacki
2021-05-19 8:57 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 25/35] MinPlatformPkg: Remove SpiFvbService modules Michael Kubacki
2021-05-19 8:50 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 27/35] KabylakeSiliconPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 28/35] SimicsIch10Pkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 29/35] TigerlakeOpenBoardPkg: " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 30/35] MinPlatformPkg: Remove SpiFlashCommonLibNull Michael Kubacki
2021-05-19 8:48 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 31/35] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec Michael Kubacki
2021-05-19 8:47 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 32/35] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 33/35] KabylakeSiliconPkg: " Michael Kubacki
2021-05-19 8:47 ` Chiu, Chasel
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 34/35] SimicsIch10Pkg: Remove PCH SPI SMM " Michael Kubacki
2021-05-19 3:59 ` [edk2-platforms][PATCH v2 35/35] TigerlakeSiliconPkg: Remove PCH SPI PPI and " Michael Kubacki
2021-05-22 1:04 ` [edk2-platforms][PATCH v2 00/35] Consolidate SpiFlashCommonLib instances Nate DeSimone
2021-05-26 23:57 ` Nate DeSimone
2021-05-27 13:17 ` Michael Kubacki
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