From: "Marcin Wojtas" <mw@semihalf.com>
To: devel@edk2.groups.io
Cc: leif@nuviainc.com, ardb+tianocore@kernel.org,
Samer.El-Haj-Mahmoud@arm.com, sunny.Wang@arm.com,
gjb@semihalf.com, upstream@semihalf.com,
Marcin Wojtas <mw@semihalf.com>
Subject: [edk2-platforms PATCH 4/6] Marvell/Cn913xDbA: AcpiTables: Use unique UID's
Date: Mon, 24 May 2021 07:29:17 +0200 [thread overview]
Message-ID: <20210524052919.2496579-5-mw@semihalf.com> (raw)
In-Reply-To: <20210524052919.2496579-1-mw@semihalf.com>
The CN9131 variant's SSDT comprised UID's, whose values
overlapped the ones used in the main DSDT file. Fix that.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
index dc32fe836a..691a709c18 100644
--- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
+++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
@@ -18,7 +18,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
Device (AHC1)
{
Name (_HID, "LNRO001E") // _HID: Hardware ID
- Name (_UID, 0x00) // _UID: Unique ID
+ Name (_UID, 0x01) // _UID: Unique ID
Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
Name (_CLS, Package (0x03) // _CLS: Class Code
{
@@ -43,7 +43,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
Device (XHC2)
{
Name (_HID, "PNP0D10") // _HID: Hardware ID
- Name (_UID, 0x01) // _UID: Unique ID
+ Name (_UID, 0x02) // _UID: Unique ID
Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
@@ -62,7 +62,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
Name (_CCA, 0x01) // Cache-coherent controller
- Name (_UID, 0x00) // _UID: Unique ID
+ Name (_UID, 0x01) // _UID: Unique ID
Name (_CRS, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
--
2.29.0
next prev parent reply other threads:[~2021-05-24 5:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-24 5:29 [edk2-platforms PATCH 0/6] Marvell ACS fixes Marcin Wojtas
2021-05-24 5:29 ` [edk2-platforms PATCH 1/6] Marvell/Drivers: SmbiosPlatformDxe: Align Type17 to SMBIOS v3.2 Marcin Wojtas
2021-05-24 11:09 ` Samer El-Haj-Mahmoud
2021-05-24 5:29 ` [edk2-platforms PATCH 2/6] Marvell: Armada7k8k/OcteonTx: Fix RT debug prints Marcin Wojtas
2021-05-24 10:59 ` Samer El-Haj-Mahmoud
2021-05-25 11:50 ` Sunny Wang
2021-05-24 5:29 ` [edk2-platforms PATCH 3/6] Marvell: Armada7k8k/OcteonTx: Switch SPCR UART subtype to 0x1 Marcin Wojtas
2021-05-24 11:06 ` Samer El-Haj-Mahmoud
[not found] ` <1681FC02AF1B6E10.27195@groups.io>
2021-05-24 15:04 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-05-25 11:53 ` Sunny Wang
2021-05-24 5:29 ` Marcin Wojtas [this message]
2021-05-24 11:00 ` [edk2-platforms PATCH 4/6] Marvell/Cn913xDbA: AcpiTables: Use unique UID's Samer El-Haj-Mahmoud
2021-05-25 13:52 ` Sunny Wang
2021-05-24 5:29 ` [edk2-platforms PATCH 5/6] Marvell: RealTimeClockLib: Fix daylight and timezone handling Marcin Wojtas
2021-05-24 11:08 ` Samer El-Haj-Mahmoud
2021-05-24 5:29 ` [edk2-platforms PATCH 6/6] Marvell: RealTimeClockLib: Rework LibGetWakeupTime/LibSetWakeupTime Marcin Wojtas
2021-06-02 6:53 ` Ard Biesheuvel
2021-06-02 7:06 ` [edk2-platforms PATCH 0/6] Marvell ACS fixes Ard Biesheuvel
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