From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.8012.1621940292418862693 for ; Tue, 25 May 2021 03:58:12 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pranav.madhu@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1D129D6E; Tue, 25 May 2021 03:58:12 -0700 (PDT) Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E6EE73F719; Tue, 25 May 2021 03:58:10 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar Subject: [edk2-platforms][PATCH V2 3/6] Platform/Sgi: Low Power Idle states for RD-N2-Cfg1 Date: Tue, 25 May 2021 16:27:58 +0530 Message-Id: <20210525105801.13793-4-pranav.madhu@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210525105801.13793-1-pranav.madhu@arm.com> References: <20210525105801.13793-1-pranav.madhu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable RD-N2-Cfg1 platform supports 2 LPI states, LPI1 (Standby WFI) and LPI3 (Power-down) and the cluster supports LPI2 (Power-down) state. The LPI implementation also supports combined power state for core and cluster. Signed-off-by: Pranav Madhu Reviewed-by: Sami Mujawar --- Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl | 158 +++++++++++++++++= +++ 1 file changed, 158 insertions(+) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl b/Platform/= ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl index d68523bc43ed..55f51cc26aff 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl @@ -19,91 +19,249 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM_REVISION) { Scope (_SB) { + /* _OSC: Operating System Capabilities */ + Method (_OSC, 4, Serialized) { + CreateDWordField (Arg3, 0x00, STS0) + CreateDWordField (Arg3, 0x04, CAP0) + + /* Platform-wide Capabilities */ + If (LEqual (Arg0, ToUUID("0811b06e-4a27-44f9-8d60-3cbbc22e7b48")))= { + /* OSC rev 1 supported, for other version, return failure */ + If (LEqual (Arg1, One)) { + And (STS0, Not (OSC_STS_MASK), STS0) + + If (And (CAP0, OSC_CAP_OS_INITIATED_LPI)) { + /* OS initiated LPI not supported */ + And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } Else { + And (STS0, Not (OSC_STS_MASK), STS0) + Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0= ) + } + } Else { + And (STS0, Not (OSC_STS_MASK), STS0) + Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_UUID), STS0) + } + + Return (Arg3) + } + + Name (CLPI, Package () { /* LPI for Cluster, support 1 LPI state */ + 0, // Version + 0, // Level Index + 1, // Count + Package () { // Power Gating state for Cluster + 2500, // Min residency (uS) + 1150, // Wake latency (uS) + 1, // Flags + 1, // Arch Context Flags + 100, // Residency Counter Frequency + 0, // No Parent State + 0x00000020, // Integer Entry method + ResourceTemplate () { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate () { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "LPI2-Cluster" + }, + }) + + Name (PLPI, Package () { /* LPI for Processor, support 2 LPI states= */ + 0, // Version + 1, // Level Index + 2, // Count + Package () { // WFI for CPU + 1, // Min residency (uS) + 1, // Wake latency (uS) + 1, // Flags + 0, // Arch Context lost Flags (no loss) + 100, // Residency Counter Frequency + 0, // No parent state + ResourceTemplate () { // Register Entry method + Register (FFixedHW, + 32, // Bit Width + 0, // Bit Offset + 0xFFFFFFFF, // Address + 3, // Access Size + ) + }, + ResourceTemplate () { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate () { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "LPI1-Core" + }, + Package () { // Power Gating state for CPU + 150, // Min residency (uS) + 350, // Wake latency (uS) + 1, // Flags + 1, // Arch Context lost Flags (Core context l= ost) + 100, // Residency Counter Frequency + 1, // Parent node can be in any shallower sta= te + ResourceTemplate () { // Register Entry method + Register (FFixedHW, + 32, // Bit Width + 0, // Bit Offset + 0x40000002, // Address (PwrLvl:core, StateTyp:PwrDn) + 3, // Access Size + ) + }, + ResourceTemplate () { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate () { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "LPI3-Core" + }, + }) + Device (CL00) { // Cluster 0 Name (_HID, "ACPI0010") Name (_UID, 0) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP00) { // Neoverse N2 core 0 Name (_HID, "ACPI0007") Name (_UID, 0) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL01) { // Cluster 1 Name (_HID, "ACPI0010") Name (_UID, 1) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP01) { // Neoverse N2 core 1 Name (_HID, "ACPI0007") Name (_UID, 1) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL02) { // Cluster 2 Name (_HID, "ACPI0010") Name (_UID, 2) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP02) { // Neoverse N2 core 2 Name (_HID, "ACPI0007") Name (_UID, 2) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL03) { // Cluster 3 Name (_HID, "ACPI0010") Name (_UID, 3) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP03) { // Neoverse N2 core 3 Name (_HID, "ACPI0007") Name (_UID, 3) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL04) { // Cluster 4 Name (_HID, "ACPI0010") Name (_UID, 4) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP04) { // Neoverse N2 core 4 Name (_HID, "ACPI0007") Name (_UID, 4) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL05) { // Cluster 5 Name (_HID, "ACPI0010") Name (_UID, 5) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP05) { // Neoverse N2 core 5 Name (_HID, "ACPI0007") Name (_UID, 5) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL06) { // Cluster 6 Name (_HID, "ACPI0010") Name (_UID, 6) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP06) { // Neoverse N2 core 6 Name (_HID, "ACPI0007") Name (_UID, 6) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } =20 Device (CL07) { // Cluster 7 Name (_HID, "ACPI0010") Name (_UID, 7) + Method (_LPI, 0, NotSerialized) { + Return (\_SB.CLPI) + } =20 Device (CP07) { // Neoverse N2 core 7 Name (_HID, "ACPI0007") Name (_UID, 7) Name (_STA, 0xF) + + Method (_LPI, 0, NotSerialized) { + Return (\_SB.PLPI) + } } } } // Scope(_SB) --=20 2.17.1