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Cc: Thang Nguyen Cc: Chuong Tran Cc: Phong Vo Cc: Leif Lindholm Cc: Michael D Kinney Cc: Ard Biesheuvel Cc: Nate DeSimone Signed-off-by: Vu Nguyen --- Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec | 3 = + Platform/Ampere/JadePkg/Jade.dsc | 1 = + Platform/Ampere/JadePkg/Jade.fdf | 1 = + Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf | 58 = +++ Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.h | 74 = +++ Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/NVDataStruc.h | 19 = + Silicon/Ampere/AmpereAltraPkg/Include/Guid/CpuConfigHii.h | 19 = + Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/Vfr.vfr | 43 = ++ Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c | 508 = ++++++++++++++++++++ Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/VfrStrings.uni | 17 = + 10 files changed, 743 insertions(+) diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec b/Silicon/Amp= ere/AmpereAltraPkg/AmpereAltraPkg.dec index a372a4e0078b..05b4e8576836 100644 --- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec +++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec @@ -50,6 +50,9 @@ [LibraryClasses] TrngLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/TrngLib.h =20 [Guids] + # GUID for the CPU HII configuration form + gCpuConfigFormSetGuid =3D { 0x43FAA144, 0xA2DF, 0x4050, { 0xA7, 0= xFD, 0xEE, 0x17, 0xC9, 0xB8, 0x88, 0x8E } } + ## NVParam MM GUID gNVParamMmGuid =3D { 0xE4AC5024, 0x29BE, 0x4ADC, { 0x93, 0= x36, 0x87, 0xB5, 0xA0, 0x76, 0x23, 0x2D } } =20 diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jad= e.dsc index 75b3ece3817e..547fbb68b4e3 100755 --- a/Platform/Ampere/JadePkg/Jade.dsc +++ b/Platform/Ampere/JadePkg/Jade.dsc @@ -180,3 +180,4 @@ [Components.common] # Silicon/Ampere/AmpereAltraPkg/Drivers/PlatformInfoDxe/PlatformInfoDxe.in= f Silicon/Ampere/AmpereAltraPkg/Drivers/MemInfoDxe/MemInfoDxe.inf + Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jad= e.fdf index e71f3e79e6b3..b8342fde9d72 100755 --- a/Platform/Ampere/JadePkg/Jade.fdf +++ b/Platform/Ampere/JadePkg/Jade.fdf @@ -355,5 +355,6 @@ [FV.FvMain] # INF Silicon/Ampere/AmpereAltraPkg/Drivers/PlatformInfoDxe/PlatformInfoDx= e.inf INF Silicon/Ampere/AmpereAltraPkg/Drivers/MemInfoDxe/MemInfoDxe.inf + INF Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf =20 !include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDx= e.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf new file mode 100755 index 000000000000..a47d2b894b76 --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf @@ -0,0 +1,58 @@ +## @file +# +# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D CpuConfigDxe + MODULE_UNI_FILE =3D CpuConfigDxe.uni + FILE_GUID =3D A20D8E6E-EE6C-43C5-809F-19BB930653AE + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D CpuConfigDxeEntryPoint + +[Sources.common] + CpuConfigDxe.c + CpuConfigDxe.h + NVDataStruc.h + Vfr.vfr + VfrStrings.uni + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec + Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec + +[LibraryClasses] + ArmLib + BaseLib + DebugLib + DevicePathLib + HiiLib + HobLib + IoLib + MemoryAllocationLib + NVParamLib + PcdLib + PrintLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + UefiRuntimeServicesTableLib + +[Protocols] + gEfiHiiConfigRoutingProtocolGuid ## CONSUMES + gEfiHiiConfigAccessProtocolGuid ## PRODUCES + gEfiDevicePathProtocolGuid ## PRODUCES + +[Guids] + gCpuConfigFormSetGuid + gPlatformManagerFormsetGuid + +[Depex] + TRUE diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDx= e.h b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.h new file mode 100644 index 000000000000..930fbea6f9d7 --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.h @@ -0,0 +1,74 @@ +/** @file + + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CPU_CONFIG_H_ +#define CPU_CONFIG_H_ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "NVDataStruc.h" + +// +// This is the generated IFR binary data for each formset defined in VFR. +// +extern UINT8 VfrBin[]; + +// +// This is the generated String package data for all .UNI files. +// +extern UINT8 CpuConfigDxeStrings[]; + +#define CPU_CONFIG_PRIVATE_SIGNATURE SIGNATURE_32 ('C', 'P', 'U', '_') + +typedef struct { + UINTN Signature; + + EFI_HANDLE DriverHandle; + EFI_HII_HANDLE HiiHandle; + CPU_VARSTORE_DATA Configuration; + + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; + + EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess; +} CPU_CONFIG_PRIVATE_DATA; + +#define CPU_CONFIG_PRIVATE_FROM_THIS(a) CR (a, CPU_CONFIG_PRIVATE_DATA, C= onfigAccess, CPU_CONFIG_PRIVATE_SIGNATURE) + +#pragma pack(1) + +/// +/// HII specific Vendor Device Path definition. +/// +typedef struct { + VENDOR_DEVICE_PATH VendorDevicePath; + EFI_DEVICE_PATH_PROTOCOL End; +} HII_VENDOR_DEVICE_PATH; + +#pragma pack() + +#endif /* CPU_CONFIG_H_ */ diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/NVDataStruc= .h b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/NVDataStruc.h new file mode 100644 index 000000000000..d906a395c04c --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/NVDataStruc.h @@ -0,0 +1,19 @@ +/** @file + + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CPU_NV_DATA_STRUC_H_ +#define CPU_NV_DATA_STRUC_H_ + +#pragma pack(1) +typedef struct { + UINT32 CpuSubNumaMode; +} CPU_VARSTORE_DATA; + +#pragma pack() + +#endif /* CPU_NV_DATA_STRUC_H_ */ diff --git a/Silicon/Ampere/AmpereAltraPkg/Include/Guid/CpuConfigHii.h b/Si= licon/Ampere/AmpereAltraPkg/Include/Guid/CpuConfigHii.h new file mode 100644 index 000000000000..71c8492f76a1 --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Include/Guid/CpuConfigHii.h @@ -0,0 +1,19 @@ +/** @file + + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CPU_CONFIG_HII_H_ +#define CPU_CONFIG_HII_H_ + +#define CPU_CONFIGURATION_FORMSET_GUID \ + { \ + 0x43FAA144, 0xA2DF, 0x4050, { 0xA7, 0xFD, 0xEE, 0x17, 0xC9, 0xB8, 0x88= , 0x8E } \ + } + +extern EFI_GUID gCpuConfigFormSetGuid; + +#endif /* CPU_CONFIG_HII_H_ */ diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/Vfr.vfr b/S= ilicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/Vfr.vfr new file mode 100644 index 000000000000..b085d030bbc5 --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/Vfr.vfr @@ -0,0 +1,43 @@ +/** @file + + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include "NVDataStruc.h" + +#define SUBNUMA_MODE_FORM_ID 1 + +formset + guid =3D CPU_CONFIGURATION_FORMSET_GUID, + title =3D STRING_TOKEN(STR_CPU_FORM), + help =3D STRING_TOKEN(STR_CPU_FORM_HELP), + classguid =3D gPlatformManagerFormsetGuid, + + varstore CPU_VARSTORE_DATA, + name =3D CpuConfigNVData, + guid =3D CPU_CONFIGURATION_FORMSET_GUID; + + form + formid =3D SUBNUMA_MODE_FORM_ID, + title =3D STRING_TOKEN(STR_CPU_FORM); + subtitle text =3D STRING_TOKEN(STR_CPU_FORM_HELP); + + oneof + varid =3D CpuConfigNVData.CpuSubNumaMode, + prompt =3D STRING_TOKEN(STR_CPU_SUBNUMA_MODE_PROMPT), + help =3D STRING_TOKEN(STR_CPU_SUBNUMA_MODE_HELP), + flags =3D RESET_REQUIRED, + option text =3D STRING_TOKEN(STR_CPU_SUBNUMA_MODE_MONOLITHIC), value= =3D 0x0, flags =3D DEFAULT; + option text =3D STRING_TOKEN(STR_CPU_SUBNUMA_MODE_HEMISPHERE), value= =3D 0x1, flags =3D 0; + option text =3D STRING_TOKEN(STR_CPU_SUBNUMA_MODE_QUADRANT), value = =3D 0x2, flags =3D 0; + endoneof; + + endform; + +endformset; diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDx= e.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c new file mode 100644 index 000000000000..da0deb74c156 --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c @@ -0,0 +1,508 @@ +/** @file + + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "CpuConfigDxe.h" + +// +// Default settings definitions +// +#define NV_SI_SUBNUMA_MODE_DEFAULT 0x00 /* Monolithic mode */ +#define WA_ERRATUM_1542419_DEFAULT 0x00 /* Disable I-Cache coherency */ +#define NEAR_ATOMIC_DISABLE_DEFAULT 0x00 /* Enable Near Atomic */ +#define CPU_SLC_REPLACE_POLICY 0x00 /* eLRU */ + +CHAR16 CpuVarstoreDataName[] =3D L"CpuConfigNVData"; + +EFI_HANDLE mDriverHandle =3D NULL; +CPU_CONFIG_PRIVATE_DATA *mPrivateData =3D NULL; + +HII_VENDOR_DEVICE_PATH mCpuConfigHiiVendorDevicePath =3D { + { + { + HARDWARE_DEVICE_PATH, + HW_VENDOR_DP, + { + (UINT8)(sizeof (VENDOR_DEVICE_PATH)), + (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8) + } + }, + CPU_CONFIGURATION_FORMSET_GUID + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + (UINT8)(END_DEVICE_PATH_LENGTH), + (UINT8)((END_DEVICE_PATH_LENGTH) >> 8) + } + } +}; + +STATIC +EFI_STATUS +CpuNvParamGet ( + OUT CPU_VARSTORE_DATA *Configuration + ) +{ + EFI_STATUS Status; + UINT32 Value; + + ASSERT (Configuration !=3D NULL); + + Status =3D NVParamGet ( + NV_SI_SUBNUMA_MODE, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + &Value + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a %d Fail to write NVParam \n", __FUNCTION__, _= _LINE__)); + Configuration->CpuSubNumaMode =3D SUBNUMA_MODE_MONOLITHIC; + } else { + Configuration->CpuSubNumaMode =3D Value; + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +CpuNvParamSet ( + IN CPU_VARSTORE_DATA *Configuration + ) +{ + EFI_STATUS Status; + UINT32 Value; + + ASSERT (Configuration !=3D NULL); + + Status =3D NVParamGet ( + NV_SI_SUBNUMA_MODE, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + &Value + ); + ASSERT_EFI_ERROR (Status); + + if (EFI_ERROR (Status) || Value !=3D Configuration->CpuSubNumaMode) { + Status =3D NVParamSet ( + NV_SI_SUBNUMA_MODE, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + NV_PERM_BIOS | NV_PERM_MANU, + Configuration->CpuSubNumaMode + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a %d Fail to access NVParam \n", __FUNCTION__= , __LINE__)); + ASSERT_EFI_ERROR (Status); + return Status; + } + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +SetupDefaultSettings ( + VOID + ) +{ + EFI_STATUS Status; + UINT32 Value; + + // + // Subnuma Mode + // + Status =3D NVParamGet ( + NV_SI_SUBNUMA_MODE, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + &Value + ); + if (EFI_ERROR (Status)) { + Status =3D NVParamSet ( + NV_SI_SUBNUMA_MODE, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + NV_PERM_BIOS | NV_PERM_MANU, + NV_SI_SUBNUMA_MODE_DEFAULT + ); + if (EFI_ERROR (Status)) { + return Status; + } + } + + // + // ARM ERRATA 1542419 workaround + // + Status =3D NVParamSet ( + NV_SI_ERRATUM_1542419_WA, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + NV_PERM_BIOS | NV_PERM_MANU, + WA_ERRATUM_1542419_DEFAULT + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Near atomic + // + Status =3D NVParamSet ( + NV_SI_NEAR_ATOMIC_DISABLE, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + NV_PERM_BIOS | NV_PERM_MANU, + NEAR_ATOMIC_DISABLE_DEFAULT + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // SLC Replacement Policy + // + Status =3D NVParamSet ( + NV_SI_HNF_AUX_CTL_32_63, + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, + NV_PERM_BIOS | NV_PERM_MANU, + CPU_SLC_REPLACE_POLICY + ); + if (EFI_ERROR (Status)) { + return Status; + } + + return EFI_SUCCESS; +} + +/** + This function allows a caller to extract the current configuration for o= ne + or more named elements from the target driver. + + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTO= COL. + @param Request A null-terminated Unicode string in + format. + @param Progress On return, points to a character in the R= equest + string. Points to the string's null termi= nator if + request was successful. Points to the mos= t recent + '&' before the first failing name/value p= air (or + the beginning of the string if the failur= e is in + the first name/value pair) if the request= was not + successful. + @param Results A null-terminated Unicode string in + format which has all valu= es filled + in for the names in the Request string. S= tring to + be allocated by the called function. + + @retval EFI_SUCCESS The Results is filled with the requested = values. + @retval EFI_OUT_OF_RESOURCES Not enough memory to store the results. + @retval EFI_INVALID_PARAMETER Request is illegal syntax, or unknown nam= e. + @retval EFI_NOT_FOUND Routing data doesn't match any storage in= this + driver. + +**/ +EFI_STATUS +EFIAPI +CpuConfigExtractConfig ( + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, + IN CONST EFI_STRING Request, + OUT EFI_STRING *Progress, + OUT EFI_STRING *Results + ) +{ + EFI_STATUS Status; + UINTN BufferSize; + CPU_CONFIG_PRIVATE_DATA *PrivateData; + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; + EFI_STRING ConfigRequest; + EFI_STRING ConfigRequestHdr; + UINTN Size; + BOOLEAN AllocatedRequest; + + if (Progress =3D=3D NULL || Results =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + // + // Initialize the local variables. + // + ConfigRequestHdr =3D NULL; + ConfigRequest =3D NULL; + Size =3D 0; + *Progress =3D Request; + AllocatedRequest =3D FALSE; + + if ((Request !=3D NULL) && !HiiIsConfigHdrMatch (Request, &gCpuConfigFor= mSetGuid, CpuVarstoreDataName)) { + return EFI_NOT_FOUND; + } + + PrivateData =3D CPU_CONFIG_PRIVATE_FROM_THIS (This); + HiiConfigRouting =3D PrivateData->HiiConfigRouting; + + // + // Get current setting from NVParam. + // + Status =3D CpuNvParamGet (&PrivateData->Configuration); + if (EFI_ERROR (Status)) { + return Status; + } + // + // Convert buffer data to by helper function BlockToConfig(= ) + // + BufferSize =3D sizeof (CPU_VARSTORE_DATA); + ConfigRequest =3D Request; + if ((Request =3D=3D NULL) || (StrStr (Request, L"OFFSET") =3D=3D NULL)) = { + // + // Request has no request element, construct full request string. + // Allocate and fill a buffer large enough to hold the tem= plate + // followed by "&OFFSET=3D0&WIDTH=3DWWWWWWWWWWWWWWWW" followed by a Nu= ll-terminator + // + ConfigRequestHdr =3D HiiConstructConfigHdr (&gCpuConfigFormSetGuid, Cp= uVarstoreDataName, PrivateData->DriverHandle); + Size =3D (StrLen (ConfigRequestHdr) + 32 + 1) * sizeof (CHAR16); + ConfigRequest =3D AllocateZeroPool (Size); + ASSERT (ConfigRequest !=3D NULL); + if (ConfigRequest =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + AllocatedRequest =3D TRUE; + UnicodeSPrint (ConfigRequest, Size, L"%s&OFFSET=3D0&WIDTH=3D%016LX", C= onfigRequestHdr, (UINT64)BufferSize); + FreePool (ConfigRequestHdr); + } + + // + // Convert buffer data to by helper function BlockToConfig(= ) + // + Status =3D HiiConfigRouting->BlockToConfig ( + HiiConfigRouting, + ConfigRequest, + (UINT8 *)&PrivateData->Configuration, + BufferSize, + Results, + Progress + ); + + // + // Free the allocated config request string. + // + if (AllocatedRequest) { + FreePool (ConfigRequest); + ConfigRequest =3D NULL; + } + + // + // Set Progress string to the original request string. + // + if (Request =3D=3D NULL) { + *Progress =3D NULL; + } else if (StrStr (Request, L"OFFSET") =3D=3D NULL) { + *Progress =3D Request + StrLen (Request); + } + + return Status; +} + +/** + This function processes the results of changes in configuration. + + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTO= COL. + @param Configuration A null-terminated Unicode string in + format. + @param Progress A pointer to a string filled in with the = offset of + the most recent '&' before the first fail= ing + name/value pair (or the beginning of the = string if + the failure is in the first name/value pa= ir) or + the terminating NULL if all was successfu= l. + + @retval EFI_SUCCESS The Results is processed successfully. + @retval EFI_INVALID_PARAMETER Configuration is NULL. + @retval EFI_NOT_FOUND Routing data doesn't match any storage in= this + driver. + +**/ +EFI_STATUS +EFIAPI +CpuConfigRouteConfig ( + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, + IN CONST EFI_STRING Configuration, + OUT EFI_STRING *Progress + ) +{ + EFI_STATUS Status; + UINTN BufferSize; + CPU_CONFIG_PRIVATE_DATA *PrivateData; + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; + + if (Configuration =3D=3D NULL || Progress =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + PrivateData =3D CPU_CONFIG_PRIVATE_FROM_THIS (This); + HiiConfigRouting =3D PrivateData->HiiConfigRouting; + *Progress =3D Configuration; + + // + // Check routing data in . + // Note: if only one Storage is used, then this checking could be skippe= d. + // + if (!HiiIsConfigHdrMatch (Configuration, &gCpuConfigFormSetGuid, CpuVars= toreDataName)) { + return EFI_NOT_FOUND; + } + + // + // Get configuration data from NVParam + // + Status =3D CpuNvParamGet (&PrivateData->Configuration); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Convert to buffer data by helper function ConfigToBlock(= ) + // + BufferSize =3D sizeof (CPU_VARSTORE_DATA); + Status =3D HiiConfigRouting->ConfigToBlock ( + HiiConfigRouting, + Configuration, + (UINT8 *)&PrivateData->Configuration, + &BufferSize, + Progress + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Store configuration data back to NVParam + // + Status =3D CpuNvParamSet (&PrivateData->Configuration); + if (EFI_ERROR (Status)) { + return Status; + } + + return Status; +} + +/** + This function processes the results of changes in configuration. + + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTO= COL. + @param Action Specifies the type of action taken by the= browser. + @param QuestionId A unique value which is sent to the origi= nal + exporting driver so that it can identify = the type + of data to expect. + @param Type The type of value for the question. + @param Value A pointer to the data being sent to the o= riginal + exporting driver. + @param ActionRequest On return, points to the action requested= by the + callback function. + + @retval EFI_SUCCESS The callback successfully handled the act= ion. + @retval EFI_INVALID_PARAMETER The setup browser call this function with= invalid parameters. + +**/ +EFI_STATUS +EFIAPI +CpuConfigCallback ( + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, + IN EFI_BROWSER_ACTION Action, + IN EFI_QUESTION_ID QuestionId, + IN UINT8 Type, + IN EFI_IFR_TYPE_VALUE *Value, + OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest + ) +{ + if (Action !=3D EFI_BROWSER_ACTION_CHANGING) { + // + // Do nothing for other UEFI Action. Only do call back when data is ch= anged. + // + return EFI_UNSUPPORTED; + } + if (((Value =3D=3D NULL) && (Action !=3D EFI_BROWSER_ACTION_FORM_OPEN) &= & (Action !=3D EFI_BROWSER_ACTION_FORM_CLOSE))|| + (ActionRequest =3D=3D NULL)) + { + return EFI_INVALID_PARAMETER; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +CpuConfigDxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HII_HANDLE HiiHandle; + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; + + // + // Initialize driver private data + // + mPrivateData =3D AllocateZeroPool (sizeof (CPU_CONFIG_PRIVATE_DATA)); + if (mPrivateData =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + mPrivateData->Signature =3D CPU_CONFIG_PRIVATE_SIGNATURE; + + mPrivateData->ConfigAccess.ExtractConfig =3D CpuConfigExtractConfig; + mPrivateData->ConfigAccess.RouteConfig =3D CpuConfigRouteConfig; + mPrivateData->ConfigAccess.Callback =3D CpuConfigCallback; + + // + // Locate ConfigRouting protocol + // + Status =3D gBS->LocateProtocol (&gEfiHiiConfigRoutingProtocolGuid, NULL,= (VOID **)&HiiConfigRouting); + if (EFI_ERROR (Status)) { + return Status; + } + mPrivateData->HiiConfigRouting =3D HiiConfigRouting; + + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &mDriverHandle, + &gEfiDevicePathProtocolGuid, + &mCpuConfigHiiVendorDevicePath, + &gEfiHiiConfigAccessProtocolGuid, + &mPrivateData->ConfigAccess, + NULL + ); + ASSERT_EFI_ERROR (Status); + + mPrivateData->DriverHandle =3D mDriverHandle; + + // + // Publish our HII data + // + HiiHandle =3D HiiAddPackages ( + &gCpuConfigFormSetGuid, + mDriverHandle, + CpuConfigDxeStrings, + VfrBin, + NULL + ); + if (HiiHandle =3D=3D NULL) { + gBS->UninstallMultipleProtocolInterfaces ( + mDriverHandle, + &gEfiDevicePathProtocolGuid, + &mCpuConfigHiiVendorDevicePath, + &gEfiHiiConfigAccessProtocolGuid, + &mPrivateData->ConfigAccess, + NULL + ); + return EFI_OUT_OF_RESOURCES; + } + + mPrivateData->HiiHandle =3D HiiHandle; + + // + // With the fresh system, the NVParam value is invalid (0xFFFFFFFF). + // It causes reading from the NVParam is failed. + // So, the NVParam should be setting with default values if any params i= s invalid. + // + Status =3D SetupDefaultSettings (); + if (EFI_ERROR (Status)) { + return Status; + } + + return EFI_SUCCESS; +} diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/VfrStrings.= uni b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/VfrStrings.uni new file mode 100644 index 000000000000..70c01f65e4b6 --- /dev/null +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/VfrStrings.uni @@ -0,0 +1,17 @@ +// +// Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. +// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// + +#langdef en-US "English" + +#string STR_CPU_FORM #language en-US "CPU C= onfiguration" +#string STR_CPU_FORM_HELP #language en-US "CPU C= onfiguration" +#string STR_CPU_FORM_SEPERATE_LINE #language en-US "" + +#string STR_CPU_SUBNUMA_MODE_PROMPT #language en-US "ANC m= ode" +#string STR_CPU_SUBNUMA_MODE_HELP #language en-US "Provi= des 3 modes: Monolithic, Hemisphere, Quadrant. System with Monolithic mode = has single NUMA partition per socket. System with Hemisphere has 2 NUMA par= titions per socket. System with Quandrant has 4 NUMA partitions per socket" +#string STR_CPU_SUBNUMA_MODE_MONOLITHIC #language en-US "Monol= ithic" +#string STR_CPU_SUBNUMA_MODE_HEMISPHERE #language en-US "Hemis= phere" +#string STR_CPU_SUBNUMA_MODE_QUADRANT #language en-US "Quadr= ant" --=20 2.17.1