From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f196.google.com (mail-pl1-f196.google.com [209.85.214.196]) by mx.groups.io with SMTP id smtpd.web08.58282.1622555460145372742 for ; Tue, 01 Jun 2021 06:51:00 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@puresoftware.com header.s=google header.b=BK27JtlZ; spf=pass (domain: puresoftware.com, ip: 209.85.214.196, mailfrom: vikas.singh@puresoftware.com) Received: by mail-pl1-f196.google.com with SMTP id e1so2636270pld.13 for ; Tue, 01 Jun 2021 06:51:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=puresoftware.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JX+wH36GStW9WNG64ebjh6bvK3t1CQgwKx3MV12Nuj8=; b=BK27JtlZf7VUDhGidzdAH2jvuzlgrp4MfuVssex/1NFr3wvckUyHOve0PemvhrLeAU 0TjdOfv+0koUCkWKhWheL7NRz/Myp6X2KBS8yS3q/Y/HqbchVGAVra/0DDYba4lEj84e fGOd7qv+OoP5AXRZe1L5C+Hft0AmC9ViFOA10= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JX+wH36GStW9WNG64ebjh6bvK3t1CQgwKx3MV12Nuj8=; b=j5bICHe2O54FiKKbkZ/FZ8HDZ6fP/yJJWWR+7vABadHuOthqAW8N+sMMzt4z3D/CrW X2JozcCTfWLqHi0PPVR9+AbpzkmcjBabJUiHgNtfwIKolC/kRKisbz6MBDFDbZPxoav/ f1f490QwigG81M8BHTV1lD7g/ERBzDXcMN0JYtZtCuuNY97qlHPg8heckFpDGk9nD+Xw 5II0PxCkMlAjmaXo/ePDrMUggd4LumVTu04+Q5VI42/14Diyjyxv6eZIW8owAv3cD9Jq ncKKMdTYpaa1yVc0ckI/rrQLr/QssSlL6bT2O7nis2the09KJjljsWTBizofM3TFCist lTcA== X-Gm-Message-State: AOAM530gH6jbQ/tp6Vp7Kp1YksOG1BwqCX1Uvdzb/Wcwpy+hd7Mg6ZCc 1yE6+yiV+babqU+/YC1g6HfrZv/DrQtxCd0vC1A= X-Google-Smtp-Source: ABdhPJwka42GckKD8+F00PC9KbpPa+5hHhKkTLYA8feDZxzRMm9asTLkVHi5GmEjHVpNRS7LPCUBaQ== X-Received: by 2002:a17:90b:1094:: with SMTP id gj20mr15966841pjb.45.1622555459464; Tue, 01 Jun 2021 06:50:59 -0700 (PDT) Return-Path: Received: from embedded-PC.puresoft.int ([125.63.92.170]) by smtp.gmail.com with ESMTPSA id d22sm14504798pgb.15.2021.06.01.06.50.55 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Jun 2021 06:50:59 -0700 (PDT) From: "Vikas Singh" To: devel@edk2.groups.io Cc: sami.mujawar@arm.com, leif@nuviainc.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: [PATCH V0 3/4] Platform/NXP/LS1046aFrwyPkg: Extend Dynamic ACPI support Date: Tue, 1 Jun 2021 19:20:33 +0530 Message-Id: <20210601135034.22386-4-vikas.singh@puresoftware.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210601135034.22386-1-vikas.singh@puresoftware.com> References: <20210601135034.22386-1-vikas.singh@puresoftware.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable This patch set extends Configuration Manager (CM) and its services to leverage the Dynamic ACPI support for NXP's LS1046aFrwy platform. Refer-https://edk2.groups.io/g/devel/message/71710 Signed-off-by: Vikas Singh --- .../NXP/LS1046aFrwyPkg/Include/Platform.h | 155 ++++++++++++++++++ .../NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 28 ++++ .../NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf | 13 ++ Silicon/NXP/LS1046A/LS1046A.dsc.inc | 10 ++ 4 files changed, 206 insertions(+) create mode 100644 Platform/NXP/LS1046aFrwyPkg/Include/Platform.h diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/= LS1046aFrwyPkg/Include/Platform.h new file mode 100644 index 0000000000..19e879ec6d --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h @@ -0,0 +1,155 @@ +/** @file=0D + * Platform headers=0D + *=0D + * Copyright 2021 NXP=0D + * Copyright 2021 Puresoftware Ltd=0D + *=0D + * SPDX-License-Identifier: BSD-2-Clause-Patent=0D + *=0D +**/=0D +=0D +=0D +#ifndef LS1046AFRWY_PLATFORM_H=0D +#define LS1046AFRWY_PLATFORM_H=0D +=0D +#define EFI_ACPI_ARM_OEM_REVISION 0x00000000=0D +=0D +// Soc defines=0D +#define PLAT_SOC_NAME "LS1046AFRWY"=0D +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFE)=0D +#define SVR_MAJOR(svr) (((svr) >> 4) & 0xf)=0D +#define SVR_MINOR(svr) (((svr) >> 0) & 0xf)=0D +=0D +// Gic=0D +#define GIC_VERSION 2=0D +#define GICD_BASE 0x1410000=0D +#define GICC_BASE 0x142f000=0D +#define GICH_BASE 0x1440000=0D +#define GICV_BASE 0x1460000=0D +=0D +// UART=0D +#define UART0_BASE 0x21C0500=0D +#define UART0_IT 86=0D +#define UART0_LENGTH 0x100=0D +#define SPCR_FLOW_CONTROL_NONE 0=0D +=0D +// Timer=0D +#define TIMER_BLOCK_COUNT 1=0D +#define TIMER_FRAME_COUNT 4=0D +#define TIMER_WATCHDOG_COUNT 1=0D +#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase=0D +#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase=0D +#define TIMER_SEC_IT 29=0D +#define TIMER_NON_SEC_IT 30=0D +#define TIMER_VIRT_IT 27=0D +#define TIMER_HYP_IT 26=0D +#define TIMER_FRAME0_IT 78=0D +#define TIMER_FRAME1_IT 79=0D +#define TIMER_FRAME2_IT 92=0D +=0D +// Mcfg=0D +#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000=0D +#define LS1046A_PCI_SEG0 0x0=0D +#define LS1046A_PCI_SEG_BUSNUM_MIN 0x0=0D +#define LS1046A_PCI_SEG_BUSNUM_MAX 0xff=0D +#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000=0D +#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000=0D +#define LS1046A_PCI_SEG1 0x1=0D +#define LS1046A_PCI_SEG2 0x2=0D +=0D +// Platform specific info needed by Configuration Manager=0D +=0D +#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ',' ')=0D +=0D +// Specify the OEM defined tables=0D +#define OEM_ACPI_TABLES 0=0D +=0D +#define PLAT_PCI_SEG0 LS1046A_PCI_SEG0=0D +#define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE=0D +#define PLAT_PCI_SEG1 LS1046A_PCI_SEG1=0D +#define PLAT_PCI_SEG_BUSNUM_MIN LS1046A_PCI_SEG_BUSNUM_MIN=0D +#define PLAT_PCI_SEG_BUSNUM_MAX LS1046A_PCI_SEG_BUSNUM_MAX=0D +#define PLAT_PCI_SEG2_CONFIG_BASE LS1046A_PCI_SEG2_CONFIG_BASE=0D +#define PLAT_PCI_SEG2 LS1046A_PCI_SEG2=0D +=0D +#define PLAT_GIC_VERSION GIC_VERSION=0D +#define PLAT_GICD_BASE GICD_BASE=0D +#define PLAT_GICI_BASE GICI_BASE=0D +#define PLAT_GICR_BASE GICR_BASE=0D +#define PLAT_GICR_LEN GICR_LEN=0D +#define PLAT_GICC_BASE GICC_BASE=0D +#define PLAT_GICH_BASE GICH_BASE=0D +#define PLAT_GICV_BASE GICV_BASE=0D +=0D +#define PLAT_CPU_COUNT 4=0D +#define PLAT_GTBLOCK_COUNT 0=0D +#define PLAT_GTFRAME_COUNT 0=0D +#define PLAT_PCI_CONFG_COUNT 2=0D +=0D +#define PLAT_WATCHDOG_COUNT 0=0D +#define PLAT_GIC_REDISTRIBUTOR_COUNT 0=0D +#define PLAT_GIC_ITS_COUNT 0=0D +=0D +/* GIC CPU Interface information=0D + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency= )=0D + */=0D +#define PLAT_GIC_CPU_INTERFACE { \=0D + GICC_ENTRY (0, GET_MPID (0, 0), 138, 0x19, 0), \=0D + GICC_ENTRY (1, GET_MPID (0, 1), 139, 0x19, 0), \=0D + GICC_ENTRY (2, GET_MPID (0, 2), 127, 0x19, 0), \=0D + GICC_ENTRY (3, GET_MPID (0, 3), 129, 0x19, 0), \=0D +}=0D +=0D +#define PLAT_WATCHDOG_INFO \=0D + { \=0D + } \=0D +=0D +#define PLAT_TIMER_BLOCK_INFO \=0D + { \=0D + } \=0D +=0D +#define PLAT_TIMER_FRAME_INFO \=0D + { \=0D + } \=0D +=0D +#define PLAT_GIC_DISTRIBUTOR_INFO \=0D + { \=0D + PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \=0D + 0, /* UINT32 SystemVectorBase */ \=0D + PLAT_GIC_VERSION /* UINT8 GicVersion */ \=0D + } \=0D +=0D +#define PLAT_GIC_REDISTRIBUTOR_INFO \=0D + { \=0D + } \=0D +=0D +#define PLAT_GIC_ITS_INFO \=0D + { \=0D + } \=0D +=0D +#define PLAT_MCFG_INFO \=0D + { \=0D + { \=0D + PLAT_PCI_SEG1_CONFIG_BASE, \=0D + PLAT_PCI_SEG1, \=0D + PLAT_PCI_SEG_BUSNUM_MIN, \=0D + PLAT_PCI_SEG_BUSNUM_MAX, \=0D + }, \=0D + { \=0D + PLAT_PCI_SEG2_CONFIG_BASE, \=0D + PLAT_PCI_SEG2, \=0D + PLAT_PCI_SEG_BUSNUM_MIN, \=0D + PLAT_PCI_SEG_BUSNUM_MAX, \=0D + } \=0D + } \=0D +=0D +#define PLAT_SPCR_INFO = \=0D + { = \=0D + UART0_BASE, = \=0D + UART0_IT, = \=0D + 115200, = \=0D + 0, = \=0D + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 = \=0D + } = \=0D +=0D +#endif // LS1046AFRWY_PLATFORM_H=0D diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.dsc index 67cf15cbe4..20111e6037 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc @@ -3,6 +3,7 @@ # LS1046AFRWY Board package.=0D #=0D # Copyright 2019-2020 NXP=0D +# Copyright 2021 Puresoftware Ltd=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -22,10 +23,18 @@ OUTPUT_DIRECTORY =3D Build/LS1046aFrwyPkg=0D FLASH_DEFINITION =3D Platform/NXP/LS1046aFrwyPkg/LS1046aFr= wyPkg.fdf=0D =0D + # This flag controls the dynamic acpi generation=0D + #=0D + DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE=0D +=0D !include Silicon/NXP/NxpQoriqLs.dsc.inc=0D !include MdePkg/MdeLibs.dsc.inc=0D !include Silicon/NXP/LS1046A/LS1046A.dsc.inc=0D =0D +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D + !include DynamicTablesPkg/DynamicTables.dsc.inc=0D +!endif=0D +=0D [LibraryClasses.common]=0D ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPla= tformLib.inf=0D RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualReal= TimeClockLib.inf=0D @@ -46,4 +55,23 @@ =0D Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf=0D =0D + #=0D + # Dynamic Table Factory=0D + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D + DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe= .inf {=0D + =0D + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibA= rm.inf=0D + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibA= rm.inf=0D + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibA= rm.inf=0D + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibA= rm.inf=0D + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibA= rm.inf=0D + }=0D + !endif=0D +=0D + #=0D + # Acpi Support=0D + #=0D + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf=0D + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf=0D +=0D ##=0D diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.fdf index 34c4e5a025..f3cac033bc 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf @@ -3,6 +3,7 @@ # FLASH layout file for LS1046a board.=0D #=0D # Copyright 2019-2020 NXP=0D +# Copyright 2021 Puresoftware Ltd=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -99,6 +100,18 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/Metronome/Metronome.inf=0D INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf=0D =0D +=0D + #=0D + # Acpi Support=0D + #=0D + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf=0D + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf=0D +=0D + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D + INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Confi= gurationManagerDxe.inf=0D + !include DynamicTablesPkg/DynamicTables.fdf.inc=0D + !endif=0D +=0D #=0D # Multiple Console IO support=0D #=0D diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS10= 46A.dsc.inc index 7004533ed5..98f999edfd 100644 --- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc +++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc @@ -2,6 +2,7 @@ # LS1046A Soc package.=0D #=0D # Copyright 2017-2020 NXP=0D +# Copyright 2021 Puresoftware Ltd=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -48,4 +49,13 @@ [Components.common]=0D MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf=0D =0D +#=0D +# Configuration Manager=0D +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE=0D + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configurati= onManagerDxe.inf {=0D + =0D + *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/= Include=0D + }=0D +!endif=0D +=0D ##=0D --=20 2.25.1