From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) by mx.groups.io with SMTP id smtpd.web12.8547.1622814228721077271 for ; Fri, 04 Jun 2021 06:43:49 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=OfZJNwb1; spf=pass (domain: nuviainc.com, ip: 209.85.221.44, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f44.google.com with SMTP id f2so9343062wri.11 for ; Fri, 04 Jun 2021 06:43:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=c077A+CK7J1RlkFv8i2BG4mrrGrh/8raBJQtV6sZyDU=; b=OfZJNwb15t7xOSeK/85Cw1UWGNnNjqsjYoGHQY67Xjufi9nTitUYWhYEawCH7B8OVQ +97HYeAi59XC/hnN/tF4tGgm2V+rvMk6W/CheHr220XZ1d8ThPNe4UDn4F4Y44T0tCsE TMcowgt8cQEyP6/aqPuVVAOIHGNuYQnbNtrWw5OCCB3fn2gJq6T7/6eSL9xfvhn6BTcs i4Wfp7+prfCgV3m2fhrbXlUQ1hYbTMmbDktcRs2bP8LNuhE6+CHlRw3ey03wPMr6mD9Y Ls9VStf0MH+ZP9htbsPRgGbUZnvyplQxertbBSK/KlRKG6dFgYZEtswju/q+NCM/Rsd0 2RTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=c077A+CK7J1RlkFv8i2BG4mrrGrh/8raBJQtV6sZyDU=; b=HJoxxehV3+na7sD5//7Nd+GpA2lRJWpSWIyT718PbY7McYltqoss82hZr6f5ZtSW5f h2zBWh6FR3PMmYjFuwD5Re13xfov6F84SUpzzMrDNEv5TQGzOJK8RTEdPkSprQIH8Vrv 7LMmkulBHUluQtUrO7sLRxx9uG/5CEhqxrPLyOJp22imFea5Iu+Kl0wN6NpjY+KQL/yx 6ng44STLb5B3ZqO86yVmE7G8Cn+7anNJHJu4AinvNZ0QiJnFbDgo24/530augfXoxe9w CQX795p9Vv1AxwdG3wNbUpRpAdPUuQpGZC4SWUJ1KxkJXPkP7rf56lo96FvzOMmwCCKd 3NZw== X-Gm-Message-State: AOAM532Jb43t7w7UjQ3zfBfZZLYQCLvgQXA4zzMnsCUXQDb2U3ClkNjH t0ju4hkaSX88xn6HOQRhx8XbqA== X-Google-Smtp-Source: ABdhPJyVhHIQnXyAiRMMMRD8kNK1YHwQRW4eQyyi4K4Jr9l5XFYE0TOEVH+ygK+NKrFp2l2Iw+j+zg== X-Received: by 2002:a5d:4b05:: with SMTP id v5mr4050630wrq.330.1622814227264; Fri, 04 Jun 2021 06:43:47 -0700 (PDT) Return-Path: Received: from leviathan (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id a3sm7148514wra.4.2021.06.04.06.43.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jun 2021 06:43:46 -0700 (PDT) Date: Fri, 4 Jun 2021 14:43:45 +0100 From: "Leif Lindholm" To: Vu Nguyen Cc: devel@edk2.groups.io, patches@amperecomputing.com, Ard Biesheuvel , Chuong Tran , Michael D Kinney , Nate DeSimone , Phong Vo , Thang Nguyen Subject: Re: [edk2-non-osi][PATCH v3 0/2] Introduce Silicon/Ampere and AmpereAltraBinPkg package Message-ID: <20210604134345.rog6ow3u3nwutpyq@leviathan> References: <20210526101830.16313-1-vunguyen@os.amperecomputing.com> MIME-Version: 1.0 In-Reply-To: <20210526101830.16313-1-vunguyen@os.amperecomputing.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Vu, For this set: Reviewed-by: Leif Lindholm Is there any value to you in me pushing this before the edk2-platforms set goes in? If not, I'll hold back and push them both at the same time. Best Regards, Leif On Wed, May 26, 2021 at 17:18:28 +0700, Vu Nguyen wrote: > Create edk2-non-osi component holder for Ampere Libraries. This patchset > also adds PciePhyLib which provides function to initialize PCIe PHY on > Ampere Altra processor. > > Commits in this patchset can be found at: > https://github.com/AmpereComputing/edk2-non-osi/tree/add-PciePhyLib > > Cc: Ard Biesheuvel > Cc: Chuong Tran > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Nate DeSimone > Cc: Phong Vo > Cc: Thang Nguyen > > Signed-off-by: Vu Nguyen > > Change since v2: > Remove unused macros and function prototypes from the header file. > Rename Ac01BinPkg.dec to AmpereAltraBinPkg.dec. > > Change since v1: > Remove PciePhyLib.lib binary from the commit. > Update header guard to align with coding standard. > > Vu Nguyen (2): > AmpereAltraBinPkg: Add PciePhyLib library and header > edk2-non-osi: Add AmpereAltraBinPkg maintainers > > Maintainers.txt | 4 + > Silicon/Ampere/License.txt | 25 ++++ > .../AmpereAltraBinPkg/AmpereAltraBinPkg.dec | 16 +++ > .../Library/PciePhyLib/PciePhyLib.inf | 23 ++++ > .../Include/Library/PciePhyLib.h | 111 ++++++++++++++++++ > 5 files changed, 179 insertions(+) > create mode 100644 Silicon/Ampere/License.txt > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/AmpereAltraBinPkg.dec > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h > > -- > 2.17.1 >