From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) by mx.groups.io with SMTP id smtpd.web09.5342.1623107339648555677 for ; Mon, 07 Jun 2021 16:09:00 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=B6biK+jp; spf=pass (domain: nuviainc.com, ip: 209.85.221.48, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f48.google.com with SMTP id r9so2698790wrz.10 for ; Mon, 07 Jun 2021 16:08:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=idGixSIHYebwx5UFP/SNRC3Leb5pLPLFk3bdXi042cA=; b=B6biK+jpelxg9fCplruZeYixtdVRLkL0JyMcF8I/13MSDpvlK/6UDFmMnvz1Ytkz3v gmBY7Z3QK2Rb1GbocKjp7X2NRT1+D+cQzTwuRja9YSPxKy010+n8UeYftxB4SLSFzqcl uOBxIr4o03yglUF8DzosRi7E9bcYwMd4Ox/WsqE55NCgP6HFJGhTlMIw10DDYeS/Smla kHzlxRj8jwRRAAXb2VQc5jenKAc2Z3Z5UxPw8Lqzky7rH6+V2MnddujXyryD0pJ8RvPN Smhpa4EHILgdULQE3JA29Am4fI7w+z3RwLQ8Mkk+7asGnU9vlQ9wqUC5RP4s1Rm4XLF5 4i3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=idGixSIHYebwx5UFP/SNRC3Leb5pLPLFk3bdXi042cA=; b=FoS08w4F1woMD/xHJK93FnCIAVxnxZRWfnQmnZb1Y+2an+035C0tMAKq1UID65qojR A40ZHRNYwxZzm2KZIEV1TCsoZI2cuDbBvEdHwuihqdu0t1L8Ei2DcoiE/DXGiCEY2hNB /2CcerL/wWdqtPPPfr9PpMNsJhGc9sxg7KwRjxLLRLCbQ+CJDMrlELeVgfdkXMoGPVxa xtyZDT+0htid5klhwBMIQTEWql0UleNDfRRClk0PP6MCIqouCbf3JtVmoAJ9oYqFrYax dVXi3T66c1a0i7nFt4ZM/kvhL+RhUjbF2tJ6VAZ9To5PjWUKCn1ICXMoUaQ7HHra8TRy 5jlg== X-Gm-Message-State: AOAM530NaqdDr+WHMo+7jZ1EBWLYCZxKmEZwnkdz5+BTeo2hTK7y6ibU R8bFVQdsU3jMqMcZJOewH+lLtA== X-Google-Smtp-Source: ABdhPJyMj4szHa3wlx2SNT7N2fcQY3lLkWgXeZt9FKCTlmpWHjWaXPfBuIaEFN8f5SS7SuRwd1tkJw== X-Received: by 2002:a5d:484b:: with SMTP id n11mr12607732wrs.34.1623107338052; Mon, 07 Jun 2021 16:08:58 -0700 (PDT) Return-Path: Received: from leviathan (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id g17sm12730204wrp.61.2021.06.07.16.08.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 16:08:57 -0700 (PDT) Date: Tue, 8 Jun 2021 00:08:55 +0100 From: "Leif Lindholm" To: Nhi Pham Cc: devel@edk2.groups.io, Vu Nguyen , Thang Nguyen , Chuong Tran , Phong Vo , Michael D Kinney , Ard Biesheuvel , Nate DeSimone Subject: Re: [edk2-platforms][PATCH v2 21/32] AmpereAltraPkg: Add DebugInfoPei module Message-ID: <20210607230855.lrucwc6ccxfsq7rk@leviathan> References: <20210526100724.5359-1-nhi@os.amperecomputing.com> <20210526100724.5359-23-nhi@os.amperecomputing.com> MIME-Version: 1.0 In-Reply-To: <20210526100724.5359-23-nhi@os.amperecomputing.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, May 26, 2021 at 17:07:13 +0700, Nhi Pham wrote: > From: Vu Nguyen > > Helps to show various system information like CPU info and Board Setting > values to UART console during boot process. > > Cc: Thang Nguyen > Cc: Chuong Tran > Cc: Phong Vo > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Ard Biesheuvel > Cc: Nate DeSimone > > Signed-off-by: Vu Nguyen > --- > Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 1 + > Platform/Ampere/JadePkg/Jade.fdf | 2 + > Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf | 41 ++++ > Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c | 230 ++++++++++++++++++++ > 4 files changed, 274 insertions(+) > > diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc > index 930bbb5d385b..2d380b21df24 100755 > --- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc > +++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc > @@ -534,6 +534,7 @@ [Components.common] > ArmPlatformPkg/PlatformPei/PlatformPeim.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/MemoryInitPeim/MemoryInitPeim.inf > + Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.inf > ArmPkg/Drivers/CpuPei/CpuPei.inf > diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf > index 3d5d857178b3..8c09e2a49089 100755 > --- a/Platform/Ampere/JadePkg/Jade.fdf > +++ b/Platform/Ampere/JadePkg/Jade.fdf > @@ -167,6 +167,8 @@ [FV.FVMAIN_COMPACT] > # > # Print platform information before passing control into the Driver Execution Environment (DXE) phase > # > + INF Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > + > INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > new file mode 100755 > index 000000000000..11414f72f369 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > @@ -0,0 +1,41 @@ > +## @file > +# > +# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001B > + BASE_NAME = DebugInfo > + FILE_GUID = C0571D26-6176-11E9-8647-D663BD873D93 > + MODULE_TYPE = PEIM > + VERSION_STRING = 1.0 > + ENTRY_POINT = DebugInfoPeiEntryPoint > + > +[Sources] > + DebugInfoPei.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec > + Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec > + > +[LibraryClasses] > + AmpereCpuLib > + ArmLib > + HobLib > + NVParamLib > + PeimEntryPoint > + PrintLib > + SerialPortLib > + > +[Guids] > + gPlatformHobGuid > + > +[Depex] > + TRUE > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c > new file mode 100644 > index 000000000000..d6775ffa4a79 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c > @@ -0,0 +1,230 @@ > +/** @file > + > + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define MAX_PRINT_LEN 512 > + > +#define GB_SCALE_FACTOR 1073741824 > +#define MB_SCALE_FACTOR 1048576 > +#define KB_SCALE_FACTOR 1024 > +#define MHZ_SCALE_FACTOR 1000000 > + > +STATIC VOID > +SerialPrint ( > + IN CONST CHAR8 *FormatString, > + ... > + ) > +{ > + CHAR8 Buf[MAX_PRINT_LEN]; > + VA_LIST Marker; > + UINTN NumberOfPrinted; > + > + VA_START (Marker, FormatString); > + NumberOfPrinted = AsciiVSPrint (Buf, sizeof (Buf), FormatString, Marker); > + SerialPortWrite ((UINT8 *)Buf, NumberOfPrinted); > + VA_END (Marker); > +} Why not use BaseDebugLibSerialPort? / Leif > + > +/** > + Print any existence NVRAM. > +**/ > +STATIC VOID > +PrintNVRAM ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + NVPARAM Idx; > + UINT32 Val; > + UINT16 ACLRd = NV_PERM_ALL; > + BOOLEAN Flag; > + > + Flag = FALSE; > + for (Idx = NV_PREBOOT_PARAM_START; Idx <= NV_PREBOOT_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + SerialPrint ("Pre-boot Configuration Setting:\n"); > + Flag = TRUE; > + } > + SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > + > + Flag = FALSE; > + for (Idx = NV_MANU_PARAM_START; Idx <= NV_MANU_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + SerialPrint ("Manufacturer Configuration Setting:\n"); > + Flag = TRUE; > + } > + SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > + > + Flag = FALSE; > + for (Idx = NV_USER_PARAM_START; Idx <= NV_USER_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + SerialPrint ("User Configuration Setting:\n"); > + Flag = TRUE; > + } > + SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > + > + Flag = FALSE; > + for (Idx = NV_BOARD_PARAM_START; Idx <= NV_BOARD_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + SerialPrint ("Board Configuration Setting:\n"); > + Flag = TRUE; > + } > + SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > +} > + > +STATIC > +CHAR8 * > +GetCCIXLinkSpeed ( > + IN UINTN Speed > + ) > +{ > + switch (Speed) { > + case 1: > + return "2.5 GT/s"; > + > + case 2: > + return "5 GT/s"; > + > + case 3: > + return "8 GT/s"; > + > + case 4: > + case 6: > + return "16 GT/s"; > + > + case 0xa: > + return "20 GT/s"; > + > + case 0xf: > + return "25 GT/s"; > + } > + > + return "Unknown"; > +} > + > +/** > + Print system info > +**/ > +STATIC VOID > +PrintSystemInfo ( > + VOID > + ) > +{ > + UINTN Idx; > + VOID *Hob; > + PLATFORM_INFO_HOB *PlatformHob; > + > + Hob = GetFirstGuidHob (&gPlatformHobGuid); > + if (Hob == NULL) { > + return; > + } > + > + PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob); > + > + SerialPrint ("SCP FW version : %a\n", (const CHAR8 *)PlatformHob->SmPmProVer); > + SerialPrint ("SCP FW build date : %a\n", (const CHAR8 *)PlatformHob->SmPmProBuild); > + > + SerialPrint ("Failsafe status : %d\n", PlatformHob->FailSafeStatus); > + SerialPrint ("Reset status : %d\n", PlatformHob->ResetStatus); > + SerialPrint ("CPU info\n"); > + SerialPrint (" CPU ID : %X\n", ArmReadMidr ()); > + SerialPrint (" CPU Clock : %d MHz\n", PlatformHob->CpuClk / MHZ_SCALE_FACTOR); > + SerialPrint (" Number of active sockets : %d\n", GetNumberOfActiveSockets ()); > + SerialPrint (" Number of active cores : %d\n", GetNumberOfActiveCores ()); > + if (IsSlaveSocketActive ()) { > + SerialPrint ( > + " Inter Socket Connection 0 : Width: x%d / Speed %a\n", > + PlatformHob->Link2PWidth[0], > + GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[0]) > + ); > + SerialPrint ( > + " Inter Socket Connection 1 : Width: x%d / Speed %a\n", > + PlatformHob->Link2PWidth[1], > + GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[1]) > + ); > + } > + for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) { > + SerialPrint (" Socket[%d]: Core voltage : %d\n", Idx, PlatformHob->CoreVoltage[Idx]); > + SerialPrint (" Socket[%d]: SCU ProductID : %X\n", Idx, PlatformHob->ScuProductId[Idx]); > + SerialPrint (" Socket[%d]: Max cores : %d\n", Idx, PlatformHob->MaxNumOfCore[Idx]); > + SerialPrint (" Socket[%d]: Warranty : %d\n", Idx, PlatformHob->Warranty[Idx]); > + SerialPrint (" Socket[%d]: Subnuma : %d\n", Idx, PlatformHob->SubNumaMode[Idx]); > + SerialPrint (" Socket[%d]: RC disable mask : %X\n", Idx, PlatformHob->RcDisableMask[Idx]); > + SerialPrint (" Socket[%d]: AVS enabled : %d\n", Idx, PlatformHob->AvsEnable[Idx]); > + SerialPrint (" Socket[%d]: AVS voltage : %d\n", Idx, PlatformHob->AvsVoltageMV[Idx]); > + } > + > + SerialPrint ("SOC info\n"); > + SerialPrint (" DDR Frequency : %d MHz\n", PlatformHob->DramInfo.MaxSpeed); > + for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) { > + SerialPrint (" Socket[%d]: Soc voltage : %d\n", Idx, PlatformHob->SocVoltage[Idx]); > + SerialPrint (" Socket[%d]: DIMM1 voltage : %d\n", Idx, PlatformHob->Dimm1Voltage[Idx]); > + SerialPrint (" Socket[%d]: DIMM2 voltage : %d\n", Idx, PlatformHob->Dimm2Voltage[Idx]); > + } > + > + SerialPrint (" PCP Clock : %d MHz\n", PlatformHob->PcpClk / MHZ_SCALE_FACTOR); > + SerialPrint (" SOC Clock : %d MHz\n", PlatformHob->SocClk / MHZ_SCALE_FACTOR); > + SerialPrint (" SYS Clock : %d MHz\n", PlatformHob->SysClk / MHZ_SCALE_FACTOR); > + SerialPrint (" AHB Clock : %d MHz\n", PlatformHob->AhbClk / MHZ_SCALE_FACTOR); > +} > + > +/** > + Entry point function for the PEIM > + > + @param FileHandle Handle of the file being invoked. > + @param PeiServices Describes the list of possible PEI Services. > + > + @return EFI_SUCCESS If we installed our PPI > + > +**/ > +EFI_STATUS > +EFIAPI > +DebugInfoPeiEntryPoint ( > + IN EFI_PEI_FILE_HANDLE FileHandle, > + IN CONST EFI_PEI_SERVICES **PeiServices > + ) > +{ > + PrintSystemInfo (); > + PrintNVRAM (); > + > + return EFI_SUCCESS; > +} > -- > 2.17.1 >