From: "Leif Lindholm" <leif@nuviainc.com>
To: Nhi Pham <nhi@os.amperecomputing.com>
Cc: devel@edk2.groups.io, Quan Nguyen <quan@os.amperecomputing.com>,
Thang Nguyen <thang@os.amperecomputing.com>,
Chuong Tran <chuong@os.amperecomputing.com>,
Phong Vo <phong@os.amperecomputing.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Nate DeSimone <nathaniel.l.desimone@intel.com>
Subject: Re: [edk2-platforms][PATCH v2 26/32] AmpereAltraPkg: Add configuration screen for RAS
Date: Tue, 8 Jun 2021 00:22:27 +0100 [thread overview]
Message-ID: <20210607232227.tdntb3axltioryrb@leviathan> (raw)
In-Reply-To: <20210526100724.5359-28-nhi@os.amperecomputing.com>
On Wed, May 26, 2021 at 17:07:18 +0700, Nhi Pham wrote:
> From: Quan Nguyen <quan@os.amperecomputing.com>
>
> This supports user to enable/disable RAS components running the system
> firmware such as HEST, BERT,...
>
> Cc: Thang Nguyen <thang@os.amperecomputing.com>
> Cc: Chuong Tran <chuong@os.amperecomputing.com>
> Cc: Phong Vo <phong@os.amperecomputing.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
>
> Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
> ---
> Platform/Ampere/JadePkg/Jade.dsc | 1 +
> Platform/Ampere/JadePkg/Jade.fdf | 1 +
> Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf | 56 ++
> Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/NVDataStruc.h | 46 ++
> Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h | 82 +++
> Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/Vfr.vfr | 105 +++
> Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c | 762 ++++++++++++++++++++
> Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/VfrStrings.uni | 38 +
> 8 files changed, 1091 insertions(+)
>
> diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc
> index e82b0cce691a..26cf8be001ab 100755
> --- a/Platform/Ampere/JadePkg/Jade.dsc
> +++ b/Platform/Ampere/JadePkg/Jade.dsc
> @@ -182,3 +182,4 @@ [Components.common]
> Silicon/Ampere/AmpereAltraPkg/Drivers/MemInfoDxe/MemInfoDxe.inf
> Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf
> Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.inf
> + Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf
> diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
> index ddd601075f19..c0b71a4732fa 100755
> --- a/Platform/Ampere/JadePkg/Jade.fdf
> +++ b/Platform/Ampere/JadePkg/Jade.fdf
> @@ -357,5 +357,6 @@ [FV.FvMain]
> INF Silicon/Ampere/AmpereAltraPkg/Drivers/MemInfoDxe/MemInfoDxe.inf
> INF Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf
> INF Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.inf
> + INF Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf
>
> !include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf
> new file mode 100644
> index 000000000000..7413b7474d7a
> --- /dev/null
> +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf
> @@ -0,0 +1,56 @@
> +## @file
> +#
> +# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = RasConfigDxe
> + FILE_GUID = 5b5ee6e3-3135-45f7-ad21-46a3f36813cc
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = RasConfigEntryPoint
> +
> +[Sources.common]
> + NVDataStruc.h
> + RasConfigDxe.c
> + RasConfigDxe.h
> + Vfr.vfr
> + VfrStrings.uni
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
> + Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
> +
> +[LibraryClasses]
> + AmpereCpuLib
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + DevicePathLib
> + DevicePathLib
> + HiiLib
> + MemoryAllocationLib
> + NVParamLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> + UefiLib
> + UefiRuntimeServicesTableLib
> +
> +[Guids]
> + gEfiIfrTianoGuid
> + gPlatformManagerFormsetGuid
> + gAcpiConfigFormSetGuid
> +
> +[Protocols]
> + gEfiDevicePathProtocolGuid ## CONSUMES
> + gEfiHiiConfigRoutingProtocolGuid ## CONSUMES
> + gEfiHiiConfigAccessProtocolGuid ## PRODUCES
> +
> +[Depex]
> + TRUE
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/NVDataStruc.h b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/NVDataStruc.h
> new file mode 100644
> index 000000000000..e87d1c97597c
> --- /dev/null
> +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/NVDataStruc.h
> @@ -0,0 +1,46 @@
> +/** @file
> +
> + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef RAS_CONFIG_NVDATA_STRUC_H_
> +#define RAS_CONFIG_NVDATA_STRUC_H_
> +
> +#define RAS_CONFIG_VARSTORE_ID 0x1234
> +#define RAS_CONFIG_FORM_ID 0x1235
> +
> +#define RAS_VARSTORE_NAME L"RasConfigNVData"
> +
> +#define RAS_CONFIG_FORMSET_GUID \
> + { \
> + 0x96934cc6, 0xcb15, 0x4d8a, { 0xbe, 0x5f, 0x8e, 0x7d, 0x55, 0x0e, 0xc9, 0xc6 } \
> + }
> +
> +//
> +// Labels definition
> +//
> +#define LABEL_UPDATE 0x3234
> +#define LABEL_END 0xffff
> +
> +#pragma pack(1)
> +
> +//
> +// Ras Configuration NV data structure definition
> +//
> +typedef struct {
> + UINT32 RasHardwareEinj;
> + UINT32 RasPcieAerFwFirstEnabled;
> + UINT32 RasBertEnabled;
> + UINT32 RasSdeiEnabled;
> + UINT32 RasDdrCeThreshold;
> + UINT32 Ras2pCeThreshold;
> + UINT32 RasCpmCeThreshold;
> + UINT32 RasLinkErrThreshold;
> +} RAS_CONFIG_VARSTORE_DATA;
> +
> +#pragma pack()
> +
> +#endif /* RAS_CONFIG_NVDATA_STRUC_H_ */
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h
> new file mode 100644
> index 000000000000..66e2ded8b701
> --- /dev/null
> +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h
> @@ -0,0 +1,82 @@
> +/** @file
> +
> + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef RAS_CONFIG_DXE_H_
> +#define RAS_CONFIG_DXE_H_
> +
> +#include <Uefi.h>
> +
> +#include <Guid/MdeModuleHii.h>
> +#include <Library/AmpereCpuLib.h>
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/HiiLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/NVParamLib.h>
> +#include <Library/PrintLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/UefiRuntimeServicesTableLib.h>
> +#include <NVParamDef.h>
> +#include <PlatformInfoHob.h>
> +#include <Protocol/HiiConfigAccess.h>
> +#include <Protocol/HiiConfigRouting.h>
Are all of the above include files used by this .h?
> +
> +#include "NVDataStruc.h"
> +
> +//
> +// This is the generated IFR binary data for each formset defined in VFR.
> +//
> +extern UINT8 VfrBin[];
RasConfigVfrBin?
/
Leif
> +
> +//
> +// This is the generated String package data for all .UNI files.
> +//
> +extern UINT8 RasConfigDxeStrings[];
> +
> +#define RAS_2P_CE_THRESHOLD_OFST OFFSET_OF (RAS_CONFIG_VARSTORE_DATA, Ras2pCeThreshold)
> +
> +#define RAS_CONFIG_PRIVATE_SIGNATURE SIGNATURE_32 ('R', 'A', 'S', 'C')
> +
> +typedef struct {
> + UINTN Signature;
> +
> + EFI_HANDLE DriverHandle;
> + EFI_HII_HANDLE HiiHandle;
> + RAS_CONFIG_VARSTORE_DATA Configuration;
> +
> + //
> + // Consumed protocol
> + //
> + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
> +
> + //
> + // Produced protocol
> + //
> + EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess;
> +} RAS_CONFIG_PRIVATE_DATA;
> +
> +#define RAS_CONFIG_PRIVATE_FROM_THIS(a) CR (a, RAS_CONFIG_PRIVATE_DATA, ConfigAccess, RAS_CONFIG_PRIVATE_SIGNATURE)
> +
> +#pragma pack(1)
> +
> +///
> +/// HII specific Vendor Device Path definition.
> +///
> +typedef struct {
> + VENDOR_DEVICE_PATH VendorDevicePath;
> + EFI_DEVICE_PATH_PROTOCOL End;
> +} HII_VENDOR_DEVICE_PATH;
> +
> +#pragma pack()
> +
> +#endif /* RAS_CONFIG_DXE_H_ */
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/Vfr.vfr b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/Vfr.vfr
> new file mode 100644
> index 000000000000..3c2c4947a52b
> --- /dev/null
> +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/Vfr.vfr
> @@ -0,0 +1,105 @@
> +/** @file
> +
> + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "NVDataStruc.h"
> +
> +formset
> + guid = RAS_CONFIG_FORMSET_GUID,
> + title = STRING_TOKEN(STR_RAS_FORM),
> + help = STRING_TOKEN(STR_RAS_FORM_HELP),
> + classguid = gPlatformManagerFormsetGuid,
> +
> + //
> + // Define a variable Storage
> + //
> + varstore RAS_CONFIG_VARSTORE_DATA,
> + varid = RAS_CONFIG_VARSTORE_ID,
> + name = RasConfigNVData,
> + guid = RAS_CONFIG_FORMSET_GUID;
> +
> + form formid = RAS_CONFIG_FORM_ID,
> + title = STRING_TOKEN(STR_RAS_FORM);
> +
> + subtitle text = STRING_TOKEN(STR_RAS_FORM);
> +
> + oneof varid = RasConfigNVData.RasHardwareEinj,
> + prompt = STRING_TOKEN(STR_RAS_HARDWARE_EINJ_PROMPT),
> + help = STRING_TOKEN(STR_RAS_HARDWARE_EINJ_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = DEFAULT;
> + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = 0;
> +
> + endoneof;
> +
> + oneof varid = RasConfigNVData.RasPcieAerFwFirstEnabled,
> + prompt = STRING_TOKEN(STR_RAS_PCIE_AER_FW_FIRST_PROMPT),
> + help = STRING_TOKEN(STR_RAS_PCIE_AER_FW_FIRST_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = 0;
> + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = DEFAULT;
> +
> + endoneof;
> +
> + oneof varid = RasConfigNVData.RasBertEnabled,
> + prompt = STRING_TOKEN(STR_RAS_BERT_ENABLED_PROMPT),
> + help = STRING_TOKEN(STR_RAS_BERT_ENABLED_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = DEFAULT;
> + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = 0;
> +
> + endoneof;
> +
> + oneof varid = RasConfigNVData.RasSdeiEnabled,
> + prompt = STRING_TOKEN(STR_RAS_SDEI_ENABLED_PROMPT),
> + help = STRING_TOKEN(STR_RAS_SDEI_ENABLED_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = 0;
> + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = DEFAULT;
> +
> + endoneof;
> +
> + numeric varid = RasConfigNVData.RasDdrCeThreshold,
> + prompt = STRING_TOKEN(STR_RAS_DDR_CE_THRESHOLD_PROMPT),
> + help = STRING_TOKEN(STR_RAS_DDR_CE_THRESHOLD_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + minimum = 1,
> + maximum = 8192,
> + default = 1,
> +
> + endnumeric;
> +
> + label LABEL_UPDATE;
> + //
> + // This is where we will dynamically add other Action type op-code
> + //
> + label LABEL_END;
> +
> + numeric varid = RasConfigNVData.RasCpmCeThreshold,
> + prompt = STRING_TOKEN(STR_RAS_CPM_CE_THRESHOLD_PROMPT),
> + help = STRING_TOKEN(STR_RAS_CPM_CE_THRESHOLD_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + minimum = 1,
> + maximum = 8192,
> + default = 1,
> +
> + endnumeric;
> +
> + numeric varid = RasConfigNVData.RasLinkErrThreshold,
> + prompt = STRING_TOKEN(STR_RAS_LINK_ERR_THRESHOLD_PROMPT),
> + help = STRING_TOKEN(STR_RAS_LINK_ERR_THRESHOLD_HELP),
> + flags = NUMERIC_SIZE_4 | RESET_REQUIRED,
> + minimum = 1,
> + maximum = 8192,
> + default = 1,
> +
> + endnumeric;
> +
> +
> + endform;
> +
> +endformset;
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c
> new file mode 100644
> index 000000000000..ca115764ed7a
> --- /dev/null
> +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c
> @@ -0,0 +1,762 @@
> +/** @file
> +
> + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "RasConfigDxe.h"
> +
> +CHAR16 RasConfigVarstoreDataName[] = L"RasConfigNVData";
> +
> +EFI_HANDLE mDriverHandle = NULL;
> +RAS_CONFIG_PRIVATE_DATA *mPrivateData = NULL;
> +
> +EFI_GUID mRasConfigFormSetGuid = RAS_CONFIG_FORMSET_GUID;
> +
> +//
> +// Default RAS Settings
> +//
> +#define RAS_DEFAULT_HARDWARE_EINJ_SUPPORT 0
> +#define RAS_DEFAULT_PCIE_AER_FW_FIRST 0
> +#define RAS_DEFAULT_BERT_SUPPORT 1
> +#define RAS_DEFAULT_SDEI_SUPPORT 0
> +#define RAS_DEFAULT_DDR_CE_THRESHOLD 1
> +#define RAS_DEFAULT_2P_CE_THRESHOLD 1
> +#define RAS_DEFAULT_PROCESSOR_CE_THRESHOLD 1
> +#define RAS_DEFAULT_DDR_LINK_ERROR_THRESHOLD 1
> +
> +
> +HII_VENDOR_DEVICE_PATH mRasConfigHiiVendorDevicePath = {
> + {
> + {
> + HARDWARE_DEVICE_PATH,
> + HW_VENDOR_DP,
> + {
> + (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
> + (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
> + }
> + },
> + RAS_CONFIG_FORMSET_GUID
> + },
> + {
> + END_DEVICE_PATH_TYPE,
> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + {
> + (UINT8)(END_DEVICE_PATH_LENGTH),
> + (UINT8)((END_DEVICE_PATH_LENGTH) >> 8)
> + }
> + }
> +};
> +
> +EFI_STATUS
> +RasConfigNvParamGet (
> + OUT RAS_CONFIG_VARSTORE_DATA *Configuration
> + )
> +{
> + EFI_STATUS Status;
> + UINT32 Value;
> +
> + Status = NVParamGet (
> + NV_SI_HARDWARE_EINJ,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_HARDWARE_EINJ_SUPPORT;
> + Status = NVParamSet (
> + NV_SI_HARDWARE_EINJ,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasHardwareEinj = Value;
> +
> + Status = NVParamGet (
> + NV_SI_RAS_PCIE_AER_FW_FIRST,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_PCIE_AER_FW_FIRST;
> + Status = NVParamSet (
> + NV_SI_RAS_PCIE_AER_FW_FIRST,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasPcieAerFwFirstEnabled = Value;
> +
> + Status = NVParamGet (
> + NV_SI_RAS_BERT_ENABLED,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_BERT_SUPPORT;
> + Status = NVParamSet (
> + NV_SI_RAS_BERT_ENABLED,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasBertEnabled = Value;
> +
> + Status = NVParamGet (
> + NV_SI_RAS_SDEI_ENABLED,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_SDEI_SUPPORT;
> + Status = NVParamSet (
> + NV_SI_RAS_SDEI_ENABLED,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasSdeiEnabled = Value;
> +
> + Status = NVParamGet (
> + NV_SI_DDR_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_DDR_CE_THRESHOLD;
> + Status = NVParamSet (
> + NV_SI_DDR_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasDdrCeThreshold = Value;
> +
> + Status = NVParamGet (
> + NV_SI_2P_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_2P_CE_THRESHOLD;
> + Status = NVParamSet (
> + NV_SI_2P_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->Ras2pCeThreshold = Value;
> +
> + Status = NVParamGet (
> + NV_SI_CPM_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_PROCESSOR_CE_THRESHOLD;
> + Status = NVParamSet (
> + NV_SI_CPM_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasCpmCeThreshold = Value;
> +
> + Status = NVParamGet (
> + NV_SI_LINK_ERR_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + &Value
> + );
> + if (EFI_ERROR (Status)) {
> + Value = RAS_DEFAULT_DDR_LINK_ERROR_THRESHOLD;
> + Status = NVParamSet (
> + NV_SI_LINK_ERR_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Value
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__));
> + ASSERT_EFI_ERROR (Status);
> + Value = 0;
> + }
> + }
> + Configuration->RasLinkErrThreshold = Value;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +RasConfigNvParamSet (
> + IN RAS_CONFIG_VARSTORE_DATA *Configuration
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = NVParamSet (
> + NV_SI_HARDWARE_EINJ,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasHardwareEinj
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_RAS_PCIE_AER_FW_FIRST,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasPcieAerFwFirstEnabled
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_RAS_BERT_ENABLED,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasBertEnabled
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_RAS_SDEI_ENABLED,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasSdeiEnabled
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_DDR_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasDdrCeThreshold
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_2P_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->Ras2pCeThreshold
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_CPM_CE_RAS_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasCpmCeThreshold
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = NVParamSet (
> + NV_SI_LINK_ERR_THRESHOLD,
> + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC,
> + NV_PERM_BIOS | NV_PERM_MANU,
> + Configuration->RasLinkErrThreshold
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This function allows a caller to extract the current configuration for one
> + or more named elements from the target driver.
> +
> + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL.
> + @param Request A null-terminated Unicode string in
> + <ConfigRequest> format.
> + @param Progress On return, points to a character in the Request
> + string. Points to the string's null terminator if
> + request was successful. Points to the most recent
> + '&' before the first failing name/value pair (or
> + the beginning of the string if the failure is in
> + the first name/value pair) if the request was not
> + successful.
> + @param Results A null-terminated Unicode string in
> + <ConfigAltResp> format which has all values filled
> + in for the names in the Request string. String to
> + be allocated by the called function.
> +
> + @retval EFI_SUCCESS The Results is filled with the requested values.
> + @retval EFI_OUT_OF_RESOURCES Not enough memory to store the results.
> + @retval EFI_INVALID_PARAMETER Request is illegal syntax, or unknown name.
> + @retval EFI_NOT_FOUND Routing data doesn't match any storage in this
> + driver.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +RasConfigExtractConfig (
> + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
> + IN CONST EFI_STRING Request,
> + OUT EFI_STRING *Progress,
> + OUT EFI_STRING *Results
> + )
> +{
> + EFI_STATUS Status;
> + UINTN BufferSize;
> + RAS_CONFIG_PRIVATE_DATA *PrivateData;
> + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
> + EFI_STRING ConfigRequest;
> + EFI_STRING ConfigRequestHdr;
> + UINTN Size;
> + BOOLEAN AllocatedRequest;
> +
> + if (Progress == NULL || Results == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> + //
> + // Initialize the local variables.
> + //
> + ConfigRequestHdr = NULL;
> + ConfigRequest = NULL;
> + Size = 0;
> + *Progress = Request;
> + AllocatedRequest = FALSE;
> +
> + if ((Request != NULL) && !HiiIsConfigHdrMatch (Request, &mRasConfigFormSetGuid, RasConfigVarstoreDataName)) {
> + return EFI_NOT_FOUND;
> + }
> +
> + PrivateData = RAS_CONFIG_PRIVATE_FROM_THIS (This);
> + HiiConfigRouting = PrivateData->HiiConfigRouting;
> +
> + //
> + // Get current setting from NVParam.
> + //
> + Status = RasConfigNvParamGet (&PrivateData->Configuration);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + //
> + // Convert buffer data to <ConfigResp> by helper function BlockToConfig()
> + //
> + BufferSize = sizeof (RAS_CONFIG_VARSTORE_DATA);
> + ConfigRequest = Request;
> + if ((Request == NULL) || (StrStr (Request, L"OFFSET") == NULL)) {
> + //
> + // Request has no request element, construct full request string.
> + // Allocate and fill a buffer large enough to hold the <ConfigHdr> template
> + // followed by "&OFFSET=0&WIDTH=WWWWWWWWWWWWWWWW" followed by a Null-terminator
> + //
> + ConfigRequestHdr = HiiConstructConfigHdr (&mRasConfigFormSetGuid, RasConfigVarstoreDataName, PrivateData->DriverHandle);
> + Size = (StrLen (ConfigRequestHdr) + 32 + 1) * sizeof (CHAR16);
> + ConfigRequest = AllocateZeroPool (Size);
> + ASSERT (ConfigRequest != NULL);
> + if (ConfigRequest == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + AllocatedRequest = TRUE;
> + UnicodeSPrint (ConfigRequest, Size, L"%s&OFFSET=0&WIDTH=%016LX", ConfigRequestHdr, (UINT64)BufferSize);
> + FreePool (ConfigRequestHdr);
> + }
> +
> + //
> + // Convert buffer data to <ConfigResp> by helper function BlockToConfig()
> + //
> + Status = HiiConfigRouting->BlockToConfig (
> + HiiConfigRouting,
> + ConfigRequest,
> + (UINT8 *)&PrivateData->Configuration,
> + BufferSize,
> + Results,
> + Progress
> + );
> +
> + //
> + // Free the allocated config request string.
> + //
> + if (AllocatedRequest) {
> + FreePool (ConfigRequest);
> + ConfigRequest = NULL;
> + }
> +
> + //
> + // Set Progress string to the original request string.
> + //
> + if (Request == NULL) {
> + *Progress = NULL;
> + } else if (StrStr (Request, L"OFFSET") == NULL) {
> + *Progress = Request + StrLen (Request);
> + }
> +
> + return Status;
> +}
> +
> +/**
> + This function processes the results of changes in configuration.
> +
> + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL.
> + @param Configuration A null-terminated Unicode string in <ConfigResp>
> + format.
> + @param Progress A pointer to a string filled in with the offset of
> + the most recent '&' before the first failing
> + name/value pair (or the beginning of the string if
> + the failure is in the first name/value pair) or
> + the terminating NULL if all was successful.
> +
> + @retval EFI_SUCCESS The Results is processed successfully.
> + @retval EFI_INVALID_PARAMETER Configuration is NULL.
> + @retval EFI_NOT_FOUND Routing data doesn't match any storage in this
> + driver.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +RasConfigRouteConfig (
> + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
> + IN CONST EFI_STRING Configuration,
> + OUT EFI_STRING *Progress
> + )
> +{
> + EFI_STATUS Status;
> + UINTN BufferSize;
> + RAS_CONFIG_PRIVATE_DATA *PrivateData;
> + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
> +
> + if (Configuration == NULL || Progress == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + PrivateData = RAS_CONFIG_PRIVATE_FROM_THIS (This);
> + HiiConfigRouting = PrivateData->HiiConfigRouting;
> + *Progress = Configuration;
> +
> + //
> + // Check routing data in <ConfigHdr>.
> + // Note: if only one Storage is used, then this checking could be skipped.
> + //
> + if (!HiiIsConfigHdrMatch (Configuration, &mRasConfigFormSetGuid, RasConfigVarstoreDataName)) {
> + return EFI_NOT_FOUND;
> + }
> +
> + //
> + // Get configuration data from NVParam
> + //
> + Status = RasConfigNvParamGet (&PrivateData->Configuration);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + //
> + // Convert <ConfigResp> to buffer data by helper function ConfigToBlock()
> + //
> + BufferSize = sizeof (RAS_CONFIG_VARSTORE_DATA);
> + Status = HiiConfigRouting->ConfigToBlock (
> + HiiConfigRouting,
> + Configuration,
> + (UINT8 *)&PrivateData->Configuration,
> + &BufferSize,
> + Progress
> + );
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + //
> + // Store configuration data back to NVParam
> + //
> + Status = RasConfigNvParamSet (&PrivateData->Configuration);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + return Status;
> +}
> +
> +/**
> + This function processes the results of changes in configuration.
> +
> + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL.
> + @param Action Specifies the type of action taken by the browser.
> + @param QuestionId A unique value which is sent to the original
> + exporting driver so that it can identify the type
> + of data to expect.
> + @param Type The type of value for the question.
> + @param Value A pointer to the data being sent to the original
> + exporting driver.
> + @param ActionRequest On return, points to the action requested by the
> + callback function.
> +
> + @retval EFI_SUCCESS The callback successfully handled the action.
> + @retval EFI_INVALID_PARAMETER The setup browser call this function with invalid parameters.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +RasConfigCallback (
> + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
> + IN EFI_BROWSER_ACTION Action,
> + IN EFI_QUESTION_ID QuestionId,
> + IN UINT8 Type,
> + IN EFI_IFR_TYPE_VALUE *Value,
> + OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
> + )
> +{
> + if (Action != EFI_BROWSER_ACTION_CHANGING) {
> + //
> + // Do nothing for other UEFI Action. Only do call back when data is changed.
> + //
> + return EFI_UNSUPPORTED;
> + }
> + if (((Value == NULL)
> + && (Action != EFI_BROWSER_ACTION_FORM_OPEN)
> + && (Action != EFI_BROWSER_ACTION_FORM_CLOSE))
> + || (ActionRequest == NULL))
> + {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +UpdateRasConfigScreen (
> + IN RAS_CONFIG_PRIVATE_DATA *PrivateData
> + )
> +{
> + EFI_STATUS Status;
> + VOID *StartOpCodeHandle;
> + EFI_IFR_GUID_LABEL *StartLabel;
> + VOID *EndOpCodeHandle;
> + EFI_IFR_GUID_LABEL *EndLabel;
> +
> + if (!IsSlaveSocketActive ()) {
> + return EFI_SUCCESS;
> + }
> +
> + //
> + // Initialize the container for dynamic opcodes
> + //
> + StartOpCodeHandle = HiiAllocateOpCodeHandle ();
> + ASSERT (StartOpCodeHandle != NULL);
> +
> + EndOpCodeHandle = HiiAllocateOpCodeHandle ();
> + ASSERT (EndOpCodeHandle != NULL);
> +
> + //
> + // Create Hii Extend Label OpCode as the start opcode
> + //
> + StartLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode (
> + StartOpCodeHandle,
> + &gEfiIfrTianoGuid,
> + NULL,
> + sizeof (EFI_IFR_GUID_LABEL)
> + );
> + if (StartLabel == NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto FreeOpCodeBuffer;
> + }
> + StartLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL;
> + StartLabel->Number = LABEL_UPDATE;
> +
> + //
> + // Create Hii Extend Label OpCode as the end opcode
> + //
> + EndLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode (
> + EndOpCodeHandle,
> + &gEfiIfrTianoGuid,
> + NULL,
> + sizeof (EFI_IFR_GUID_LABEL)
> + );
> + if (EndLabel == NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto FreeOpCodeBuffer;
> + }
> + EndLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL;
> + EndLabel->Number = LABEL_END;
> +
> + //
> + // Create the numeric for 2P CE threshold
> + //
> + HiiCreateNumericOpCode (
> + StartOpCodeHandle, // Container for dynamic created opcodes
> + 0x8005, // Question ID
> + RAS_CONFIG_VARSTORE_ID, // VarStore ID
> + (UINT16)RAS_2P_CE_THRESHOLD_OFST, // Offset in Buffer Storage
> + STRING_TOKEN (STR_RAS_2P_CE_THRESHOLD_PROMPT), // Question prompt text
> + STRING_TOKEN (STR_RAS_2P_CE_THRESHOLD_HELP),
> + EFI_IFR_FLAG_CALLBACK | EFI_IFR_FLAG_RESET_REQUIRED,
> + EFI_IFR_NUMERIC_SIZE_4,
> + 1,
> + 8192,
> + 1,
> + NULL
> + );
> +
> + Status = HiiUpdateForm (
> + PrivateData->HiiHandle, // HII handle
> + &mRasConfigFormSetGuid, // Formset GUID
> + RAS_CONFIG_FORM_ID, // Form ID
> + StartOpCodeHandle, // Label for where to insert opcodes
> + EndOpCodeHandle // Insert data
> + );
> +
> +FreeOpCodeBuffer:
> + HiiFreeOpCodeHandle (StartOpCodeHandle);
> + HiiFreeOpCodeHandle (EndOpCodeHandle);
> +
> + return Status;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +RasConfigUnload (
> + VOID
> + )
> +{
> + ASSERT (mPrivateData != NULL);
> +
> + if (mDriverHandle != NULL) {
> + gBS->UninstallMultipleProtocolInterfaces (
> + mDriverHandle,
> + &gEfiDevicePathProtocolGuid,
> + &mRasConfigHiiVendorDevicePath,
> + &gEfiHiiConfigAccessProtocolGuid,
> + &mPrivateData->ConfigAccess,
> + NULL
> + );
> + mDriverHandle = NULL;
> + }
> +
> + if (mPrivateData->HiiHandle != NULL) {
> + HiiRemovePackages (mPrivateData->HiiHandle);
> + }
> +
> + FreePool (mPrivateData);
> + mPrivateData = NULL;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +RasConfigEntryPoint (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HII_HANDLE HiiHandle;
> + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting;
> +
> + //
> + // Initialize driver private data
> + //
> + mPrivateData = AllocateZeroPool (sizeof (RAS_CONFIG_PRIVATE_DATA));
> + if (mPrivateData == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + mPrivateData->Signature = RAS_CONFIG_PRIVATE_SIGNATURE;
> +
> + mPrivateData->ConfigAccess.ExtractConfig = RasConfigExtractConfig;
> + mPrivateData->ConfigAccess.RouteConfig = RasConfigRouteConfig;
> + mPrivateData->ConfigAccess.Callback = RasConfigCallback;
> +
> + //
> + // Locate ConfigRouting protocol
> + //
> + Status = gBS->LocateProtocol (&gEfiHiiConfigRoutingProtocolGuid, NULL, (VOID **)&HiiConfigRouting);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> + mPrivateData->HiiConfigRouting = HiiConfigRouting;
> +
> + Status = gBS->InstallMultipleProtocolInterfaces (
> + &mDriverHandle,
> + &gEfiDevicePathProtocolGuid,
> + &mRasConfigHiiVendorDevicePath,
> + &gEfiHiiConfigAccessProtocolGuid,
> + &mPrivateData->ConfigAccess,
> + NULL
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + mPrivateData->DriverHandle = mDriverHandle;
> +
> + //
> + // Publish our HII data
> + //
> + HiiHandle = HiiAddPackages (
> + &mRasConfigFormSetGuid,
> + mDriverHandle,
> + RasConfigDxeStrings,
> + VfrBin,
> + NULL
> + );
> + if (HiiHandle == NULL) {
> + gBS->UninstallMultipleProtocolInterfaces (
> + mDriverHandle,
> + &gEfiDevicePathProtocolGuid,
> + &mRasConfigHiiVendorDevicePath,
> + &gEfiHiiConfigAccessProtocolGuid,
> + &mPrivateData->ConfigAccess,
> + NULL
> + );
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + mPrivateData->HiiHandle = HiiHandle;
> +
> + Status = UpdateRasConfigScreen (mPrivateData);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "%a %d Fail to update Memory Configuration screen \n",
> + __FUNCTION__,
> + __LINE__
> + ));
> + RasConfigUnload ();
> + ASSERT_EFI_ERROR (Status);
> + return Status;
> + }
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/VfrStrings.uni b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/VfrStrings.uni
> new file mode 100644
> index 000000000000..c502093a2bbf
> --- /dev/null
> +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/VfrStrings.uni
> @@ -0,0 +1,38 @@
> +//
> +// Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
> +//
> +// SPDX-License-Identifier: BSD-2-Clause-Patent
> +//
> +
> +#langdef en-US "English"
> +
> +#string STR_RAS_FORM #language en-US "RAS Configuration"
> +#string STR_RAS_FORM_HELP #language en-US "RAS Configuration"
> +
> +#string STR_RAS_FORM_SEPERATE_LINE #language en-US ""
> +#string STR_RAS_COMMON_ENABLE #language en-US "Enabled"
> +#string STR_RAS_COMMON_DISABLE #language en-US "Disabled"
> +
> +#string STR_RAS_HARDWARE_EINJ_PROMPT #language en-US "Hardware EINJ"
> +#string STR_RAS_HARDWARE_EINJ_HELP #language en-US "Enable hardware EINJ support, if disabled EINJ is software simulated"
> +
> +#string STR_RAS_PCIE_AER_FW_FIRST_PROMPT #language en-US "PCIe AER Firmware First"
> +#string STR_RAS_PCIE_AER_FW_FIRST_HELP #language en-US "Enable firmware to detect PCIe AER, if disabled OS detects AER"
> +
> +#string STR_RAS_BERT_ENABLED_PROMPT #language en-US "Enable BERT"
> +#string STR_RAS_BERT_ENABLED_HELP #language en-US "Enable Boot Error Record Table, if disabled BERT will not be populated"
> +
> +#string STR_RAS_SDEI_ENABLED_PROMPT #language en-US "Enable SDEI"
> +#string STR_RAS_SDEI_ENABLED_HELP #language en-US "Enable Software Delegated Exception Interface for NMI support"
> +
> +#string STR_RAS_DDR_CE_THRESHOLD_PROMPT #language en-US "DDR CE Threshold"
> +#string STR_RAS_DDR_CE_THRESHOLD_HELP #language en-US "Number of DDR CEs to occur before using SCI notification to OS rather than polled notification"
> +
> +#string STR_RAS_2P_CE_THRESHOLD_PROMPT #language en-US "2P CE Threshold"
> +#string STR_RAS_2P_CE_THRESHOLD_HELP #language en-US "Number of 2P CEs to occur before using SCI notification to OS rather than polled notification"
> +
> +#string STR_RAS_CPM_CE_THRESHOLD_PROMPT #language en-US "Processor CE Threshold"
> +#string STR_RAS_CPM_CE_THRESHOLD_HELP #language en-US "Number of processor CEs to occur before using SCI notification to OS rather than polled notification"
> +
> +#string STR_RAS_LINK_ERR_THRESHOLD_PROMPT #language en-US "DDR Link Error Threshold"
> +#string STR_RAS_LINK_ERR_THRESHOLD_HELP #language en-US "Number of DDR link errors before considering it fatal severity"
> --
> 2.17.1
>
next prev parent reply other threads:[~2021-06-07 23:22 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 10:06 [edk2-platforms][PATCH v2 00/32] Add new Ampere Mt. Jade platform Nhi Pham
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 01/32] Ampere: Initial support for Ampere Altra processor and " Nhi Pham
2021-06-04 23:04 ` Leif Lindholm
2021-06-09 4:50 ` Nhi Pham
2021-06-09 12:40 ` Leif Lindholm
2021-06-15 16:46 ` Nhi Pham
2021-05-26 10:06 ` [PATCH 1/1] UsbCdcNetDxe: Remove reading connection status in SNP GetStatus Nhi Pham
2021-05-26 10:23 ` [edk2-devel] " Nhi Pham
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 02/32] AmpereAltraPkg: Add MmCommunication modules Nhi Pham
2021-06-04 23:05 ` Leif Lindholm
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 03/32] AmperePlatformPkg: Implement FailSafe library Nhi Pham
2021-06-04 23:07 ` Leif Lindholm
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 04/32] AmperePlatformPkg: Add FailSafe and WDT support Nhi Pham
2021-06-04 23:12 ` Leif Lindholm
2021-06-15 16:47 ` Nhi Pham
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 05/32] AmpereAltraPkg: Add DwI2cLib library Nhi Pham
2021-06-04 23:21 ` Leif Lindholm
2021-06-15 16:47 ` Nhi Pham
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 06/32] AmpereAltraPkg: Add DwGpioLib library Nhi Pham
2021-06-04 23:22 ` Leif Lindholm
2021-05-26 10:06 ` [edk2-platforms][PATCH v2 07/32] JadePkg: Implement RealTimeClockLib for PCF85063 Nhi Pham
2021-06-04 23:26 ` Leif Lindholm
2021-06-15 16:48 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 08/32] AmpereAltraPkg: Add BootProgress support Nhi Pham
2021-06-04 23:27 ` Leif Lindholm
2021-06-15 16:48 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 09/32] AmpereAltraPkg: Support non-volatile variables Nhi Pham
2021-06-04 23:36 ` Leif Lindholm
2021-06-15 16:48 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 10/32] AmpereSiliconPkg: Add PlatformManagerUiLib library instance Nhi Pham
2021-06-04 23:37 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 11/32] AmperePlatformPkg: Add AcpiPccLib to support ACPI PCCT Table Nhi Pham
2021-06-04 23:44 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 12/32] AmperePlatformPkg: Add AcpiHelperLib to update ACPI DSDT table Nhi Pham
2021-06-04 23:47 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 13/32] AmpereAltraPkg, JadePkg: Add ACPI support Nhi Pham
2021-06-04 23:50 ` Leif Lindholm
2021-06-15 16:49 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 14/32] AmpereAltraPkg: Add PcieCoreLib library instance Nhi Pham
2021-06-05 0:05 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 15/32] JadePkg: Add PcieBoardLib " Nhi Pham
2021-06-07 22:45 ` Leif Lindholm
2021-06-15 16:50 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 16/32] AmpereAltraPkg: Add PciHostBridge driver Nhi Pham
2021-06-08 22:26 ` Leif Lindholm
2021-06-09 5:29 ` Ard Biesheuvel
2021-06-15 15:54 ` Nhi Pham
2021-06-16 14:20 ` Ard Biesheuvel
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 17/32] JadePkg: Enable PCIe-related libraries and device drivers Nhi Pham
2021-06-07 22:51 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 18/32] JadePkg: Add ASpeed GOP driver Nhi Pham
2021-06-07 22:51 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 19/32] AmpereAltraPkg: Add Random Number Generator Support Nhi Pham
2021-06-08 11:13 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 20/32] JadePkg: Add SMBIOS tables support Nhi Pham
2021-06-07 23:00 ` Leif Lindholm
2021-06-15 16:51 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 21/32] AmpereAltraPkg: Add DebugInfoPei module Nhi Pham
2021-06-07 23:08 ` Leif Lindholm
2021-06-15 16:51 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 22/32] AmpereAltraPkg: Add platform info screen Nhi Pham
2021-06-07 23:10 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 23/32] AmpereAltraPkg: Add configuration screen for memory Nhi Pham
2021-06-07 23:14 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 24/32] AmpereAltraPkg: Add configuration screen for CPU Nhi Pham
2021-06-07 23:15 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 25/32] AmpereAltraPkg: Add configuration screen for ACPI Nhi Pham
2021-06-07 23:20 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 26/32] AmpereAltraPkg: Add configuration screen for RAS Nhi Pham
2021-06-07 23:22 ` Leif Lindholm [this message]
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 27/32] AmpereAltraPkg: Add configuration screen for Watchdog timer Nhi Pham
2021-06-07 23:24 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 28/32] AmpereAltraPkg: Add configuration screen for Pcie Devices Nhi Pham
2021-06-07 23:34 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 29/32] JadePkg: Recover boot options when NVRAM cleared Nhi Pham
2021-06-07 23:46 ` Leif Lindholm
2021-06-15 16:52 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 30/32] AmpereSiliconPkg: Implement PlatformBootManagerLib for LinuxBoot Nhi Pham
2021-06-07 23:50 ` Leif Lindholm
2021-06-09 15:21 ` Nhi Pham
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 31/32] Platform/Ampere: Introduce the LinuxBootPkg Nhi Pham
2021-06-07 23:51 ` Leif Lindholm
2021-05-26 10:07 ` [edk2-platforms][PATCH v2 32/32] AmpereAltraPkg,JadePkg: Support LinuxBoot DSC/FDF build for Jade platform Nhi Pham
2021-06-07 23:58 ` Leif Lindholm
2021-06-09 15:20 ` Nhi Pham
2021-05-27 12:56 ` [edk2-platforms][PATCH v2 00/32] Add new Ampere Mt. " Leif Lindholm
2021-06-04 13:54 ` Leif Lindholm
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