From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com []) by mx.groups.io with SMTP id smtpd.web10.1057.1623365182124167839 for ; Thu, 10 Jun 2021 15:46:22 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: michael.d.kinney@intel.com) IronPort-SDR: witH/TXGxCguUr/V+sKyVuGpvwTn9/DIwnU1E0scNT3xU2Xrh2is4pQXgSrZLMvhkjrWhVEurI WAhQXXsm6N6g== X-IronPort-AV: E=McAfee;i="6200,9189,10011"; a="291051494" X-IronPort-AV: E=Sophos;i="5.83,264,1616482800"; d="scan'208";a="291051494" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2021 15:46:09 -0700 IronPort-SDR: nz4U6abkWRozlJH9NXdE6t9OwFqErBw4mEMsPOFMJ8xmxPbShYa8oLFGEM3n/MF3Proe/cpeYp evR8DCGzcQaw== X-IronPort-AV: E=Sophos;i="5.83,264,1616482800"; d="scan'208";a="419883431" Received: from mdkinney-mobl2.amr.corp.intel.com ([10.209.9.161]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2021 15:46:08 -0700 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value Date: Thu, 10 Jun 2021 15:45:49 -0700 Message-Id: <20210610224550.855-3-michael.d.kinney@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20210610224550.855-1-michael.d.kinney@intel.com> References: <20210610224550.855-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3451 Update SmBusSendByte() to write value to Command Register instead of Host Data registers. Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Michael D Kinney --- .../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 +++++++++++++------ 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c index 5d09e18613..68dc698aaf 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c @@ -201,14 +201,24 @@ InternalSmBusNonBlock ( HostControl |= B_PCH_SMBUS_PEC_EN; } // - // Set Host Commond Register. + // We do not need Data Register for SendByte Command // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress)); - // - // Write value to Host Data 0 and Host Data 1 Registers. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value); - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8)); + if ((HostControl == V_PCH_SMBUS_SMB_CMD_BYTE) && ((SmBusAddress & BIT0) == B_PCH_SMBUS_WRITE)) { + // + // Set Host Command Register. + // + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8)Value); + } else { + // + // Set Host Command Register. + // + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress)); + // + // Write value to Host Data 0 and Host Data 1 Registers. + // + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value); + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8)); + } // // Set Auxiliary Control Regiester. // -- 2.31.1.windows.1