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From: "Michael D Kinney" <michael.d.kinney@intel.com>
To: devel@edk2.groups.io
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Subject: [edk2-platforms][Patch 3/3] QuarkSocPkg/SmbusLib: Fix SmBusSendByte value
Date: Thu, 10 Jun 2021 15:45:50 -0700	[thread overview]
Message-ID: <20210610224550.855-4-michael.d.kinney@intel.com> (raw)
In-Reply-To: <20210610224550.855-1-michael.d.kinney@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3452

Update SmBusSendByte() to write value to Command Register instead of
Host Data registers.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
---
 .../Library/SmbusLib/SmbusLib.c               | 27 ++++++++++++-------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c
index 319e103cf4..34437582d4 100644
--- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c
+++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c
@@ -165,15 +165,24 @@ InternalSmBusNonBlock (
   }
 
   //
-  // Set Host Commond Register.
+  // We do not need Data Register for SendByte Command
   //
-  IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
-  //
-  // Write value to Host Data 0 and Host Data 1 Registers.
-  //
-  IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, (UINT8) Value);
-  IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD1, (UINT8) (Value >> 8));
-
+  if ((HostControl == V_QNC_SMBUS_HCTL_CMD_BYTE) && ((SmBusAddress & BIT0) == V_QNC_SMBUS_RW_SEL_WRITE)) {
+    //
+    // Set Host Command Register.
+    //
+    IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8)Value);
+  } else {
+    //
+    // Set Host Command Register.
+    //
+    IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
+    //
+    // Write value to Host Data 0 and Host Data 1 Registers.
+    //
+    IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, (UINT8) Value);
+    IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD1, (UINT8) (Value >> 8));
+  }
 
   //
   // Set SMBUS slave address for the device to send/receive from.
@@ -351,7 +360,7 @@ SmBusSendByte (
 
   return (UINT8) InternalSmBusNonBlock (
                    V_QNC_SMBUS_HCTL_CMD_BYTE,
-                   SmBusAddress & V_QNC_SMBUS_RW_SEL_WRITE,
+                   SmBusAddress | V_QNC_SMBUS_RW_SEL_WRITE,
                    Value,
                    Status
                    );
-- 
2.31.1.windows.1


  parent reply	other threads:[~2021-06-10 22:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-10 22:45 [edk2-platforms][Patch 0/3] Fix SmBusSendByte value Michael D Kinney
2021-06-10 22:45 ` [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
2021-06-11  0:32   ` Chiu, Chasel
2021-06-10 22:45 ` [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
2021-06-11  0:33   ` Chiu, Chasel
2021-06-10 22:45 ` Michael D Kinney [this message]
2021-06-11  0:16 ` [edk2-platforms][Patch 0/3] " Nate DeSimone

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