* [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value
2021-06-10 22:45 [edk2-platforms][Patch 0/3] Fix SmBusSendByte value Michael D Kinney
@ 2021-06-10 22:45 ` Michael D Kinney
2021-06-11 0:32 ` Chiu, Chasel
2021-06-10 22:45 ` [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Michael D Kinney @ 2021-06-10 22:45 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Sai Chaganty
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3450
Update SmBusSendByte() to write value to Command Register instead of
Host Data registers.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
---
.../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 +++++++++++++------
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
index 3d6386d433..dacf9d03b2 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
@@ -203,14 +203,24 @@ InternalSmBusNonBlock (
AuxiliaryControl |= B_SMBUS_IO_AAC;
}
//
- // Set Host Commond Register.
+ // We do not need Data Register for SendByte Command
//
- IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
- //
- // Write value to Host Data 0 and Host Data 1 Registers.
- //
- IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD0, (UINT8) Value);
- IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD1, (UINT8) (Value >> 8));
+ if ((HostControl == V_SMBUS_IO_SMB_CMD_BYTE) && ((SmBusAddress & BIT0) == B_SMBUS_IO_WRITE)) {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HCMD, (UINT8)Value);
+ } else {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
+ //
+ // Write value to Host Data 0 and Host Data 1 Registers.
+ //
+ IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD0, (UINT8) Value);
+ IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD1, (UINT8) (Value >> 8));
+ }
//
// Set Auxiliary Control Regiester.
//
--
2.31.1.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value
2021-06-10 22:45 ` [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
@ 2021-06-11 0:32 ` Chiu, Chasel
0 siblings, 0 replies; 7+ messages in thread
From: Chiu, Chasel @ 2021-06-11 0:32 UTC (permalink / raw)
To: Kinney, Michael D, devel@edk2.groups.io; +Cc: Chaganty, Rangasai V
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Kinney, Michael D <michael.d.kinney@intel.com>
> Sent: Friday, June 11, 2021 6:46 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: Fix
> SmBusSendByte value
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3450
>
> Update SmBusSendByte() to write value to Command Register instead of Host
> Data registers.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
> ---
> .../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 +++++++++++++------
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git
> a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
> b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
> index 3d6386d433..dacf9d03b2 100644
> ---
> a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
> +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSm
> +++ busLib.c
> @@ -203,14 +203,24 @@ InternalSmBusNonBlock (
> AuxiliaryControl |= B_SMBUS_IO_AAC;
> }
> //
> - // Set Host Commond Register.
> + // We do not need Data Register for SendByte Command
> //
> - IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HCMD, (UINT8)
> SMBUS_LIB_COMMAND (SmBusAddress));
> - //
> - // Write value to Host Data 0 and Host Data 1 Registers.
> - //
> - IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD0, (UINT8) Value);
> - IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD1, (UINT8) (Value >> 8));
> + if ((HostControl == V_SMBUS_IO_SMB_CMD_BYTE) && ((SmBusAddress &
> BIT0) == B_SMBUS_IO_WRITE)) {
> + //
> + // Set Host Command Register.
> + //
> + IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HCMD, (UINT8)Value); }
> + else {
> + //
> + // Set Host Command Register.
> + //
> + IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HCMD, (UINT8)
> SMBUS_LIB_COMMAND (SmBusAddress));
> + //
> + // Write value to Host Data 0 and Host Data 1 Registers.
> + //
> + IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD0, (UINT8) Value);
> + IoWrite8 (IoPortBaseAddress + R_SMBUS_IO_HD1, (UINT8) (Value >>
> + 8)); }
> //
> // Set Auxiliary Control Regiester.
> //
> --
> 2.31.1.windows.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value
2021-06-10 22:45 [edk2-platforms][Patch 0/3] Fix SmBusSendByte value Michael D Kinney
2021-06-10 22:45 ` [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
@ 2021-06-10 22:45 ` Michael D Kinney
2021-06-11 0:33 ` Chiu, Chasel
2021-06-10 22:45 ` [edk2-platforms][Patch 3/3] QuarkSocPkg/SmbusLib: " Michael D Kinney
2021-06-11 0:16 ` [edk2-platforms][Patch 0/3] " Nate DeSimone
3 siblings, 1 reply; 7+ messages in thread
From: Michael D Kinney @ 2021-06-10 22:45 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3451
Update SmBusSendByte() to write value to Command Register instead of
Host Data registers.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
---
.../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 +++++++++++++------
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
index 5d09e18613..68dc698aaf 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
@@ -201,14 +201,24 @@ InternalSmBusNonBlock (
HostControl |= B_PCH_SMBUS_PEC_EN;
}
//
- // Set Host Commond Register.
+ // We do not need Data Register for SendByte Command
//
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
- //
- // Write value to Host Data 0 and Host Data 1 Registers.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8));
+ if ((HostControl == V_PCH_SMBUS_SMB_CMD_BYTE) && ((SmBusAddress & BIT0) == B_PCH_SMBUS_WRITE)) {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8)Value);
+ } else {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
+ //
+ // Write value to Host Data 0 and Host Data 1 Registers.
+ //
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8));
+ }
//
// Set Auxiliary Control Regiester.
//
--
2.31.1.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value
2021-06-10 22:45 ` [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
@ 2021-06-11 0:33 ` Chiu, Chasel
0 siblings, 0 replies; 7+ messages in thread
From: Chiu, Chasel @ 2021-06-11 0:33 UTC (permalink / raw)
To: Kinney, Michael D, devel@edk2.groups.io; +Cc: Desimone, Nathaniel L
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Kinney, Michael D <michael.d.kinney@intel.com>
> Sent: Friday, June 11, 2021 6:46 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>
> Subject: [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: Fix
> SmBusSendByte value
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3451
>
> Update SmBusSendByte() to write value to Command Register instead of Host
> Data registers.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
> ---
> .../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 +++++++++++++------
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
> index 5d09e18613..68dc698aaf 100644
> ---
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbu
> +++ sLib.c
> @@ -201,14 +201,24 @@ InternalSmBusNonBlock (
> HostControl |= B_PCH_SMBUS_PEC_EN;
> }
> //
> - // Set Host Commond Register.
> + // We do not need Data Register for SendByte Command
> //
> - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8)
> SMBUS_LIB_COMMAND (SmBusAddress));
> - //
> - // Write value to Host Data 0 and Host Data 1 Registers.
> - //
> - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
> - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8));
> + if ((HostControl == V_PCH_SMBUS_SMB_CMD_BYTE) && ((SmBusAddress &
> BIT0) == B_PCH_SMBUS_WRITE)) {
> + //
> + // Set Host Command Register.
> + //
> + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8)Value); }
> + else {
> + //
> + // Set Host Command Register.
> + //
> + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8)
> SMBUS_LIB_COMMAND (SmBusAddress));
> + //
> + // Write value to Host Data 0 and Host Data 1 Registers.
> + //
> + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
> + IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >>
> + 8)); }
> //
> // Set Auxiliary Control Regiester.
> //
> --
> 2.31.1.windows.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [edk2-platforms][Patch 3/3] QuarkSocPkg/SmbusLib: Fix SmBusSendByte value
2021-06-10 22:45 [edk2-platforms][Patch 0/3] Fix SmBusSendByte value Michael D Kinney
2021-06-10 22:45 ` [edk2-platforms][Patch 1/3] CoffeelakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
2021-06-10 22:45 ` [edk2-platforms][Patch 2/3] KabylakeSiliconPkg/BaseSmbusLib: " Michael D Kinney
@ 2021-06-10 22:45 ` Michael D Kinney
2021-06-11 0:16 ` [edk2-platforms][Patch 0/3] " Nate DeSimone
3 siblings, 0 replies; 7+ messages in thread
From: Michael D Kinney @ 2021-06-10 22:45 UTC (permalink / raw)
To: devel; +Cc: Nate DeSimone
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3452
Update SmBusSendByte() to write value to Command Register instead of
Host Data registers.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
---
.../Library/SmbusLib/SmbusLib.c | 27 ++++++++++++-------
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c
index 319e103cf4..34437582d4 100644
--- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c
+++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Library/SmbusLib/SmbusLib.c
@@ -165,15 +165,24 @@ InternalSmBusNonBlock (
}
//
- // Set Host Commond Register.
+ // We do not need Data Register for SendByte Command
//
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
- //
- // Write value to Host Data 0 and Host Data 1 Registers.
- //
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, (UINT8) Value);
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD1, (UINT8) (Value >> 8));
-
+ if ((HostControl == V_QNC_SMBUS_HCTL_CMD_BYTE) && ((SmBusAddress & BIT0) == V_QNC_SMBUS_RW_SEL_WRITE)) {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8)Value);
+ } else {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
+ //
+ // Write value to Host Data 0 and Host Data 1 Registers.
+ //
+ IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, (UINT8) Value);
+ IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD1, (UINT8) (Value >> 8));
+ }
//
// Set SMBUS slave address for the device to send/receive from.
@@ -351,7 +360,7 @@ SmBusSendByte (
return (UINT8) InternalSmBusNonBlock (
V_QNC_SMBUS_HCTL_CMD_BYTE,
- SmBusAddress & V_QNC_SMBUS_RW_SEL_WRITE,
+ SmBusAddress | V_QNC_SMBUS_RW_SEL_WRITE,
Value,
Status
);
--
2.31.1.windows.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [edk2-platforms][Patch 0/3] Fix SmBusSendByte value
2021-06-10 22:45 [edk2-platforms][Patch 0/3] Fix SmBusSendByte value Michael D Kinney
` (2 preceding siblings ...)
2021-06-10 22:45 ` [edk2-platforms][Patch 3/3] QuarkSocPkg/SmbusLib: " Michael D Kinney
@ 2021-06-11 0:16 ` Nate DeSimone
3 siblings, 0 replies; 7+ messages in thread
From: Nate DeSimone @ 2021-06-11 0:16 UTC (permalink / raw)
To: Kinney, Michael D, devel@edk2.groups.io
Cc: Chiu, Chasel, Chaganty, Rangasai V
Hi Mike,
Please remember to update the copyright year on all 3 files. With that change...
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@intel.com>
Sent: Thursday, June 10, 2021 3:46 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [edk2-platforms][Patch 0/3] Fix SmBusSendByte value
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3452
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3451
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3450
Update SmBusSendByte() to write value to Command Register instead of Host Data registers.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Michael D Kinney (3):
CoffeelakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value
KabylakeSiliconPkg/BaseSmbusLib: Fix SmBusSendByte value
QuarkSocPkg/SmbusLib: Fix SmBusSendByte value
.../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 ++++++++++++-----
.../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 ++++++++++++-----
.../Library/SmbusLib/SmbusLib.c | 27 ++++++++++++-------
3 files changed, 52 insertions(+), 23 deletions(-)
--
2.31.1.windows.1
^ permalink raw reply [flat|nested] 7+ messages in thread