From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.6596.1623407671854317976 for ; Fri, 11 Jun 2021 03:34:32 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pranav.madhu@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F026143D; Fri, 11 Jun 2021 03:34:31 -0700 (PDT) Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 443193F694; Fri, 11 Jun 2021 03:34:30 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar Subject: [edk2-platforms][PATCH v2 1/5] Platform/Sgi: Enable PrimeCell GPIO Date: Fri, 11 Jun 2021 16:04:17 +0530 Message-Id: <20210611103421.32518-2-pranav.madhu@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210611103421.32518-1-pranav.madhu@arm.com> References: <20210611103421.32518-1-pranav.madhu@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable The HW-Reduced ACPI model has specific requirements for GPIO controllers. Arm's reference design Platforms has PrimeCell GPIO (PL061) integrated in the RoS subsystem to provide GPIO support. Add GPIO device entry and also add GPIO signalled ACPI event template for reference. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/SgiPlatform.dec | 5 ++ Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 5 ++ Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 5 ++ Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 4 ++ Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf | 5 ++ Platform/ARM/SgiPkg/AcpiTables/SsdtEvents.asl | 67 +++++++++++= +++++++++ 12 files changed, 115 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/Sg= iPlatform.dec index af08ed153eae..e0aabc566d88 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -76,5 +76,10 @@ gArmSgiTokenSpaceGuid.PcdSmmuBase|0|UINT32|0x0000001D gArmSgiTokenSpaceGuid.PcdSmmuSize|0|UINT32|0x0000001E =20 + # GPIO Controller + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress|0|UINT32|0x0000001= F + gArmSgiTokenSpaceGuid.PcdGpioController0Size|0|UINT32|0x00000020 + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt|0|UINT32|0x00000021 + [Ppis] gNtFwConfigDtInfoPpiGuid =3D { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8,= 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } } diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc b/Platform/ARM/SgiP= kg/SgiMemoryMap.dsc.inc index d3d650323891..a567af8537ec 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc @@ -54,3 +54,8 @@ # SMMU gArmSgiTokenSpaceGuid.PcdSmmuBase|0x4F000000 gArmSgiTokenSpaceGuid.PcdSmmuSize|0x01000000 + + # GPIO Controller + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress|0x1C1D0000 + gArmSgiTokenSpaceGuid.PcdGpioController0Size|0x00010000 + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt|136 diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc b/Platform/ARM/Sgi= Pkg/SgiMemoryMap2.dsc.inc index c593156e17be..5c137c0991e7 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc @@ -54,3 +54,8 @@ # SMMU gArmSgiTokenSpaceGuid.PcdSmmuBase|0x40000000 gArmSgiTokenSpaceGuid.PcdSmmuSize|0x10000000 + + # GPIO controller + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress|0x0C1D0000 + gArmSgiTokenSpaceGuid.PcdGpioController0Size|0x00010000 + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt|392 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Plat= form/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf index 04ef2bfcaa26..56b80f418398 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf @@ -26,6 +26,7 @@ RdE1Edge/Pptt.aslc Spcr.aslc Ssdt.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -51,6 +52,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Plat= form/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf index eecb64186473..fa6692bc86f6 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf @@ -26,6 +26,7 @@ RdN1Edge/Pptt.aslc Spcr.aslc Ssdt.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -51,6 +52,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Pl= atform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf index 617519d9dd38..d0ee125fa1de 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf @@ -28,6 +28,7 @@ RdN1EdgeX2/Srat.aslc Spcr.aslc Ssdt.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -60,6 +61,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf index c1282a3422ab..232b58eb012f 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -26,6 +26,7 @@ Spcr.aslc Ssdt.asl SsdtRos.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -51,6 +52,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Plat= form/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf index 58468096de4f..5713ef1ce3a9 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf @@ -26,6 +26,7 @@ Spcr.aslc Ssdt.asl SsdtRos.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -51,6 +52,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdSmmuBase diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf index a3e558cf1535..e7b702962abe 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf @@ -26,6 +26,7 @@ RdV1/Pptt.aslc Spcr.aslc Ssdt.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -51,6 +52,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf index ffda4f925b19..901391fba70e 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf @@ -28,6 +28,7 @@ RdV1Mc/Srat.aslc Spcr.aslc Ssdt.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -60,6 +61,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf index b1ee16e98ea3..d59aefde735b 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf @@ -25,6 +25,8 @@ Sgi575/Pptt.aslc Spcr.aslc Ssdt.asl + SsdtRos.asl + SsdtEvents.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -50,6 +52,9 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress + gArmSgiTokenSpaceGuid.PcdGpioController0Size + gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtEvents.asl b/Platform/ARM= /SgiPkg/AcpiTables/SsdtEvents.asl new file mode 100644 index 000000000000..28c7ce4e7f3c --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtEvents.asl @@ -0,0 +1,67 @@ +/** @file + Secondary System Description Table (SSDT) for hardware reduced events. + + Arm Reference Design platforms implement the HW-Reduced ACPI model and= do not + support legacy ACPI Fixed Hardware interfaces. + + GPIO Signalled ACPI event is one of the methods for signalling events = in + HW-Reduced ACPI model. In this method, ACPI events can be signaled whe= n a GPIO + Interrupt is received by OSPM and that GPIO Interrupt Connection is li= sted in + a GPIO controller device=E2=80=99s _AEI object. + + Copyright (c) 2021, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - ACPI 6.4, Chapter 5.6.5, GPIO-signaled ACPI Events + - Arm Base Boot Requirements 1.0, Issue F, Chapter 8.5.3, GPIO contr= ollers +**/ + +#include "SgiAcpiHeader.h" + +DefinitionBlock("SsdtEvent.aml", "SSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI= _ARM_OEM_REVISION) { + /* GPIO Controller 0 device. Use _AEI object to configure pin 0 for + signalling HW-Reduced events and the _L00 method to handle the even= t + generated by pin 0. + */ + Device (\_SB.GPI0) + { + Name (_HID, "ARMH0061") /* PrimeCell GPIO */ + Name (_UID, 0) + + /* Resource setting for GPIO controller 0 */ + Name (_CRS, ResourceTemplate () { + Memory32Fixed ( + ReadWrite, + FixedPcdGet32 (PcdGpioController0BaseAddress), + FixedPcdGet32 (PcdGpioController0Size) + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { + FixedPcdGet32 (PcdGpioController0Interrupt) + } + }) + + /* ACPI Event information for GPIO controller 0 */ + Name (_AEI, ResourceTemplate() { + GpioInt (Level, ActiveHigh, Exclusive, PullDown, , "\\_SB.GPI0") {= 0} + }) + + /* Event handler for pin0 */ + Method (_L00) { + Printf ("GPIO0 Pin0 Toggled") + Store (1, INC0) + } + + /* Mapping for interrupt clear register */ + OperationRegion ( + GIO0, + SystemMemory, + FixedPcdGet32 (PcdGpioController0BaseAddress), + FixedPcdGet32 (PcdGpioController0Size) + ) + Field (GIO0, ByteAcc, NoLock, Preserve) { + Offset (0x41C), /* WO Intr clear on writing 1 to resp bit */ + INC0, 8 + } + } +} --=20 2.17.1