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From: "Marcin Wojtas" <mw@semihalf.com>
To: devel@edk2.groups.io
Cc: leif@nuviainc.com, ardb+tianocore@kernel.org, jaz@semihalf.com,
	gjb@semihalf.com, upstream@semihalf.com,
	Samer.El-Haj-Mahmoud@arm.com, jon@solid-run.com,
	Marcin Wojtas <mw@semihalf.com>
Subject: [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description
Date: Sun, 13 Jun 2021 20:16:28 +0200	[thread overview]
Message-ID: <20210613181631.2247221-2-mw@semihalf.com> (raw)
In-Reply-To: <20210613181631.2247221-1-mw@semihalf.com>

As the MDIO ACPI binding in DSDT is now established,
add description for the SMI and XSMI controllers, along
with the 10G and 1G PHYs.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
index bdc32983d3..d26945d933 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
@@ -228,6 +228,56 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
             })
         }
 
+        Device (SMI0)
+        {
+            Name (_HID, "MRVL0100")                             // _HID: Hardware ID
+            Name (_UID, 0x00)                                   // _UID: Unique ID
+            Name (_CRS, ResourceTemplate ()
+            {
+                Memory32Fixed (ReadWrite,
+                    0xf212a200,                                 // Address Base
+                    0x00000010,                                 // Address Length
+                    )
+            })
+            Device (PHY0)
+            {
+                Name (_ADR, 0x0)
+            }
+        }
+
+        Device (XSMI)
+        {
+            Name (_HID, "MRVL0101")                             // _HID: Hardware ID
+            Name (_UID, 0x00)                                   // _UID: Unique ID
+            Name (_CRS, ResourceTemplate ()
+            {
+                Memory32Fixed (ReadWrite,
+                    0xf212a600,                                 // Address Base
+                    0x00000010,                                 // Address Length
+                    )
+            })
+            Device (PHY0)
+            {
+                Name (_ADR, 0x0)
+                Name (_DSD, Package () {
+                    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                    Package () {
+                        Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
+                    }
+                })
+            }
+            Device (PHY8)
+            {
+                Name (_ADR, 0x8)
+                Name (_DSD, Package () {
+                    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                    Package () {
+                        Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
+                    }
+                })
+            }
+        }
+
         Device (PP20)
         {
             Name (_HID, "MRVL0110")                             // _HID: Hardware ID
@@ -261,6 +311,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
                     Package () { "port-id", 0 },
                     Package () { "gop-port-id", 0 },
                     Package () { "phy-mode", "10gbase-kr"},
+                    Package () { "phy-handle", \_SB.XSMI.PHY0},
                   }
               })
             }
@@ -299,6 +350,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
                     Package () { "port-id", 0 },
                     Package () { "gop-port-id", 0 },
                     Package () { "phy-mode", "10gbase-kr"},
+                    Package () { "phy-handle", \_SB.XSMI.PHY8},
                   }
               })
             }
@@ -318,6 +370,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
                     Package () { "port-id", 1 },
                     Package () { "gop-port-id", 2 },
                     Package () { "phy-mode", "sgmii"},
+                    Package () { "phy-handle", \_SB.SMI0.PHY0},
                   }
               })
             }
-- 
2.29.0


  reply	other threads:[~2021-06-13 18:17 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-13 18:16 [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Marcin Wojtas
2021-06-13 18:16 ` Marcin Wojtas [this message]
2021-07-09  5:51   ` [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description Grzegorz Bernacki
2021-06-13 18:16 ` [edk2-platforms PATCH 2/4] Marvell/Cn913xDb: " Marcin Wojtas
2021-07-09  5:36   ` Grzegorz Bernacki
2021-06-13 18:16 ` [edk2-platforms PATCH 3/4] Marvell/Armada70x0Db: " Marcin Wojtas
2021-06-13 18:16 ` [edk2-platforms PATCH 4/4] Marvell/Armada80x0Db: " Marcin Wojtas
2021-06-14 21:55 ` [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Leif Lindholm
2021-06-15  4:10   ` Jon Nettleton
2021-06-29 14:17   ` Marcin Wojtas
2021-07-12 10:51     ` Marcin Wojtas
2021-07-12 11:17       ` Jon Nettleton
2021-07-16 17:32         ` Ard Biesheuvel
2021-07-19  7:27           ` Ard Biesheuvel
2021-07-19  9:34             ` Marcin Wojtas

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