Re: [PATCH V1 2/4] Silicon/NXP: Add support of SVR handling for LS1046FRWY

["Leif Lindholm" <leif@nuviainc.com>]

On Fri, Jun 11, 2021 at 21:21:58 +0530, Vikas Singh wrote:
> This change set intend to add a generic method to get

Does it intend to add, or does it add?

/
    Leif

> access to SoC's Silicon Version Register (SVR) and its
> handling for LS1046aFrwy platform.
> 
> Signed-off-by: Vikas Singh <vikas.singh@puresoftware.com>
> ---
>  Silicon/NXP/LS1046A/Library/SocLib/SocLib.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
> index 8fa6a7dd00..003f5bd82f 100644
> --- a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
> +++ b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c
> @@ -2,6 +2,7 @@
>    SoC specific Library containg functions to initialize various SoC components
>  
>    Copyright 2017-2020 NXP
> +  Copyright 2021 Puresoftware Ltd
>  
>    SPDX-License-Identifier: BSD-2-Clause-Patent
>  
> @@ -64,6 +65,21 @@ SocGetClock (
>    return ReturnValue;
>  }
>  
> +/**
> +  Function to get SoC's System Version Register(SVR)
> + **/
> +UINT32
> +SocGetSvr (
> +  VOID
> +  )
> +{
> +  LS1046A_DEVICE_CONFIG  *Dcfg;
> +
> +  Dcfg = (LS1046A_DEVICE_CONFIG  *)LS1046A_DCFG_ADDRESS;
> +
> +  return DcfgRead32 ((UINTN)&Dcfg->Svr);
> +}
> +
>  /**
>     Function to select pins depending upon pcd using supplemental
>     configuration unit(SCFG) extended RCW controlled pinmux control
> -- 
> 2.25.1
>