From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) by mx.groups.io with SMTP id smtpd.web11.590.1623704375723857314 for ; Mon, 14 Jun 2021 13:59:36 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=sVcOJPS/; spf=pass (domain: nuviainc.com, ip: 209.85.128.41, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f41.google.com with SMTP id t4-20020a1c77040000b029019d22d84ebdso275447wmi.3 for ; Mon, 14 Jun 2021 13:59:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=K3A1cCEkHTybdr7V6gvK5m/01gzu8DA72gaZ7WVFFgs=; b=sVcOJPS/4cdPl1PY26VovipNxqcy7e0W8IABwQcMx7D3oedlXE30LFhhYti+Foo+D3 5bxvXcWClgD+LzqMP6CSjyKwmG03Pc1JyuDQpO8GuJ1cfEepqHmu6uaE1ZoatL3em2cs 9okUeAw7dcB+Qome+Q5mqQawh8utQb/HZ+rw4yi4R8PmGcD4bfcHcquxHEn13QgC7nC7 EXu77PjjJfTOSMTr7LtXMfLTBlhlg+Q0wsXGi1RDkUKGza7QhsIICloVED6SSjpX8mHJ AybUHJvkemC4+Br5eSpM1OT7dSYz/HyZZOa7m9f2vggDFxLSQ5d64hi0i+6lrAjTCLZS kxpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=K3A1cCEkHTybdr7V6gvK5m/01gzu8DA72gaZ7WVFFgs=; b=UfdEiNXW4E8YTLVqpQIG4H+BCGytcpcFQv8UJMRUllD3sjkvxuMzaSEmjc7lKeWhNv +3bfyaFDKVin6K60Zl/0DLPiGNcIOZxIhnPmnuNHFqp4pnXxa9XB9GEQjbIM+cWO74zu ujp2Kbb3/MXTyNBbpL6IDr5tBqs1skgN4S5VDLiVqg/6iSxHj7QCDdK1M/xU6V2Ra5ky S41FojDR3culUuRhUEpZJiaC+1MYpRWPGR8n4LEXu9qgMavLOkX8QshGhUR6+7duedNa U3gmUW2eJHHPkZR+u6sOcbQi90tiaUx1vYPm/Ds2s2v9XZdnNR8J1Ze5ZVUDHAmhnGrW H+ew== X-Gm-Message-State: AOAM531gQwnteqIWKKRSMnMBgszaHZM3e339IgWtXrDr6CI7qg0DE5JO z+/3mKHSwa4eA2ZhzOdg6V8x9w== X-Google-Smtp-Source: ABdhPJymZtTL8r23lB+1F9dGLG1GD5hq1fd9l9AUI4dM6D3/rYIRdirG3rPTnnPeAHSyGGtbLV8OTQ== X-Received: by 2002:a05:600c:2284:: with SMTP id 4mr1105737wmf.148.1623704374193; Mon, 14 Jun 2021 13:59:34 -0700 (PDT) Return-Path: Received: from leviathan (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id m132sm14192111wmf.10.2021.06.14.13.59.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Jun 2021 13:59:33 -0700 (PDT) Date: Mon, 14 Jun 2021 21:59:31 +0100 From: "Leif Lindholm" To: Vikas Singh Cc: devel@edk2.groups.io, sami.mujawar@arm.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: Re: [PATCH V1 2/4] Silicon/NXP: Add support of SVR handling for LS1046FRWY Message-ID: <20210614205931.it7nmbsqltxyuytd@leviathan> References: <20210611155200.15535-1-vikas.singh@puresoftware.com> <20210611155200.15535-3-vikas.singh@puresoftware.com> MIME-Version: 1.0 In-Reply-To: <20210611155200.15535-3-vikas.singh@puresoftware.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Jun 11, 2021 at 21:21:58 +0530, Vikas Singh wrote: > This change set intend to add a generic method to get Does it intend to add, or does it add? / Leif > access to SoC's Silicon Version Register (SVR) and its > handling for LS1046aFrwy platform. > > Signed-off-by: Vikas Singh > --- > Silicon/NXP/LS1046A/Library/SocLib/SocLib.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c > index 8fa6a7dd00..003f5bd82f 100644 > --- a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c > +++ b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c > @@ -2,6 +2,7 @@ > SoC specific Library containg functions to initialize various SoC components > > Copyright 2017-2020 NXP > + Copyright 2021 Puresoftware Ltd > > SPDX-License-Identifier: BSD-2-Clause-Patent > > @@ -64,6 +65,21 @@ SocGetClock ( > return ReturnValue; > } > > +/** > + Function to get SoC's System Version Register(SVR) > + **/ > +UINT32 > +SocGetSvr ( > + VOID > + ) > +{ > + LS1046A_DEVICE_CONFIG *Dcfg; > + > + Dcfg = (LS1046A_DEVICE_CONFIG *)LS1046A_DCFG_ADDRESS; > + > + return DcfgRead32 ((UINTN)&Dcfg->Svr); > +} > + > /** > Function to select pins depending upon pcd using supplemental > configuration unit(SCFG) extended RCW controlled pinmux control > -- > 2.25.1 >