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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jun 2021 16:36:50.9277 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 605bf9f3-0684-4542-00d9-08d9301bc6f6 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT013.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR08MB2988 Content-Type: text/plain Bugzilla: 3458 - Add support IORT Rev E.b specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E and Rev E.a: - increments the IORT table revision to 3. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. Therefore, update the IORT header file to reflect these changes. Signed-off-by: Sami Mujawar --- MdePkg/Include/IndustryStandard/IoRemappingTable.h | 67 ++++++++++++++++++-- 1 file changed, 60 insertions(+), 7 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h index 731217441438a00dd5ff0bedf2010598d48d6dbf..c6f3e7bc321ea7d85e576b2fe3c2889422477506 100644 --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h @@ -1,12 +1,19 @@ /** @file - ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D - - http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf + ACPI IO Remapping Table (IORT) definitions. Copyright (c) 2017, Linaro Limited. All rights reserved.
- Copyright (c) 2018, ARM Limited. All rights reserved.
+ Copyright (c) 2018 - 2021, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s): + - IO Remapping Table, Platform Design Document, Revision E.b, Feb 2021 + (https://developer.arm.com/documentation/den0049/) + + @par Glossary: + - Ref : Reference + - Mem : Memory + - Desc : Descriptor **/ #ifndef IO_REMAPPING_TABLE_H_ @@ -14,7 +21,9 @@ #include -#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0 +#define EFI_ACPI_IO_REMAPPING_TABLE_REV0 0x0 +#define EFI_ACPI_IO_REMAPPING_TABLE_REV3 0x3 +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION EFI_ACPI_IO_REMAPPING_TABLE_REV3 #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 @@ -22,6 +31,7 @@ #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 #define EFI_ACPI_IORT_TYPE_PMCG 0x5 +#define EFI_ACPI_IORT_TYPE_RMR 0x6 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 @@ -55,7 +65,16 @@ #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0 -#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1 +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED BIT0 + +#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_UNSUPPORTED 0x0 +#define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_SUPPORTED BIT1 + +#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_UNSUPPORTED 0x0 +#define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_SUPPORTED BIT2 + +#define EFI_ACPI_IORT_RMR_REMAP_NOT_PERMITTED 0x0 +#define EFI_ACPI_IORT_RMR_REMAP_PERMITTED BIT0 #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0 @@ -89,7 +108,7 @@ typedef struct { UINT8 Type; UINT16 Length; UINT8 Revision; - UINT32 Reserved; + UINT32 Identifier; UINT32 NumIdMappings; UINT32 IdReference; } EFI_ACPI_6_0_IO_REMAPPING_NODE; @@ -198,6 +217,40 @@ typedef struct { //EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1]; } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE; +/// +/// Memory Range Descriptor. +/// +typedef struct { + /// Base address of Reserved Memory Range, + /// aligned to a page size of 64K. + UINT64 Base; + + /// Length of the Reserved Memory range. + /// Must be a multiple of the page size of 64K. + UINT64 Length; + + /// Reserved, must be zero. + UINT32 Reserved; +} EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC; + +/// +/// Node type 6: Reserved Memory Range (RMR) node +/// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + /// RMR flags + UINT32 Flags; + + /// Memory range descriptor count. + UINT32 NumMemRangeDesc; + + /// Offset of the memory range descriptor array. + UINT32 MemRangeDescRef; +// EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE IdMapping[1]; +// EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC MemRangeDesc[1]; +} EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE; + #pragma pack() #endif -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'