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From: "Brijesh Singh" <brijesh.singh@amd.com>
To: devel@edk2.groups.io
Cc: James Bottomley <jejb@linux.ibm.com>, Min Xu <min.m.xu@intel.com>,
	Jiewen Yao <jiewen.yao@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Jordan Justen <jordan.l.justen@intel.com>,
	Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Laszlo Ersek <lersek@redhat.com>,
	Erdem Aktas <erdemaktas@google.com>,
	Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Rahul Kumar <rahul1.kumar@intel.com>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Liming Gao <gaoliming@byosoft.com.cn>,
	Zhiguang Liu <zhiguang.liu@intel.com>,
	Michael Roth <Michael.Roth@amd.com>,
	Brijesh Singh <brijesh.singh@amd.com>
Subject: [RFC PATCH v4 10/27] OvmfPkg/MemEncryptSevLib: add MemEncryptSevSnpEnabled()
Date: Mon, 28 Jun 2021 12:42:06 -0500	[thread overview]
Message-ID: <20210628174223.1302-11-brijesh.singh@amd.com> (raw)
In-Reply-To: <20210628174223.1302-1-brijesh.singh@amd.com>

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Create a function that can be used to determine if VM is running as an
SEV-SNP guest.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
 OvmfPkg/Include/Library/MemEncryptSevLib.h    | 12 +++++++++
 .../DxeMemEncryptSevLibInternal.c             | 27 +++++++++++++++++++
 .../PeiMemEncryptSevLibInternal.c             | 27 +++++++++++++++++++
 .../SecMemEncryptSevLibInternal.c             | 19 +++++++++++++
 4 files changed, 85 insertions(+)

diff --git a/OvmfPkg/Include/Library/MemEncryptSevLib.h b/OvmfPkg/Include/Library/MemEncryptSevLib.h
index 76d06c206c8b..2425d8ba0a36 100644
--- a/OvmfPkg/Include/Library/MemEncryptSevLib.h
+++ b/OvmfPkg/Include/Library/MemEncryptSevLib.h
@@ -66,6 +66,18 @@ typedef enum {
   MemEncryptSevAddressRangeError,
 } MEM_ENCRYPT_SEV_ADDRESS_RANGE_STATE;
 
+/**
+  Returns a boolean to indicate whether SEV-SNP is enabled
+
+  @retval TRUE           SEV-SNP is enabled
+  @retval FALSE          SEV-SNP is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevSnpIsEnabled (
+  VOID
+  );
+
 /**
   Returns a boolean to indicate whether SEV-ES is enabled.
 
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c
index 2816f859a0c4..057129723824 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c
@@ -19,6 +19,7 @@
 
 STATIC BOOLEAN mSevStatus = FALSE;
 STATIC BOOLEAN mSevEsStatus = FALSE;
+STATIC BOOLEAN mSevSnpStatus = FALSE;
 STATIC BOOLEAN mSevStatusChecked = FALSE;
 
 STATIC UINT64  mSevEncryptionMask = 0;
@@ -82,11 +83,37 @@ InternalMemEncryptSevStatus (
     if (Msr.Bits.SevEsBit) {
       mSevEsStatus = TRUE;
     }
+
+    //
+    // Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
+    //
+    if (Msr.Bits.SevSnpBit) {
+      mSevSnpStatus = TRUE;
+    }
   }
 
   mSevStatusChecked = TRUE;
 }
 
+/**
+  Returns a boolean to indicate whether SEV-SNP is enabled.
+
+  @retval TRUE           SEV-SNP is enabled
+  @retval FALSE          SEV-SNP is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevSnpIsEnabled (
+  VOID
+  )
+{
+  if (!mSevStatusChecked) {
+    InternalMemEncryptSevStatus ();
+  }
+
+  return mSevSnpStatus;
+}
+
 /**
   Returns a boolean to indicate whether SEV-ES is enabled.
 
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c
index e2fd109d120f..b561f211f577 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c
@@ -19,6 +19,7 @@
 
 STATIC BOOLEAN mSevStatus = FALSE;
 STATIC BOOLEAN mSevEsStatus = FALSE;
+STATIC BOOLEAN mSevSnpStatus = FALSE;
 STATIC BOOLEAN mSevStatusChecked = FALSE;
 
 STATIC UINT64  mSevEncryptionMask = 0;
@@ -82,11 +83,37 @@ InternalMemEncryptSevStatus (
     if (Msr.Bits.SevEsBit) {
       mSevEsStatus = TRUE;
     }
+
+    //
+    // Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
+    //
+    if (Msr.Bits.SevSnpBit) {
+      mSevSnpStatus = TRUE;
+    }
   }
 
   mSevStatusChecked = TRUE;
 }
 
+/**
+  Returns a boolean to indicate whether SEV-SNP is enabled.
+
+  @retval TRUE           SEV-SNP is enabled
+  @retval FALSE          SEV-SNP is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevSnpIsEnabled (
+  VOID
+  )
+{
+  if (!mSevStatusChecked) {
+    InternalMemEncryptSevStatus ();
+  }
+
+  return mSevSnpStatus;
+}
+
 /**
   Returns a boolean to indicate whether SEV-ES is enabled.
 
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c
index 56d8f3f3183f..69852779e2ff 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c
@@ -62,6 +62,25 @@ InternalMemEncryptSevStatus (
   return ReadSevMsr ? AsmReadMsr32 (MSR_SEV_STATUS) : 0;
 }
 
+/**
+  Returns a boolean to indicate whether SEV-SNP is enabled.
+
+  @retval TRUE           SEV-SNP is enabled
+  @retval FALSE          SEV-SNP is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevSnpIsEnabled (
+  VOID
+  )
+{
+  MSR_SEV_STATUS_REGISTER           Msr;
+
+  Msr.Uint32 = InternalMemEncryptSevStatus ();
+
+  return Msr.Bits.SevSnpBit ? TRUE : FALSE;
+}
+
 /**
   Returns a boolean to indicate whether SEV-ES is enabled.
 
-- 
2.17.1


  parent reply	other threads:[~2021-06-28 17:43 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-28 17:41 [RFC PATCH v4 00/27] Add AMD Secure Nested Paging (SEV-SNP) support Brijesh Singh
2021-06-28 17:41 ` [RFC PATCH v4 01/27] OvmfPkg/ResetVector: move SEV specific code in a separate file Brijesh Singh
2021-06-28 17:41 ` [RFC PATCH v4 02/27] OvmfPkg/ResetVector: add the macro to invoke MSR protocol based VMGEXIT Brijesh Singh
2021-06-29 18:06   ` Brijesh Singh
2021-06-28 17:41 ` [RFC PATCH v4 03/27] OvmfPkg/ResetVector: add the macro to request guest termination Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 04/27] OvmfPkg: reserve SNP secrets page Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 05/27] OvmfPkg: reserve CPUID page for SEV-SNP Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 06/27] OvmfPkg/ResetVector: introduce SEV-SNP boot block GUID Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 07/27] OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 08/27] OvmfPkg/ResetVector: invalidate the GHCB page Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 09/27] UefiCpuPkg: Define the SEV-SNP specific dynamic PCDs Brijesh Singh
2021-06-28 17:42 ` Brijesh Singh [this message]
2021-06-28 17:42 ` [RFC PATCH v4 11/27] OvmfPkg/SecMain: register GHCB gpa for the SEV-SNP guest Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 12/27] OvmfPkg/PlatformPei: " Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 13/27] OvmfPkg/AmdSevDxe: do not use extended PCI config space Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 14/27] OvmfPkg/MemEncryptSevLib: add support to validate system RAM Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 15/27] OvmfPkg/BaseMemEncryptSevLib: skip the pre-validated " Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 16/27] OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 17/27] OvmfPkg/SecMain: pre-validate the memory used for decompressing Fv Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 18/27] OvmfPkg/PlatformPei: validate the system RAM when SNP is active Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 19/27] OvmfPkg/PlatformPei: set the SEV-SNP enabled PCD Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 20/27] OvmfPkg/PlatformPei: set the Hypervisor Features PCD Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 21/27] MdePkg/GHCB: increase the GHCB protocol max version Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 22/27] UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 23/27] OvmfPkg/MemEncryptSevLib: change the page state in the RMP table Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 24/27] OvmfPkg/MemEncryptSevLib: skip page state change for Mmio address Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 25/27] UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 26/27] OvmfPkg/PlatformPei: mark cpuid and secrets memory reserved in EFI map Brijesh Singh
2021-06-28 17:42 ` [RFC PATCH v4 27/27] OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table Brijesh Singh
2021-07-28  8:16 ` [RFC PATCH v4 00/27] Add AMD Secure Nested Paging (SEV-SNP) support Yao, Jiewen
2021-07-28 15:22   ` Brijesh Singh
2021-07-28 16:38     ` [edk2-devel] " Yao, Jiewen
2021-07-29  2:22       ` Yao, Jiewen
2021-08-03 15:01         ` Brijesh Singh
2021-08-04 13:16           ` Yao, Jiewen

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