From: "Brijesh Singh" <brijesh.singh@amd.com>
To: devel@edk2.groups.io
Cc: James Bottomley <jejb@linux.ibm.com>, Min Xu <min.m.xu@intel.com>,
Jiewen Yao <jiewen.yao@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Jordan Justen <jordan.l.justen@intel.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Laszlo Ersek <lersek@redhat.com>,
Erdem Aktas <erdemaktas@google.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Zhiguang Liu <zhiguang.liu@intel.com>,
Michael Roth <Michael.Roth@amd.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [RFC PATCH v5 03/28] OvmfPkg/ResetVector: add the macro to request guest termination
Date: Wed, 30 Jun 2021 07:52:56 -0500 [thread overview]
Message-ID: <20210630125321.30278-4-brijesh.singh@amd.com> (raw)
In-Reply-To: <20210630125321.30278-1-brijesh.singh@amd.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
The upcoming SEV-SNP support will need to make a few additional guest
termination requests depending on the failure type. Let's move the logic
to request the guest termination into a macro to keep the code readable.
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
OvmfPkg/ResetVector/Ia32/AmdSev.asm | 87 +++++++++++++++--------------
1 file changed, 45 insertions(+), 42 deletions(-)
diff --git a/OvmfPkg/ResetVector/Ia32/AmdSev.asm b/OvmfPkg/ResetVector/Ia32/AmdSev.asm
index 2c478cda314b..c4c00056f9f3 100644
--- a/OvmfPkg/ResetVector/Ia32/AmdSev.asm
+++ b/OvmfPkg/ResetVector/Ia32/AmdSev.asm
@@ -39,6 +39,13 @@ BITS 32
%define SEV_GHCB_MSR 0xc0010130
%define SEV_STATUS_MSR 0xc0010131
+; The #VC was not for CPUID
+%define TERM_VC_NOT_CPUID 1
+
+; The unexpected response code
+%define TERM_UNEXPECTED_RESP_CODE 2
+
+
; Macro is used to issue the MSR protocol based VMGEXIT. The caller is
; responsible to populate values in the EDX:EAX registers. After the vmmcall
; returns, it verifies that the response code matches with the expected
@@ -74,6 +81,43 @@ BITS 32
jne SevEsUnexpectedRespTerminate
%endmacro
+; Macro to terminate the guest using the VMGEXIT.
+; arg 1: reason code
+%macro TerminateVmgExit 1
+ mov eax, %1
+ ;
+ ; Use VMGEXIT to request termination. At this point the reason code is
+ ; located in EAX, so shift it left 16 bits to the proper location.
+ ;
+ ; EAX[11:0] => 0x100 - request termination
+ ; EAX[15:12] => 0x1 - OVMF
+ ; EAX[23:16] => 0xXX - REASON CODE
+ ;
+ shl eax, 16
+ or eax, 0x1100
+ xor edx, edx
+ mov ecx, SEV_GHCB_MSR
+ wrmsr
+ ;
+ ; Issue VMGEXIT - NASM doesn't support the vmmcall instruction in 32-bit
+ ; mode, so work around this by temporarily switching to 64-bit mode.
+ ;
+BITS 64
+ rep vmmcall
+BITS 32
+
+ ;
+ ; We shouldn't come back from the VMGEXIT, but if we do, just loop.
+ ;
+%%TerminateHlt:
+ hlt
+ jmp %%TerminateHlt
+%endmacro
+
+; Terminate the guest due to unexpected response code.
+SevEsUnexpectedRespTerminate:
+ TerminateVmgExit TERM_UNEXPECTED_RESP_CODE
+
; Check if Secure Encrypted Virtualization (SEV) features are enabled.
;
; Register usage is tight in this routine, so multiple calls for the
@@ -228,48 +272,7 @@ SevEsDisabled:
;
SevEsIdtNotCpuid:
- ;
- ; Use VMGEXIT to request termination.
- ; 1 - #VC was not for CPUID
- ;
- mov eax, 1
- jmp SevEsIdtTerminate
-
-SevEsUnexpectedRespTerminate:
- ;
- ; Use VMGEXIT to request termination.
- ; 2 - Unexpected Response is received
- ;
- mov eax, 2
-
-SevEsIdtTerminate:
- ;
- ; Use VMGEXIT to request termination. At this point the reason code is
- ; located in EAX, so shift it left 16 bits to the proper location.
- ;
- ; EAX[11:0] => 0x100 - request termination
- ; EAX[15:12] => 0x1 - OVMF
- ; EAX[23:16] => 0xXX - REASON CODE
- ;
- shl eax, 16
- or eax, 0x1100
- xor edx, edx
- mov ecx, SEV_GHCB_MSR
- wrmsr
- ;
- ; Issue VMGEXIT - NASM doesn't support the vmmcall instruction in 32-bit
- ; mode, so work around this by temporarily switching to 64-bit mode.
- ;
-BITS 64
- rep vmmcall
-BITS 32
-
- ;
- ; We shouldn't come back from the VMGEXIT, but if we do, just loop.
- ;
-SevEsIdtHlt:
- hlt
- jmp SevEsIdtHlt
+ TerminateVmgExit TERM_VC_NOT_CPUID
iret
;
--
2.17.1
next prev parent reply other threads:[~2021-06-30 12:54 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-30 12:52 [RFC PATCH v5 00/28] Add AMD Secure Nested Paging (SEV-SNP) support Brijesh Singh
2021-06-30 12:52 ` [RFC PATCH v5 01/28] OvmfPkg/ResetVector: move SEV specific code in a separate file Brijesh Singh
2021-06-30 12:52 ` [RFC PATCH v5 02/28] OvmfPkg/ResetVector: add the macro to invoke MSR protocol based VMGEXIT Brijesh Singh
2021-06-30 12:52 ` Brijesh Singh [this message]
2021-06-30 12:52 ` [RFC PATCH v5 04/28] OvmfPkg: reserve SNP secrets page Brijesh Singh
2021-06-30 12:52 ` [RFC PATCH v5 05/28] OvmfPkg: reserve CPUID page for SEV-SNP Brijesh Singh
2021-06-30 12:52 ` [RFC PATCH v5 06/28] OvmfPkg/ResetVector: introduce SEV-SNP boot block GUID Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 07/28] OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase Brijesh Singh
2021-07-31 8:44 ` Erdem Aktas
2021-08-03 15:10 ` Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 08/28] OvmfPkg/ResetVector: invalidate the GHCB page Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 09/28] OvmfPkg/ResetVector: check the vmpl level Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 10/28] UefiCpuPkg: Define the SEV-SNP specific dynamic PCDs Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 11/28] OvmfPkg/MemEncryptSevLib: add MemEncryptSevSnpEnabled() Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 12/28] OvmfPkg/SecMain: register GHCB gpa for the SEV-SNP guest Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 13/28] OvmfPkg/PlatformPei: " Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 14/28] OvmfPkg/AmdSevDxe: do not use extended PCI config space Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 15/28] OvmfPkg/MemEncryptSevLib: add support to validate system RAM Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 16/28] OvmfPkg/BaseMemEncryptSevLib: skip the pre-validated " Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 17/28] OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 18/28] OvmfPkg/SecMain: pre-validate the memory used for decompressing Fv Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 19/28] OvmfPkg/PlatformPei: validate the system RAM when SNP is active Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 20/28] OvmfPkg/PlatformPei: set the SEV-SNP enabled PCD Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 21/28] OvmfPkg/PlatformPei: set the Hypervisor Features PCD Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 22/28] MdePkg/GHCB: increase the GHCB protocol max version Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 23/28] UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 24/28] OvmfPkg/MemEncryptSevLib: change the page state in the RMP table Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 25/28] OvmfPkg/MemEncryptSevLib: skip page state change for Mmio address Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 26/28] UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 27/28] OvmfPkg/PlatformPei: mark cpuid and secrets memory reserved in EFI map Brijesh Singh
2021-06-30 12:53 ` [RFC PATCH v5 28/28] OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table Brijesh Singh
2021-08-27 7:33 ` [edk2-devel] [RFC PATCH v5 00/28] Add AMD Secure Nested Paging (SEV-SNP) support Gerd Hoffmann
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