From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web09.2667.1626136921759861747 for ; Mon, 12 Jul 2021 17:42:01 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.93, mailfrom: nathaniel.l.desimone@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10043"; a="207059518" X-IronPort-AV: E=Sophos;i="5.84,235,1620716400"; d="scan'208";a="207059518" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2021 17:41:58 -0700 X-IronPort-AV: E=Sophos;i="5.84,235,1620716400"; d="scan'208";a="653422949" Received: from nldesimo-desk1.amr.corp.intel.com ([10.212.211.135]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2021 17:41:54 -0700 From: "Nate DeSimone" To: devel@edk2.groups.io Cc: Isaac Oram , Mohamed Abbas , Chasel Chiu , Michael D Kinney , Liming Gao , Eric Dong , Michael Kubacki Subject: [edk2-platforms] [PATCH V1 09/17] WhitleySiliconPkg: Add SiliconPolicyInit Date: Mon, 12 Jul 2021 17:41:23 -0700 Message-Id: <20210713004131.1782-10-nathaniel.l.desimone@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: <20210713004131.1782-1-nathaniel.l.desimone@intel.com> References: <20210713004131.1782-1-nathaniel.l.desimone@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Signed-off-by: Nate DeSimone Co-authored-by: Isaac Oram Co-authored-by: Mohamed Abbas Cc: Chasel Chiu Cc: Michael D Kinney Cc: Isaac Oram Cc: Mohamed Abbas Cc: Liming Gao Cc: Eric Dong Cc: Michael Kubacki --- .../SiliconPolicyInit/SiliconPolicyInitLate.c | 52 +++++++++++++++ .../SiliconPolicyInitLate.inf | 49 +++++++++++++++ .../SiliconPolicyInitPreAndPostMem.c | 63 +++++++++++++++++++ .../SiliconPolicyInitPreAndPostMem.inf | 48 ++++++++++++++ 4 files changed, 212 insertions(+) create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.c create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.inf create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.c create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.inf diff --git a/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.c b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.c new file mode 100644 index 0000000000..d5c1828cce --- /dev/null +++ b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.c @@ -0,0 +1,52 @@ +/** @file + SiliconPolicyInitLib DXE. + + This driver initializes silicon policy with the defaults from the silicon provider. + It publishes a protocol that is consumed by a shim library instance that provides the functions used by the + common MinPlatformPkg PolicyInit late policy initialization code. + + @copyright + Copyright 2021 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#include +#include +#include + +STATIC SILICON_POLICY_INIT_LIB_PROTOCOL mSiliconPolicyInitLibProtocol = { + SiliconPolicyInitLate, + SiliconPolicyDoneLate +}; + +/** + Entry point function + + @param ImageHandle - Handle for the image of this driver. + @param SystemTable - Pointer to the EFI System Table. + + @retval EFI_SUCCESS - Protocol installed sucessfully. +**/ +EFI_STATUS +EFIAPI +SiliconPolicyInitLateDxeEntry ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + EFI_HANDLE Handle; + + Handle = NULL; + Status = gBS->InstallProtocolInterface (&Handle, &gSiliconPolicyInitLibInterfaceGuid, EFI_NATIVE_INTERFACE, &mSiliconPolicyInitLibProtocol); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + + return Status; +} diff --git a/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.inf b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.inf new file mode 100644 index 0000000000..d6ef987f5b --- /dev/null +++ b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.inf @@ -0,0 +1,49 @@ +## @file +# SiliconPolicyInitLate DXE Boot Services Driver +# +# This driver initializes silicon policy with the defaults from the silicon provider. +# It publishes a protocol that is consumed by a shim library instance that provides the functions used by the +# common MinPlatformPkg PolicyInit late silicon init code. +# This driver produces SiliconPolicyInit LATE services. A PEIM provides the PRE and POST memory services. +# +# @copyright +# Copyright 2021 Intel Corporation.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SiliconPolicyInitLate + FILE_GUID = ff6216f2-d911-44a5-9f48-c174223acc7c + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = SiliconPolicyInitLateDxeEntry + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = X64 +# + +[Sources] + SiliconPolicyInitLate.c + +[Packages] + MdePkg/MdePkg.dec + MinPlatformPkg/MinPlatformPkg.dec + WhitleySiliconPkg/WhitleySiliconPkg.dec + WhitleyOpenboardPkg/PlatformPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + DriverEntryPoint + UefiBootServicesTableLib + SiliconPolicyInitLib + +[Guids] + gSiliconPolicyInitLibInterfaceGuid ## ALWAYS_PRODUCES a PROTOCOL with this GUID + +[Depex] + TRUE diff --git a/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.c b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.c new file mode 100644 index 0000000000..5bc410f21f --- /dev/null +++ b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.c @@ -0,0 +1,63 @@ +/** @file + SiliconPolicyInit PEIM. + + This PEIM initializes silicon policy with the defaults from the silicon provider. + We publish a PPI that is consumed by a shim library instance that provides the functions used by the + common MinPlatformPkg PolicyInit pre and post memory code. + + @copyright + Copyright 2021 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#include +#include +#include +#include + +STATIC SILICON_POLICY_INIT_LIB_PPI mSiliconPolicyInitLibPpi = { + SiliconPolicyInitPreMem, + SiliconPolicyDonePreMem, + SiliconPolicyInitPostMem, + SiliconPolicyDonePostMem +}; + +STATIC EFI_PEI_PPI_DESCRIPTOR mSiliconPolicyInitLibPpiDescriptor = { + EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, + &gSiliconPolicyInitLibInterfaceGuid, + &mSiliconPolicyInitLibPpi + }; + +/** + Entry point function for the PEIM + + @param FileHandle Handle of the file being invoked. + @param PeiServices Describes the list of possible PEI Services. + + @return EFI_SUCCESS If we installed our PPI +**/ +EFI_STATUS +EFIAPI +SiliconPolicyInitPreAndPostMemPeimEntry ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + + // + // Just produce our PPI + // + Status = PeiServicesInstallPpi (&mSiliconPolicyInitLibPpiDescriptor); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "EntryPoint: failed to register PPI!\n")); + ASSERT_EFI_ERROR (Status); + return Status; + } + + return Status; +} diff --git a/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.inf b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.inf new file mode 100644 index 0000000000..6416457fdb --- /dev/null +++ b/Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.inf @@ -0,0 +1,48 @@ +## @file +# SiliconPolicyInitPreAndPostMem PEIM. +# +# This PEIM initializes silicon policy with the defaults from the silicon provider. +# We publish a PPI that is consumed by a shim library instance that provides the functions used by the +# common MinPlatformPkg PolicyInit pre and post memory code. +# This PEIM produces SiliconPolicyInit PRE and POST memory services. A DXE driver provides the LATE services. +# +# @copyright +# Copyright 2021 Intel Corporation.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SiliconPolicyInitPreAndPostMem + FILE_GUID = ca8efb69-d7dc-4e94-aad6-9fb373649161 + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + ENTRY_POINT = SiliconPolicyInitPreAndPostMemPeimEntry + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 +# + +[Sources] + SiliconPolicyInitPreAndPostMem.c + +[Packages] + MdePkg/MdePkg.dec + MinPlatformPkg/MinPlatformPkg.dec + WhitleySiliconPkg/WhitleySiliconPkg.dec + +[LibraryClasses] + BaseLib + PeiServicesLib + PeimEntryPoint + DebugLib + SiliconPolicyInitLib + +[Guids] + gSiliconPolicyInitLibInterfaceGuid ## ALWAYS_PRODUCES a PPI with this GUID + +[Depex] + TRUE -- 2.27.0.windows.1