* [edk2-platforms: PATCH] Platform/Intel: Correct CPU APIC IDs.
@ 2021-07-13 5:57 TinaX Y Chen
2021-07-15 5:46 ` Chaganty, Rangasai V
0 siblings, 1 reply; 2+ messages in thread
From: TinaX Y Chen @ 2021-07-13 5:57 UTC (permalink / raw)
To: devel
Cc: JackX, Chasel Chiu, Jenny Huang, Jiewen Yao, Ray Ni,
Rangasai V Chaganty, Tinax Chen
From: JackX <JackX.Lin@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3365
BIOS cannot find correct AcpiProcId in mApicIdMap because of
there is no suitable map, that causes ACPI_BIOS_ERROR.
Remove mApicIdMap for determing AcpiProcId, uses normal
countings instead.
Signed-off-by: JackX Lin <JackX.Lin@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Tinax Chen <tinax.y.chen@intel.com>
Cc: JackX Lin <JackX.Lin@intel.com>
---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 230 ++++++++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1 file changed, 48 insertions(+), 182 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 2b51c34ef2..5a717295e0 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -1,14 +1,13 @@
/** @file
ACPI Platform Driver
-Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "AcpiPlatform.h"
-#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuThreadCount) * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSocketCount))
#pragma pack(1)
@@ -16,7 +15,6 @@ typedef struct {
UINT32 AcpiProcessorId;
UINT32 ApicId;
UINT32 Flags;
- UINT32 SwProcApicId;
UINT32 SocketNum;
} EFI_CPU_ID_ORDER_MAP;
@@ -58,138 +56,17 @@ BOOLEAN mX2ApicEnabled;
EFI_MP_SERVICES_PROTOCOL *mMpService;
BOOLEAN mCpuOrderSorted;
-EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM];
-UINTN mNumberOfCPUs = 0;
+EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable = NULL;
+UINTN mNumberOfCpus = 0;
UINTN mNumberOfEnabledCPUs = 0;
-// following are possible APICID Map for SKX
-static const UINT32 ApicIdMapA[] = { //for SKUs have number of core > 16
- //it is 14 + 14 + 14 + 14 format
- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x00000010, 0x00000011,
- 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, 0x00000018, 0x00000019,
- 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, 0x00000022, 0x00000023,
- 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, 0x0000002A, 0x0000002B,
- 0x0000002C, 0x0000002D, 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 0x00000035,
- 0x00000036, 0x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, 0x0000003C, 0x0000003D
-};
-
-static const UINT32 ApicIdMapB[] = { //for SKUs have number of cores <= 16 use 32 ID space
- //it is 16+16 format
- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,
- 0x00000010, 0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017,
- 0x00000018, 0x00000019, 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x0000001E, 0x0000001F,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
-};
-
-
-static const UINT32 ApicIdMapC[] = { //for SKUs have number of cores <= 16 use 64 ID space
- //it is 16+0+16+0 format
- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,
- 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027,
- 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, 0x0000002C, 0x0000002D, 0x0000002E, 0x0000002F,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
-};
-
-static const UINT32 ApicIdMapD[] = { //for SKUs have number of cores <= 8 use 16 ID space
- //it is 16 format
- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,
- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
-};
-
-const UINT32 *mApicIdMap = NULL;
-
/**
- This function detect the APICID map and update ApicID Map pointer
-
- @param None
-
- @retval VOID
-
-**/
-VOID DetectApicIdMap(VOID)
-{
- UINTN CoreCount;
-
- CoreCount = 0;
-
- if(mApicIdMap != NULL) {
- return; //aleady initialized
- }
-
- mApicIdMap = ApicIdMapA; // default to > 16C SKUs
-
- CoreCount = mNumberOfEnabledCPUs / 2;
- DEBUG ((DEBUG_INFO, "CoreCount - %d\n", CoreCount));
-
- //DEBUG((EFI_D_ERROR, ":: Default to use Map A @ %08X FusedCoreCount: %02d, sktlevel: %d\n",mApicIdMap, FusedCoreCount, mNumOfBitShift));
- // Dont assert for single core, single thread system.
- //ASSERT (CoreCount != 0);
-
- if(CoreCount <= 16) {
-
- if(mNumOfBitShift == 4) {
- mApicIdMap = ApicIdMapD;
- //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));
- }
-
- if(mNumOfBitShift == 5) {
- mApicIdMap = ApicIdMapB;
- //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));
- }
-
- if(mNumOfBitShift == 6) {
- mApicIdMap = ApicIdMapC;
- //DEBUG((EFI_D_ERROR, ":: Use Map C @ %08X\n",mApicIdMap));
- }
-
- }
-
- return;
-}
-
-/**
- This function return the CoreThreadId of ApicId from ACPI ApicId Map array
+ This function searches mCpuApicIdOrderTable to find the BSP ApicId, and returns a number where the BSP is.
@param ApicId
- @retval Index of ACPI ApicId Map array
-
+ @return Where the BSP is.
**/
-UINT32
-GetIndexFromApicId (
- UINT32 ApicId
- )
-{
- UINT32 CoreThreadId;
- UINT32 i;
-
- ASSERT (mApicIdMap != NULL);
-
- CoreThreadId = ApicId & ((1 << mNumOfBitShift) - 1);
-
- for(i = 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)); i++) {
- if(mApicIdMap[i] == CoreThreadId) {
- break;
- }
- }
-
- ASSERT (i <= (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)));
-
- return i;
-}
-
UINT32
ApicId2SwProcApicId (
UINT32 ApicId
@@ -197,7 +74,7 @@ ApicId2SwProcApicId (
{
UINT32 Index;
- for (Index = 0; Index < MAX_CPU_NUM; Index++) {
+ for (Index = 0; Index < mNumberOfCpus; Index++) {
if ((mCpuApicIdOrderTable[Index].Flags == 1) && (mCpuApicIdOrderTable[Index].ApicId == ApicId)) {
return Index;
}
@@ -214,13 +91,12 @@ DebugDisplayReOrderTable(
{
UINT32 Index;
- DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n"));
- for (Index=0; Index<MAX_CPU_NUM; Index++) {
- DEBUG ((EFI_D_ERROR, " %02d 0x%02X 0x%02X %d 0x%02X %d\n",
+ DEBUG ((DEBUG_ERROR, "Index AcpiProcId ApicId Flags Skt\n"));
+ for (Index = 0; Index < mNumberOfCpus; Index++) {
+ DEBUG ((DEBUG_ERROR, " %02d 0x%02X 0x%02X %d %d\n",
Index, mCpuApicIdOrderTable[Index].AcpiProcessorId,
mCpuApicIdOrderTable[Index].ApicId,
mCpuApicIdOrderTable[Index].Flags,
- mCpuApicIdOrderTable[Index].SwProcApicId,
mCpuApicIdOrderTable[Index].SocketNum));
}
}
@@ -292,9 +168,8 @@ SortCpuLocalApicInTable (
if(!mCpuOrderSorted) {
- Index = 0;
- for (CurrProcessor = 0; CurrProcessor < mNumberOfCPUs; CurrProcessor++) {
+ for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++, Index++) {
Status = mMpService->GetProcessorInfo (
mMpService,
CurrProcessor,
@@ -302,20 +177,12 @@ SortCpuLocalApicInTable (
);
if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) {
- if(ProcessorInfoBuffer.ProcessorId & 1) { //is 2nd thread
- CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(Index - 1) + MAX_CPU_NUM / 2];
- } else { //is primary thread
CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index];
- Index++;
- }
CpuIdMapPtr->ApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
CpuIdMapPtr->Flags = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0);
CpuIdMapPtr->SocketNum = (UINT32)ProcessorInfoBuffer.Location.Package;
- CpuIdMapPtr->AcpiProcessorId = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId;
- CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask));
- if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it starts from base 0 and contiguous
+ CpuIdMapPtr->AcpiProcessorId = Index;
//may not necessory!!!!!
- }
//update processorbitMask
if (CpuIdMapPtr->Flags == 1) {
@@ -323,7 +190,6 @@ SortCpuLocalApicInTable (
if(mForceX2ApicId) {
CpuIdMapPtr->SocketNum &= 0x7;
CpuIdMapPtr->AcpiProcessorId &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt
- CpuIdMapPtr->SwProcApicId &= 0xFF;
}
}
} else { //not enabled
@@ -331,13 +197,12 @@ SortCpuLocalApicInTable (
CpuIdMapPtr->ApicId = (UINT32)-1;
CpuIdMapPtr->Flags = 0;
CpuIdMapPtr->AcpiProcessorId = (UINT32)-1;
- CpuIdMapPtr->SwProcApicId = (UINT32)-1;
CpuIdMapPtr->SocketNum = (UINT32)-1;
} //end if PROC ENABLE
} //end for CurrentProcessor
//keep for debug purpose
- DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift));
+ DEBUG (( DEBUG_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift));
DebugDisplayReOrderTable();
//make sure 1st entry is BSP
@@ -346,14 +211,14 @@ SortCpuLocalApicInTable (
} else {
BspApicId = (*(volatile UINT32 *)(UINTN)0xFEE00020) >> 24;
}
- DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId));
+ DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId));
if(mCpuApicIdOrderTable[0].ApicId != BspApicId) {
//check to see if 1st entry is BSP, if not swap it
Index = ApicId2SwProcApicId(BspApicId);
- if(MAX_CPU_NUM <= Index) {
- DEBUG ((EFI_D_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n"));
+ if(mNumberOfCpus <= Index) {
+ DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n"));
return EFI_INVALID_PARAMETER;
}
@@ -362,9 +227,6 @@ SortCpuLocalApicInTable (
mCpuApicIdOrderTable[0].ApicId = TempVal;
mCpuApicIdOrderTable[Index].Flags = mCpuApicIdOrderTable[0].Flags;
mCpuApicIdOrderTable[0].Flags = 1;
- TempVal = mCpuApicIdOrderTable[Index].SwProcApicId;
- mCpuApicIdOrderTable[Index].SwProcApicId = mCpuApicIdOrderTable[0].SwProcApicId;
- mCpuApicIdOrderTable[0].SwProcApicId = TempVal;
//swap AcpiProcId
TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorId;
mCpuApicIdOrderTable[Index].AcpiProcessorId = mCpuApicIdOrderTable[0].AcpiProcessorId;
@@ -373,27 +235,24 @@ SortCpuLocalApicInTable (
}
//Make sure no holes between enabled threads
- for(CurrProcessor = 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++) {
+ for (CurrProcessor = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) {
if(mCpuApicIdOrderTable[CurrProcessor].Flags == 0) {
//make sure disabled entry has ProcId set to FFs
mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1;
mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = (UINT32)-1;
- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1;
- for(Index = CurrProcessor+1; Index < MAX_CPU_NUM; Index++) {
+ for (Index = CurrProcessor+1; Index < mNumberOfCpus; Index++) {
if(mCpuApicIdOrderTable[Index].Flags == 1) {
//move enabled entry up
mCpuApicIdOrderTable[CurrProcessor].Flags = 1;
mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId;
mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = mCpuApicIdOrderTable[Index].AcpiProcessorId;
- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId;
mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum;
//disable moved entry
mCpuApicIdOrderTable[Index].Flags = 0;
mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1;
mCpuApicIdOrderTable[Index].AcpiProcessorId = (UINT32)-1;
- mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1;
break;
}
}
@@ -401,7 +260,7 @@ SortCpuLocalApicInTable (
}
//keep for debug purpose
- DEBUG ((EFI_D_ERROR, "APIC ID Order Table ReOrdered\n"));
+ DEBUG ((DEBUG_ERROR, "APIC ID Order Table ReOrdered\n"));
DebugDisplayReOrderTable();
mCpuOrderSorted = TRUE;
@@ -871,18 +730,22 @@ InstallMadtFromScratch (
NewMadtTable = NULL;
MaxMadtStructCount = 0;
- DetectApicIdMap();
+ mCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP));
+ if (mCpuApicIdOrderTable == NULL) {
+ DEBUG ((DEBUG_ERROR, "Could not allocate mCpuApicIdOrderTable structure pointer array\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
// Call for Local APIC ID Reorder
Status = SortCpuLocalApicInTable ();
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status));
goto Done;
}
MaxMadtStructCount = (UINT32) (
- MAX_CPU_NUM + // processor local APIC structures
- MAX_CPU_NUM + // processor local x2APIC structures
+ mNumberOfCpus + // processor local APIC structures
+ mNumberOfCpus + // processor local x2APIC structures
1 + PcdGet8(PcdPcIoApicCount) + // I/O APIC structures
2 + // interrupt source override structures
1 + // local APIC NMI structures
@@ -906,11 +769,11 @@ InstallMadtFromScratch (
//
Status = InitializeMadtHeader (&MadtTableHeader);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "InitializeMadtHeader failed: %r\n", Status));
goto Done;
}
- DEBUG ((EFI_D_INFO, "Number of CPUs detected = %d \n", mNumberOfCPUs));
+ DEBUG ((DEBUG_INFO, "Number of CPUs detected = %d \n", mNumberOfCpus));
//
// Build Processor Local APIC Structures and Processor Local X2APIC Structures
@@ -923,7 +786,7 @@ InstallMadtFromScratch (
ProcLocalX2ApicStruct.Reserved[0] = 0;
ProcLocalX2ApicStruct.Reserved[1] = 0;
- for (Index = 0; Index < MAX_CPU_NUM; Index++) {
+ for (Index = 0; Index < mNumberOfCpus; Index++) {
//
// If x2APIC mode is not enabled, and if it is possible to express the
// APIC ID as a UINT8, use a processor local APIC structure. Otherwise,
@@ -953,7 +816,7 @@ InstallMadtFromScratch (
);
}
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status));
goto Done;
}
}
@@ -978,7 +841,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++]
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));
goto Done;
}
}
@@ -1000,7 +863,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++]
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));
goto Done;
}
}
@@ -1026,7 +889,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++]
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status));
goto Done;
}
@@ -1045,7 +908,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++]
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status));
goto Done;
}
@@ -1065,7 +928,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++]
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status));
goto Done;
}
@@ -1105,7 +968,7 @@ InstallMadtFromScratch (
(UINT8 **)&NewMadtTable
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "BuildAcpiTable failed: %r\n", Status));
goto Done;
}
@@ -1136,6 +999,10 @@ Done:
FreePool (NewMadtTable);
}
+ if (mCpuApicIdOrderTable != NULL) {
+ FreePool (mCpuApicIdOrderTable);
+ }
+
return Status;
}
@@ -1324,9 +1191,9 @@ PlatformUpdateTables (
FadtHeader->XGpe1Blk.AccessSize = 0;
}
- DEBUG(( EFI_D_ERROR, "ACPI FADT table @ address 0x%x\n", Table ));
- DEBUG(( EFI_D_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch ));
- DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags ));
+ DEBUG ((DEBUG_ERROR, "ACPI FADT table @ address 0x%x\n", Table));
+ DEBUG ((DEBUG_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch));
+ DEBUG ((DEBUG_ERROR, " Flags 0x%x\n", FadtHeader->Flags));
break;
case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:
@@ -1346,8 +1213,8 @@ PlatformUpdateTables (
HpetBlockId.Bits.VendorId = HpetCapabilities.Bits.VendorId;
HpetTable->EventTimerBlockId = HpetBlockId.Uint32;
HpetTable->MainCounterMinimumClockTickInPeriodicMode = (UINT16)HpetCapabilities.Bits.CounterClockPeriod;
- DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x\n", Table ));
- DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress) ));
+ DEBUG ((DEBUG_ERROR, "ACPI HPET table @ address 0x%x\n", Table));
+ DEBUG ((DEBUG_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress)));
break;
case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE:
@@ -1526,7 +1393,6 @@ InstallAcpiPlatform (
EFI_STATUS Status;
EFI_EVENT EndOfDxeEvent;
-
Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&mMpService);
ASSERT_EFI_ERROR (Status);
@@ -1551,11 +1417,11 @@ InstallAcpiPlatform (
//
mMpService->GetNumberOfProcessors (
mMpService,
- &mNumberOfCPUs,
+ &mNumberOfCpus,
&mNumberOfEnabledCPUs
);
- ASSERT (mNumberOfCPUs <= MAX_CPU_NUM && mNumberOfEnabledCPUs >= 1);
- DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d\n", mNumberOfCPUs));
+
+ DEBUG ((DEBUG_INFO, "mNumberOfCpus - %d\n", mNumberOfCpus));
DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEnabledCPUs));
DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled));
--
2.26.2.windows.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [edk2-platforms: PATCH] Platform/Intel: Correct CPU APIC IDs.
2021-07-13 5:57 [edk2-platforms: PATCH] Platform/Intel: Correct CPU APIC IDs TinaX Y Chen
@ 2021-07-15 5:46 ` Chaganty, Rangasai V
0 siblings, 0 replies; 2+ messages in thread
From: Chaganty, Rangasai V @ 2021-07-15 5:46 UTC (permalink / raw)
To: Chen, TinaX Y, devel@edk2.groups.io
Cc: Lin, JackX, Chiu, Chasel, Huang, Jenny, Yao, Jiewen, Ni, Ray
The DEBUG error levels are set incorrectly in several places. Examples (please check other places too):
- Line 213, 215, 275 etc. - Should be changed DEBUG_INFO.
Also, please remove the comment in line 251,
Regards,
Sai
-----Original Message-----
From: Chen, TinaX Y <tinax.y.chen@intel.com>
Sent: Monday, July 12, 2021 10:58 PM
To: devel@edk2.groups.io
Cc: Lin, JackX <jackx.lin@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Huang, Jenny <jenny.huang@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Chen, TinaX Y <tinax.y.chen@intel.com>
Subject: [edk2-platforms: PATCH] Platform/Intel: Correct CPU APIC IDs.
From: JackX <JackX.Lin@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3365
BIOS cannot find correct AcpiProcId in mApicIdMap because of there is no suitable map, that causes ACPI_BIOS_ERROR.
Remove mApicIdMap for determing AcpiProcId, uses normal countings instead.
Signed-off-by: JackX Lin <JackX.Lin@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Tinax Chen <tinax.y.chen@intel.com>
Cc: JackX Lin <JackX.Lin@intel.com>
---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 230 ++++++++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1 file changed, 48 insertions(+), 182 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 2b51c34ef2..5a717295e0 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -1,14 +1,13 @@
/** @file ACPI Platform Driver -Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include "AcpiPlatform.h" -#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuThreadCount) * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSocketCount)) #pragma pack(1) @@ -16,7 +15,6 @@ typedef struct {
UINT32 AcpiProcessorId; UINT32 ApicId; UINT32 Flags;- UINT32 SwProcApicId; UINT32 SocketNum; } EFI_CPU_ID_ORDER_MAP; @@ -58,138 +56,17 @@ BOOLEAN mX2ApicEnabled;
EFI_MP_SERVICES_PROTOCOL *mMpService; BOOLEAN mCpuOrderSorted;-EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM];-UINTN mNumberOfCPUs = 0;+EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable = NULL;+UINTN mNumberOfCpus = 0; UINTN mNumberOfEnabledCPUs = 0; -// following are possible APICID Map for SKX-static const UINT32 ApicIdMapA[] = { //for SKUs have number of core > 16- //it is 14 + 14 + 14 + 14 format- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x00000010, 0x00000011,- 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, 0x00000018, 0x00000019,- 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, 0x00000022, 0x00000023,- 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, 0x0000002A, 0x0000002B,- 0x0000002C, 0x0000002D, 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 0x00000035,- 0x00000036, 0x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, 0x0000003C, 0x0000003D-};--static const UINT32 ApicIdMapB[] = { //for SKUs have number of cores <= 16 use 32 ID space- //it is 16+16 format- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,- 0x00000010, 0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017,- 0x00000018, 0x00000019, 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x0000001E, 0x0000001F,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF-};---static const UINT32 ApicIdMapC[] = { //for SKUs have number of cores <= 16 use 64 ID space- //it is 16+0+16+0 format- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,- 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027,- 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, 0x0000002C, 0x0000002D, 0x0000002E, 0x0000002F,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF-};--static const UINT32 ApicIdMapD[] = { //for SKUs have number of cores <= 8 use 16 ID space- //it is 16 format- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF-};--const UINT32 *mApicIdMap = NULL;- /**- This function detect the APICID map and update ApicID Map pointer-- @param None-- @retval VOID--**/-VOID DetectApicIdMap(VOID)-{- UINTN CoreCount;-- CoreCount = 0;-- if(mApicIdMap != NULL) {- return; //aleady initialized- }-- mApicIdMap = ApicIdMapA; // default to > 16C SKUs-- CoreCount = mNumberOfEnabledCPUs / 2;- DEBUG ((DEBUG_INFO, "CoreCount - %d\n", CoreCount));-- //DEBUG((EFI_D_ERROR, ":: Default to use Map A @ %08X FusedCoreCount: %02d, sktlevel: %d\n",mApicIdMap, FusedCoreCount, mNumOfBitShift));- // Dont assert for single core, single thread system.- //ASSERT (CoreCount != 0);-- if(CoreCount <= 16) {-- if(mNumOfBitShift == 4) {- mApicIdMap = ApicIdMapD;- //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));- }-- if(mNumOfBitShift == 5) {- mApicIdMap = ApicIdMapB;- //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));- }-- if(mNumOfBitShift == 6) {- mApicIdMap = ApicIdMapC;- //DEBUG((EFI_D_ERROR, ":: Use Map C @ %08X\n",mApicIdMap));- }-- }-- return;-}--/**- This function return the CoreThreadId of ApicId from ACPI ApicId Map array+ This function searches mCpuApicIdOrderTable to find the BSP ApicId, and returns a number where the BSP is. @param ApicId - @retval Index of ACPI ApicId Map array-+ @return Where the BSP is. **/-UINT32-GetIndexFromApicId (- UINT32 ApicId- )-{- UINT32 CoreThreadId;- UINT32 i;-- ASSERT (mApicIdMap != NULL);-- CoreThreadId = ApicId & ((1 << mNumOfBitShift) - 1);-- for(i = 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)); i++) {- if(mApicIdMap[i] == CoreThreadId) {- break;- }- }-- ASSERT (i <= (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)));-- return i;-}- UINT32 ApicId2SwProcApicId ( UINT32 ApicId@@ -197,7 +74,7 @@ ApicId2SwProcApicId (
{ UINT32 Index; - for (Index = 0; Index < MAX_CPU_NUM; Index++) {+ for (Index = 0; Index < mNumberOfCpus; Index++) { if ((mCpuApicIdOrderTable[Index].Flags == 1) && (mCpuApicIdOrderTable[Index].ApicId == ApicId)) { return Index; }@@ -214,13 +91,12 @@ DebugDisplayReOrderTable(
{ UINT32 Index; - DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n"));- for (Index=0; Index<MAX_CPU_NUM; Index++) {- DEBUG ((EFI_D_ERROR, " %02d 0x%02X 0x%02X %d 0x%02X %d\n",+ DEBUG ((DEBUG_ERROR, "Index AcpiProcId ApicId Flags Skt\n"));+ for (Index = 0; Index < mNumberOfCpus; Index++) {+ DEBUG ((DEBUG_ERROR, " %02d 0x%02X 0x%02X %d %d\n", Index, mCpuApicIdOrderTable[Index].AcpiProcessorId, mCpuApicIdOrderTable[Index].ApicId, mCpuApicIdOrderTable[Index].Flags,- mCpuApicIdOrderTable[Index].SwProcApicId, mCpuApicIdOrderTable[Index].SocketNum)); } }@@ -292,9 +168,8 @@ SortCpuLocalApicInTable (
if(!mCpuOrderSorted) { - Index = 0; - for (CurrProcessor = 0; CurrProcessor < mNumberOfCPUs; CurrProcessor++) {+ for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++, Index++) { Status = mMpService->GetProcessorInfo ( mMpService, CurrProcessor,@@ -302,20 +177,12 @@ SortCpuLocalApicInTable (
); if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) {- if(ProcessorInfoBuffer.ProcessorId & 1) { //is 2nd thread- CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(Index - 1) + MAX_CPU_NUM / 2];- } else { //is primary thread CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Index];- Index++;- } CpuIdMapPtr->ApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; CpuIdMapPtr->Flags = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0); CpuIdMapPtr->SocketNum = (UINT32)ProcessorInfoBuffer.Location.Package;- CpuIdMapPtr->AcpiProcessorId = (CpuIdMapPtr->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId;- CpuIdMapPtr->SwProcApicId = ((UINT32)(ProcessorInfoBuffer.Location.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) & CoreThreadMask));- if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it starts from base 0 and contiguous+ CpuIdMapPtr->AcpiProcessorId = Index; //may not necessory!!!!!- } //update processorbitMask if (CpuIdMapPtr->Flags == 1) {@@ -323,7 +190,6 @@ SortCpuLocalApicInTable (
if(mForceX2ApicId) { CpuIdMapPtr->SocketNum &= 0x7; CpuIdMapPtr->AcpiProcessorId &= 0xFF; //keep lower 8bit due to use Proc obj in dsdt- CpuIdMapPtr->SwProcApicId &= 0xFF; } } } else { //not enabled@@ -331,13 +197,12 @@ SortCpuLocalApicInTable (
CpuIdMapPtr->ApicId = (UINT32)-1; CpuIdMapPtr->Flags = 0; CpuIdMapPtr->AcpiProcessorId = (UINT32)-1;- CpuIdMapPtr->SwProcApicId = (UINT32)-1; CpuIdMapPtr->SocketNum = (UINT32)-1; } //end if PROC ENABLE } //end for CurrentProcessor //keep for debug purpose- DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift));+ DEBUG (( DEBUG_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThreadMask = %x, mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift)); DebugDisplayReOrderTable(); //make sure 1st entry is BSP@@ -346,14 +211,14 @@ SortCpuLocalApicInTable (
} else { BspApicId = (*(volatile UINT32 *)(UINTN)0xFEE00020) >> 24; }- DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId));+ DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId)); if(mCpuApicIdOrderTable[0].ApicId != BspApicId) { //check to see if 1st entry is BSP, if not swap it Index = ApicId2SwProcApicId(BspApicId); - if(MAX_CPU_NUM <= Index) {- DEBUG ((EFI_D_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n"));+ if(mNumberOfCpus <= Index) {+ DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index Bufferflow\n")); return EFI_INVALID_PARAMETER; } @@ -362,9 +227,6 @@ SortCpuLocalApicInTable (
mCpuApicIdOrderTable[0].ApicId = TempVal; mCpuApicIdOrderTable[Index].Flags = mCpuApicIdOrderTable[0].Flags; mCpuApicIdOrderTable[0].Flags = 1;- TempVal = mCpuApicIdOrderTable[Index].SwProcApicId;- mCpuApicIdOrderTable[Index].SwProcApicId = mCpuApicIdOrderTable[0].SwProcApicId;- mCpuApicIdOrderTable[0].SwProcApicId = TempVal; //swap AcpiProcId TempVal = mCpuApicIdOrderTable[Index].AcpiProcessorId; mCpuApicIdOrderTable[Index].AcpiProcessorId = mCpuApicIdOrderTable[0].AcpiProcessorId;@@ -373,27 +235,24 @@ SortCpuLocalApicInTable (
} //Make sure no holes between enabled threads- for(CurrProcessor = 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++) {+ for (CurrProcessor = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) { if(mCpuApicIdOrderTable[CurrProcessor].Flags == 0) { //make sure disabled entry has ProcId set to FFs mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32)-1; mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = (UINT32)-1;- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = (UINT32)-1; - for(Index = CurrProcessor+1; Index < MAX_CPU_NUM; Index++) {+ for (Index = CurrProcessor+1; Index < mNumberOfCpus; Index++) { if(mCpuApicIdOrderTable[Index].Flags == 1) { //move enabled entry up mCpuApicIdOrderTable[CurrProcessor].Flags = 1; mCpuApicIdOrderTable[CurrProcessor].ApicId = mCpuApicIdOrderTable[Index].ApicId; mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId = mCpuApicIdOrderTable[Index].AcpiProcessorId;- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId = mCpuApicIdOrderTable[Index].SwProcApicId; mCpuApicIdOrderTable[CurrProcessor].SocketNum = mCpuApicIdOrderTable[Index].SocketNum; //disable moved entry mCpuApicIdOrderTable[Index].Flags = 0; mCpuApicIdOrderTable[Index].ApicId = (UINT32)-1; mCpuApicIdOrderTable[Index].AcpiProcessorId = (UINT32)-1;- mCpuApicIdOrderTable[Index].SwProcApicId = (UINT32)-1; break; } }@@ -401,7 +260,7 @@ SortCpuLocalApicInTable (
} //keep for debug purpose- DEBUG ((EFI_D_ERROR, "APIC ID Order Table ReOrdered\n"));+ DEBUG ((DEBUG_ERROR, "APIC ID Order Table ReOrdered\n")); DebugDisplayReOrderTable(); mCpuOrderSorted = TRUE;@@ -871,18 +730,22 @@ InstallMadtFromScratch (
NewMadtTable = NULL; MaxMadtStructCount = 0; - DetectApicIdMap();+ mCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP));+ if (mCpuApicIdOrderTable == NULL) {+ DEBUG ((DEBUG_ERROR, "Could not allocate mCpuApicIdOrderTable structure pointer array\n"));+ return EFI_OUT_OF_RESOURCES;+ } // Call for Local APIC ID Reorder Status = SortCpuLocalApicInTable (); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)); goto Done; } MaxMadtStructCount = (UINT32) (- MAX_CPU_NUM + // processor local APIC structures- MAX_CPU_NUM + // processor local x2APIC structures+ mNumberOfCpus + // processor local APIC structures+ mNumberOfCpus + // processor local x2APIC structures 1 + PcdGet8(PcdPcIoApicCount) + // I/O APIC structures 2 + // interrupt source override structures 1 + // local APIC NMI structures@@ -906,11 +769,11 @@ InstallMadtFromScratch (
// Status = InitializeMadtHeader (&MadtTableHeader); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "InitializeMadtHeader failed: %r\n", Status)); goto Done; } - DEBUG ((EFI_D_INFO, "Number of CPUs detected = %d \n", mNumberOfCPUs));+ DEBUG ((DEBUG_INFO, "Number of CPUs detected = %d \n", mNumberOfCpus)); // // Build Processor Local APIC Structures and Processor Local X2APIC Structures@@ -923,7 +786,7 @@ InstallMadtFromScratch (
ProcLocalX2ApicStruct.Reserved[0] = 0; ProcLocalX2ApicStruct.Reserved[1] = 0; - for (Index = 0; Index < MAX_CPU_NUM; Index++) {+ for (Index = 0; Index < mNumberOfCpus; Index++) { // // If x2APIC mode is not enabled, and if it is possible to express the // APIC ID as a UINT8, use a processor local APIC structure. Otherwise,@@ -953,7 +816,7 @@ InstallMadtFromScratch (
); } if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status)); goto Done; } }@@ -978,7 +841,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); goto Done; } }@@ -1000,7 +863,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", Status)); goto Done; } }@@ -1026,7 +889,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r\n", Status)); goto Done; } @@ -1045,7 +908,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r\n", Status)); goto Done; } @@ -1065,7 +928,7 @@ InstallMadtFromScratch (
&MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status)); goto Done; } @@ -1105,7 +968,7 @@ InstallMadtFromScratch (
(UINT8 **)&NewMadtTable ); if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status));+ DEBUG ((DEBUG_ERROR, "BuildAcpiTable failed: %r\n", Status)); goto Done; } @@ -1136,6 +999,10 @@ Done:
FreePool (NewMadtTable); } + if (mCpuApicIdOrderTable != NULL) {+ FreePool (mCpuApicIdOrderTable);+ }+ return Status; } @@ -1324,9 +1191,9 @@ PlatformUpdateTables (
FadtHeader->XGpe1Blk.AccessSize = 0; } - DEBUG(( EFI_D_ERROR, "ACPI FADT table @ address 0x%x\n", Table ));- DEBUG(( EFI_D_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch ));- DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags ));+ DEBUG ((DEBUG_ERROR, "ACPI FADT table @ address 0x%x\n", Table));+ DEBUG ((DEBUG_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch));+ DEBUG ((DEBUG_ERROR, " Flags 0x%x\n", FadtHeader->Flags)); break; case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:@@ -1346,8 +1213,8 @@ PlatformUpdateTables (
HpetBlockId.Bits.VendorId = HpetCapabilities.Bits.VendorId; HpetTable->EventTimerBlockId = HpetBlockId.Uint32; HpetTable->MainCounterMinimumClockTickInPeriodicMode = (UINT16)HpetCapabilities.Bits.CounterClockPeriod;- DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x\n", Table ));- DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress) ));+ DEBUG ((DEBUG_ERROR, "ACPI HPET table @ address 0x%x\n", Table));+ DEBUG ((DEBUG_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress))); break; case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE:@@ -1526,7 +1393,6 @@ InstallAcpiPlatform (
EFI_STATUS Status; EFI_EVENT EndOfDxeEvent; - Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&mMpService); ASSERT_EFI_ERROR (Status); @@ -1551,11 +1417,11 @@ InstallAcpiPlatform (
// mMpService->GetNumberOfProcessors ( mMpService,- &mNumberOfCPUs,+ &mNumberOfCpus, &mNumberOfEnabledCPUs );- ASSERT (mNumberOfCPUs <= MAX_CPU_NUM && mNumberOfEnabledCPUs >= 1);- DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d\n", mNumberOfCPUs));++ DEBUG ((DEBUG_INFO, "mNumberOfCpus - %d\n", mNumberOfCpus)); DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEnabledCPUs)); DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled));--
2.26.2.windows.1
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