From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web10.2098.1626408322106530664 for ; Thu, 15 Jul 2021 21:05:22 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: tinax.y.chen@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10046"; a="191040854" X-IronPort-AV: E=Sophos;i="5.84,244,1620716400"; d="scan'208";a="191040854" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2021 21:05:21 -0700 X-IronPort-AV: E=Sophos;i="5.84,244,1620716400"; d="scan'208";a="494812528" Received: from yatingcx-mobl.gar.corp.intel.com ([10.252.187.93]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2021 21:05:18 -0700 From: "TinaX Y Chen" To: devel@edk2.groups.io Cc: JackX Lin , Chasel Chiu , Jenny Huang , Jiewen Yao , Ray Ni , Rangasai V Chaganty , Donald Kuo , Chandana C Kumar , Tinax Chen Subject: [edk2-platforms: PATCH V2] Platform/Intel: Correct CPU APIC IDs. Date: Fri, 16 Jul 2021 12:05:03 +0800 Message-Id: <20210716040503.1643-1-tinax.y.chen@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: JackX Lin REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3365 BIOS cannot find correct AcpiProcId in mApicIdMap because of there is no suitable map, that causes ACPI_BIOS_ERROR. Remove mApicIdMap for determing AcpiProcId, uses normal countings instead. Signed-off-by: JackX Lin Cc: Chasel Chiu Cc: Jenny Huang Cc: Jiewen Yao Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Donald Kuo Cc: Chandana C Kumar Cc: Tinax Chen Cc: JackX Lin --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 456 +++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +--------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= -------------------------------------------------------------------------- 1 file changed, 158 insertions(+), 298 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 2b51c34ef2..f1d8b9ce5f 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1,22 +1,19 @@ /** @file=0D ACPI Platform Driver=0D =0D -Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
=0D +Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D =0D #include "AcpiPlatform.h"=0D =0D -#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuThreadCount) * FixedPcdGet32(P= cdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSocketCount))=0D -=0D #pragma pack(1)=0D =0D typedef struct {=0D UINT32 AcpiProcessorId;=0D UINT32 ApicId;=0D UINT32 Flags;=0D - UINT32 SwProcApicId;=0D UINT32 SocketNum;=0D } EFI_CPU_ID_ORDER_MAP;=0D =0D @@ -50,7 +47,7 @@ VOID *mLocalTable[] =3D { &Wsmt,=0D };=0D =0D -EFI_ACPI_TABLE_PROTOCOL *mAcpiTable;=0D +EFI_ACPI_TABLE_PROTOCOL *mAcpiTable;=0D =0D UINT32 mNumOfBitShift =3D 6;=0D BOOLEAN mForceX2ApicId;=0D @@ -58,138 +55,19 @@ BOOLEAN mX2ApicEnabled; =0D EFI_MP_SERVICES_PROTOCOL *mMpService;=0D BOOLEAN mCpuOrderSorted;=0D -EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM];=0D -UINTN mNumberOfCPUs =3D 0;=0D +EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable =3D NULL;=0D +UINTN mNumberOfCpus =3D 0;=0D UINTN mNumberOfEnabledCPUs =3D 0;=0D =0D -// following are possible APICID Map for SKX=0D -static const UINT32 ApicIdMapA[] =3D { //for SKUs have number of core > 1= 6=0D - //it is 14 + 14 + 14 + 14 format=0D - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, = 0x00000006, 0x00000007,=0D - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, = 0x00000010, 0x00000011,=0D - 0x00000012, 0x00000013, 0x00000014, 0x00000015, 0x00000016, 0x00000017, = 0x00000018, 0x00000019,=0D - 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, = 0x00000022, 0x00000023,=0D - 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, = 0x0000002A, 0x0000002B,=0D - 0x0000002C, 0x0000002D, 0x00000030, 0x00000031, 0x00000032, 0x00000033, = 0x00000034, 0x00000035,=0D - 0x00000036, 0x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, = 0x0000003C, 0x0000003D=0D -};=0D -=0D -static const UINT32 ApicIdMapB[] =3D { //for SKUs have number of cores <= =3D 16 use 32 ID space=0D - //it is 16+16 format=0D - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, = 0x00000006, 0x00000007,=0D - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, = 0x0000000E, 0x0000000F,=0D - 0x00000010, 0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015, = 0x00000016, 0x00000017,=0D - 0x00000018, 0x00000019, 0x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, = 0x0000001E, 0x0000001F,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF=0D -};=0D -=0D -=0D -static const UINT32 ApicIdMapC[] =3D { //for SKUs have number of cores <= =3D 16 use 64 ID space=0D - //it is 16+0+16+0 format=0D - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, = 0x00000006, 0x00000007,=0D - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, = 0x0000000E, 0x0000000F,=0D - 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0x00000025, = 0x00000026, 0x00000027,=0D - 0x00000028, 0x00000029, 0x0000002A, 0x0000002B, 0x0000002C, 0x0000002D, = 0x0000002E, 0x0000002F,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF=0D -};=0D -=0D -static const UINT32 ApicIdMapD[] =3D { //for SKUs have number of cores <= =3D 8 use 16 ID space=0D - //it is 16 format=0D - 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, = 0x00000006, 0x00000007,=0D - 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, = 0x0000000E, 0x0000000F,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF,=0D - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF=0D -};=0D -=0D -const UINT32 *mApicIdMap =3D NULL;=0D -=0D /**=0D - This function detect the APICID map and update ApicID Map pointer=0D + Find BSP in mCpuApicIdOrderTable.=0D =0D - @param None=0D + This function searches mCpuApicIdOrderTable to find the BSP ApicId, and = returns a number where the BSP is.=0D =0D - @retval VOID=0D -=0D -**/=0D -VOID DetectApicIdMap(VOID)=0D -{=0D - UINTN CoreCount;=0D -=0D - CoreCount =3D 0;=0D -=0D - if(mApicIdMap !=3D NULL) {=0D - return; //aleady initialized=0D - }=0D -=0D - mApicIdMap =3D ApicIdMapA; // default to > 16C SKUs=0D -=0D - CoreCount =3D mNumberOfEnabledCPUs / 2;=0D - DEBUG ((DEBUG_INFO, "CoreCount - %d\n", CoreCount));=0D -=0D - //DEBUG((EFI_D_ERROR, ":: Default to use Map A @ %08X FusedCoreCount: %0= 2d, sktlevel: %d\n",mApicIdMap, FusedCoreCount, mNumOfBitShift));=0D - // Dont assert for single core, single thread system.=0D - //ASSERT (CoreCount !=3D 0);=0D -=0D - if(CoreCount <=3D 16) {=0D -=0D - if(mNumOfBitShift =3D=3D 4) {=0D - mApicIdMap =3D ApicIdMapD;=0D - //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));=0D - }=0D -=0D - if(mNumOfBitShift =3D=3D 5) {=0D - mApicIdMap =3D ApicIdMapB;=0D - //DEBUG((EFI_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));=0D - }=0D -=0D - if(mNumOfBitShift =3D=3D 6) {=0D - mApicIdMap =3D ApicIdMapC;=0D - //DEBUG((EFI_D_ERROR, ":: Use Map C @ %08X\n",mApicIdMap));=0D - }=0D -=0D - }=0D -=0D - return;=0D -}=0D -=0D -/**=0D - This function return the CoreThreadId of ApicId from ACPI ApicId Map arr= ay=0D -=0D - @param ApicId=0D -=0D - @retval Index of ACPI ApicId Map array=0D + @param[in] ApicId Apic ID.=0D =0D + @return Where the BSP is.=0D **/=0D -UINT32=0D -GetIndexFromApicId (=0D - UINT32 ApicId=0D - )=0D -{=0D - UINT32 CoreThreadId;=0D - UINT32 i;=0D -=0D - ASSERT (mApicIdMap !=3D NULL);=0D -=0D - CoreThreadId =3D ApicId & ((1 << mNumOfBitShift) - 1);=0D -=0D - for(i =3D 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdM= axCpuThreadCount)); i++) {=0D - if(mApicIdMap[i] =3D=3D CoreThreadId) {=0D - break;=0D - }=0D - }=0D -=0D - ASSERT (i <=3D (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMax= CpuThreadCount)));=0D -=0D - return i;=0D -}=0D -=0D UINT32=0D ApicId2SwProcApicId (=0D UINT32 ApicId=0D @@ -197,7 +75,7 @@ ApicId2SwProcApicId ( {=0D UINT32 Index;=0D =0D - for (Index =3D 0; Index < MAX_CPU_NUM; Index++) {=0D + for (Index =3D 0; Index < mNumberOfCpus; Index++) {=0D if ((mCpuApicIdOrderTable[Index].Flags =3D=3D 1) && (mCpuApicIdOrderTa= ble[Index].ApicId =3D=3D ApicId)) {=0D return Index;=0D }=0D @@ -208,19 +86,18 @@ ApicId2SwProcApicId ( }=0D =0D VOID=0D -DebugDisplayReOrderTable(=0D +DebugDisplayReOrderTable (=0D VOID=0D )=0D {=0D UINT32 Index;=0D =0D - DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flags SwApicId Skt\n"= ));=0D - for (Index=3D0; IndexGetProcessorInfo (=0D - mMpService,=0D - CurrProcessor,=0D - &ProcessorInfoBuffer=0D - );=0D + mMpService,=0D + CurrProcessor,=0D + &ProcessorInfoBuffer=0D + );=0D =0D if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) !=3D 0)= {=0D - if(ProcessorInfoBuffer.ProcessorId & 1) { //is 2nd thread=0D - CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(I= ndex - 1) + MAX_CPU_NUM / 2];=0D - } else { //is primary thread=0D - CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[In= dex];=0D - Index++;=0D - }=0D + CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *)&mCpuApicIdOrderTable[Inde= x];=0D CpuIdMapPtr->ApicId =3D (UINT32)ProcessorInfoBuffer.ProcessorId;= =0D CpuIdMapPtr->Flags =3D ((ProcessorInfoBuffer.StatusFlag & PROCES= SOR_ENABLED_BIT) !=3D 0);=0D CpuIdMapPtr->SocketNum =3D (UINT32)ProcessorInfoBuffer.Location.Pa= ckage;=0D - CpuIdMapPtr->AcpiProcessorId =3D (CpuIdMapPtr->SocketNum * FixedPc= dGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuThreadCount)) + GetInde= xFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicId;=0D - CpuIdMapPtr->SwProcApicId =3D ((UINT32)(ProcessorInfoBuffer.Locati= on.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId) = & CoreThreadMask));=0D - if(mX2ApicEnabled) { //if X2Apic, re-order the socket # so it star= ts from base 0 and contiguous=0D - //may not necessory!!!!!=0D - }=0D + CpuIdMapPtr->AcpiProcessorId =3D Index;=0D =0D //update processorbitMask=0D if (CpuIdMapPtr->Flags =3D=3D 1) {=0D -=0D if(mForceX2ApicId) {=0D CpuIdMapPtr->SocketNum &=3D 0x7;=0D CpuIdMapPtr->AcpiProcessorId &=3D 0xFF; //keep lower 8bit due = to use Proc obj in dsdt=0D - CpuIdMapPtr->SwProcApicId &=3D 0xFF;=0D }=0D }=0D } else { //not enabled=0D @@ -331,29 +196,28 @@ SortCpuLocalApicInTable ( CpuIdMapPtr->ApicId =3D (UINT32)-1;=0D CpuIdMapPtr->Flags =3D 0;=0D CpuIdMapPtr->AcpiProcessorId =3D (UINT32)-1;=0D - CpuIdMapPtr->SwProcApicId =3D (UINT32)-1;=0D CpuIdMapPtr->SocketNum =3D (UINT32)-1;=0D } //end if PROC ENABLE=0D } //end for CurrentProcessor=0D =0D //keep for debug purpose=0D - DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order Table Init. CoreThread= Mask =3D %x, mNumOfBitShift =3D %x\n", CoreThreadMask, mNumOfBitShift));=0D - DebugDisplayReOrderTable();=0D + DEBUG ((DEBUG_INFO, "::ACPI:: APIC ID Order Table Init. CoreThreadM= ask =3D %x, mNumOfBitShift =3D %x\n", CoreThreadMask, mNumOfBitShift));=0D + DebugDisplayReOrderTable ();=0D =0D //make sure 1st entry is BSP=0D if(mX2ApicEnabled) {=0D - BspApicId =3D (UINT32)AsmReadMsr64(0x802);=0D + BspApicId =3D (UINT32)AsmReadMsr64 (0x802);=0D } else {=0D BspApicId =3D (*(volatile UINT32 *)(UINTN)0xFEE00020) >> 24;=0D }=0D - DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId));=0D + DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId));=0D =0D if(mCpuApicIdOrderTable[0].ApicId !=3D BspApicId) {=0D //check to see if 1st entry is BSP, if not swap it=0D - Index =3D ApicId2SwProcApicId(BspApicId);=0D + Index =3D ApicId2SwProcApicId (BspApicId);=0D =0D - if(MAX_CPU_NUM <=3D Index) {=0D - DEBUG ((EFI_D_ERROR, "Asserting the SortCpuLocalApicInTable Index = Bufferflow\n"));=0D + if(mNumberOfCpus <=3D Index) {=0D + DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index = Bufferflow\n"));=0D return EFI_INVALID_PARAMETER;=0D }=0D =0D @@ -362,38 +226,30 @@ SortCpuLocalApicInTable ( mCpuApicIdOrderTable[0].ApicId =3D TempVal;=0D mCpuApicIdOrderTable[Index].Flags =3D mCpuApicIdOrderTable[0].Flags;= =0D mCpuApicIdOrderTable[0].Flags =3D 1;=0D - TempVal =3D mCpuApicIdOrderTable[Index].SwProcApicId;=0D - mCpuApicIdOrderTable[Index].SwProcApicId =3D mCpuApicIdOrderTable[0]= .SwProcApicId;=0D - mCpuApicIdOrderTable[0].SwProcApicId =3D TempVal;=0D //swap AcpiProcId=0D TempVal =3D mCpuApicIdOrderTable[Index].AcpiProcessorId;=0D mCpuApicIdOrderTable[Index].AcpiProcessorId =3D mCpuApicIdOrderTable= [0].AcpiProcessorId;=0D mCpuApicIdOrderTable[0].AcpiProcessorId =3D TempVal;=0D -=0D }=0D =0D //Make sure no holes between enabled threads=0D - for(CurrProcessor =3D 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++)= {=0D -=0D + for(CurrProcessor =3D 0; CurrProcessor < mNumberOfCpus; CurrProcessor+= +) {=0D if(mCpuApicIdOrderTable[CurrProcessor].Flags =3D=3D 0) {=0D //make sure disabled entry has ProcId set to FFs=0D mCpuApicIdOrderTable[CurrProcessor].ApicId =3D (UINT32)-1;=0D mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId =3D (UINT32)-1= ;=0D - mCpuApicIdOrderTable[CurrProcessor].SwProcApicId =3D (UINT32)-1;=0D =0D - for(Index =3D CurrProcessor+1; Index < MAX_CPU_NUM; Index++) {=0D + for(Index =3D CurrProcessor+1; Index < mNumberOfCpus; Index++) {=0D if(mCpuApicIdOrderTable[Index].Flags =3D=3D 1) {=0D //move enabled entry up=0D mCpuApicIdOrderTable[CurrProcessor].Flags =3D 1;=0D mCpuApicIdOrderTable[CurrProcessor].ApicId =3D mCpuApicIdOrder= Table[Index].ApicId;=0D mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorId =3D mCpuAp= icIdOrderTable[Index].AcpiProcessorId;=0D - mCpuApicIdOrderTable[CurrProcessor].SwProcApicId =3D mCpuApicI= dOrderTable[Index].SwProcApicId;=0D mCpuApicIdOrderTable[CurrProcessor].SocketNum =3D mCpuApicIdOr= derTable[Index].SocketNum;=0D //disable moved entry=0D mCpuApicIdOrderTable[Index].Flags =3D 0;=0D mCpuApicIdOrderTable[Index].ApicId =3D (UINT32)-1;=0D mCpuApicIdOrderTable[Index].AcpiProcessorId =3D (UINT32)-1;=0D - mCpuApicIdOrderTable[Index].SwProcApicId =3D (UINT32)-1;=0D break;=0D }=0D }=0D @@ -401,8 +257,8 @@ SortCpuLocalApicInTable ( }=0D =0D //keep for debug purpose=0D - DEBUG ((EFI_D_ERROR, "APIC ID Order Table ReOrdered\n"));=0D - DebugDisplayReOrderTable();=0D + DEBUG ((DEBUG_INFO, "APIC ID Order Table ReOrdered\n"));=0D + DebugDisplayReOrderTable ();=0D =0D mCpuOrderSorted =3D TRUE;=0D }=0D @@ -602,11 +458,11 @@ InitializeMadtHeader ( }=0D =0D Status =3D InitializeHeader (=0D - &MadtHeader->Header,=0D - EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,=0D - EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,=0D - 0=0D - );=0D + &MadtHeader->Header,=0D + EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,=0D + EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,=0D + 0=0D + );=0D if (EFI_ERROR (Status)) {=0D return Status;=0D }=0D @@ -784,11 +640,11 @@ BuildAcpiTable ( // Allocate the memory needed for the table.=0D //=0D Status =3D AllocateTable (=0D - TableSpecificHdrLength,=0D - Structures,=0D - StructureCount,=0D - &InternalTable=0D - );=0D + TableSpecificHdrLength,=0D + Structures,=0D + StructureCount,=0D + &InternalTable=0D + );=0D if (EFI_ERROR (Status)) {=0D return Status;=0D }=0D @@ -871,18 +727,22 @@ InstallMadtFromScratch ( NewMadtTable =3D NULL;=0D MaxMadtStructCount =3D 0;=0D =0D - DetectApicIdMap();=0D + mCpuApicIdOrderTable =3D AllocateZeroPool (mNumberOfCpus * sizeof (EFI_C= PU_ID_ORDER_MAP));=0D + if (mCpuApicIdOrderTable =3D=3D NULL) {=0D + DEBUG ((DEBUG_ERROR, "Could not allocate mCpuApicIdOrderTable structur= e pointer array\n"));=0D + return EFI_OUT_OF_RESOURCES;=0D + }=0D =0D // Call for Local APIC ID Reorder=0D Status =3D SortCpuLocalApicInTable ();=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status));= =0D + DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status));= =0D goto Done;=0D }=0D =0D MaxMadtStructCount =3D (UINT32) (=0D - MAX_CPU_NUM + // processor local APIC structures=0D - MAX_CPU_NUM + // processor local x2APIC structures=0D + mNumberOfCpus + // processor local APIC structures=0D + mNumberOfCpus + // processor local x2APIC structures=0D 1 + PcdGet8(PcdPcIoApicCount) + // I/O APIC structures=0D 2 + // interrupt source override structures=0D 1 + // local APIC NMI structures=0D @@ -906,11 +766,11 @@ InstallMadtFromScratch ( //=0D Status =3D InitializeMadtHeader (&MadtTableHeader);=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", Status));=0D + DEBUG ((DEBUG_ERROR, "InitializeMadtHeader failed: %r\n", Status));=0D goto Done;=0D }=0D =0D - DEBUG ((EFI_D_INFO, "Number of CPUs detected =3D %d \n", mNumberOfCPUs))= ;=0D + DEBUG ((DEBUG_INFO, "Number of CPUs detected =3D %d \n", mNumberOfCpus))= ;=0D =0D //=0D // Build Processor Local APIC Structures and Processor Local X2APIC Stru= ctures=0D @@ -923,7 +783,7 @@ InstallMadtFromScratch ( ProcLocalX2ApicStruct.Reserved[0] =3D 0;=0D ProcLocalX2ApicStruct.Reserved[1] =3D 0;=0D =0D - for (Index =3D 0; Index < MAX_CPU_NUM; Index++) {=0D + for (Index =3D 0; Index < mNumberOfCpus; Index++) {=0D //=0D // If x2APIC mode is not enabled, and if it is possible to express the= =0D // APIC ID as a UINT8, use a processor local APIC structure. Otherwise= ,=0D @@ -936,10 +796,10 @@ InstallMadtFromScratch ( =0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &ProcLocalApicStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &ProcLocalApicStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D } else if (mCpuApicIdOrderTable[Index].ApicId !=3D 0xFFFFFFFF) {=0D ProcLocalX2ApicStruct.Flags =3D (UINT8) mCpuApicIdOrderTa= ble[Index].Flags;=0D ProcLocalX2ApicStruct.X2ApicId =3D mCpuApicIdOrderTable[Inde= x].ApicId;=0D @@ -947,13 +807,13 @@ InstallMadtFromScratch ( =0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &ProcLocalX2ApicStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D }=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: = %r\n", Status));=0D + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: = %r\n", Status));=0D goto Done;=0D }=0D }=0D @@ -965,44 +825,44 @@ InstallMadtFromScratch ( IoApicStruct.Length =3D sizeof (EFI_ACPI_4_0_IO_APIC_STRUCTURE);=0D IoApicStruct.Reserved =3D 0;=0D =0D - PcIoApicEnable =3D PcdGet32(PcdPcIoApicEnable);=0D + PcIoApicEnable =3D PcdGet32 (PcdPcIoApicEnable);=0D =0D - if (FixedPcdGet32(PcdMaxCpuSocketCount) <=3D 4) {=0D + if (FixedPcdGet32 (PcdMaxCpuSocketCount) <=3D 4) {=0D IoApicStruct.IoApicId =3D PcdGet8(PcdIoApicId);=0D IoApicStruct.IoApicAddress =3D PcdGet32(PcdIoApicAddress);= =0D IoApicStruct.GlobalSystemInterruptBase =3D 0;=0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &IoApicStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &IoApicStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", St= atus));=0D + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", St= atus));=0D goto Done;=0D }=0D }=0D =0D for (PcIoApicIndex =3D 0; PcIoApicIndex < PcdGet8(PcdPcIoApicCount); PcI= oApicIndex++) {=0D - PcIoApicMask =3D (1 << PcIoApicIndex);=0D - if ((PcIoApicEnable & PcIoApicMask) =3D=3D 0) {=0D - continue;=0D - }=0D + PcIoApicMask =3D (1 << PcIoApicIndex);=0D + if ((PcIoApicEnable & PcIoApicMask) =3D=3D 0) {=0D + continue;=0D + }=0D =0D - IoApicStruct.IoApicId =3D (UINT8)(PcdGet8(PcdPcIoAp= icIdBase) + PcIoApicIndex);=0D - IoApicStruct.IoApicAddress =3D CurrentIoApicAddress;=0D - CurrentIoApicAddress =3D (CurrentIoApicAddress & 0= xFFFF8000) + 0x8000;=0D - IoApicStruct.GlobalSystemInterruptBase =3D (UINT32)(24 + (PcIoApicIn= dex * 8));=0D - ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D - Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &IoApicStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D - if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", = Status));=0D - goto Done;=0D - }=0D + IoApicStruct.IoApicId =3D (UINT8)(PcdGet8(PcdPcIoApic= IdBase) + PcIoApicIndex);=0D + IoApicStruct.IoApicAddress =3D CurrentIoApicAddress;=0D + CurrentIoApicAddress =3D (CurrentIoApicAddress & 0xF= FFF8000) + 0x8000;=0D + IoApicStruct.GlobalSystemInterruptBase =3D (UINT32)(24 + (PcIoApicInde= x * 8));=0D + ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D + Status =3D CopyStructure (=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &IoApicStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D + if (EFI_ERROR (Status)) {=0D + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n", St= atus));=0D + goto Done;=0D + }=0D }=0D =0D //=0D @@ -1021,12 +881,12 @@ InstallMadtFromScratch ( =0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &IntSrcOverrideStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &IntSrcOverrideStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed:= %r\n", Status));=0D + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ2 source override) failed:= %r\n", Status));=0D goto Done;=0D }=0D =0D @@ -1040,12 +900,12 @@ InstallMadtFromScratch ( =0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &IntSrcOverrideStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &IntSrcOverrideStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed:= %r\n", Status));=0D + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ9 source override) failed:= %r\n", Status));=0D goto Done;=0D }=0D =0D @@ -1060,12 +920,12 @@ InstallMadtFromScratch ( =0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &LocalApciNmiStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &LocalApciNmiStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Stat= us));=0D + DEBUG ((DEBUG_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Stat= us));=0D goto Done;=0D }=0D =0D @@ -1084,10 +944,10 @@ InstallMadtFromScratch ( =0D ASSERT (MadtStructsIndex < MaxMadtStructCount);=0D Status =3D CopyStructure (=0D - &MadtTableHeader.Header,=0D - (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct,=0D - &MadtStructs[MadtStructsIndex++]=0D - );=0D + &MadtTableHeader.Header,=0D + (STRUCTURE_HEADER *) &LocalX2ApicNmiStruct,=0D + &MadtStructs[MadtStructsIndex++]=0D + );=0D if (EFI_ERROR (Status)) {=0D DEBUG ((DEBUG_ERROR, "CopyMadtStructure (x2APIC NMI) failed: %r\n", = Status));=0D goto Done;=0D @@ -1098,14 +958,14 @@ InstallMadtFromScratch ( // Build Madt Structure from the Madt Header and collection of pointers = in MadtStructs[]=0D //=0D Status =3D BuildAcpiTable (=0D - (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader,=0D - sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER),=0D - MadtStructs,=0D - MadtStructsIndex,=0D - (UINT8 **)&NewMadtTable=0D - );=0D + (EFI_ACPI_DESCRIPTION_HEADER *) &MadtTableHeader,=0D + sizeof (EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER),= =0D + MadtStructs,=0D + MadtStructsIndex,=0D + (UINT8 **) &NewMadtTable=0D + );=0D if (EFI_ERROR (Status)) {=0D - DEBUG ((EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status));=0D + DEBUG ((DEBUG_ERROR, "BuildAcpiTable failed: %r\n", Status));=0D goto Done;=0D }=0D =0D @@ -1113,11 +973,11 @@ InstallMadtFromScratch ( // Publish Madt Structure to ACPI=0D //=0D Status =3D mAcpiTable->InstallAcpiTable (=0D - mAcpiTable,=0D - NewMadtTable,=0D - NewMadtTable->Header.Length,=0D - &TableHandle=0D - );=0D + mAcpiTable,=0D + NewMadtTable,=0D + NewMadtTable->Header.Length,=0D + &TableHandle=0D + );=0D =0D Done:=0D //=0D @@ -1136,6 +996,10 @@ Done: FreePool (NewMadtTable);=0D }=0D =0D + if (mCpuApicIdOrderTable !=3D NULL) {=0D + FreePool (mCpuApicIdOrderTable);=0D + }=0D +=0D return Status;=0D }=0D =0D @@ -1155,8 +1019,8 @@ InstallMcfgFromScratch ( PciSegmentInfo =3D GetPciSegmentInfo (&SegmentCount);=0D =0D McfgTable =3D AllocateZeroPool (=0D - sizeof(EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_T= ABLE_HEADER) +=0D - sizeof(EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE= _BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount=0D + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_= TABLE_HEADER) +=0D + sizeof (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPAC= E_BASE_ADDRESS_ALLOCATION_STRUCTURE) * SegmentCount=0D );=0D if (McfgTable =3D=3D NULL) {=0D DEBUG ((DEBUG_ERROR, "Could not allocate MCFG structure\n"));=0D @@ -1164,11 +1028,11 @@ InstallMcfgFromScratch ( }=0D =0D Status =3D InitializeHeader (=0D - &McfgTable->Header,=0D - EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRES= S_DESCRIPTION_TABLE_SIGNATURE,=0D - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,=0D - 0=0D - );=0D + &McfgTable->Header,=0D + EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BA= SE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,=0D + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVIS= ION,=0D + 0=0D + );=0D if (EFI_ERROR (Status)) {=0D return Status;=0D }=0D @@ -1192,11 +1056,11 @@ InstallMcfgFromScratch ( // Publish Madt Structure to ACPI=0D //=0D Status =3D mAcpiTable->InstallAcpiTable (=0D - mAcpiTable,=0D - McfgTable,=0D - McfgTable->Header.Length,=0D - &TableHandle=0D - );=0D + mAcpiTable,=0D + McfgTable,=0D + McfgTable->Header.Length,=0D + &TableHandle=0D + );=0D =0D return Status;=0D }=0D @@ -1280,7 +1144,7 @@ PlatformUpdateTables ( switch (Table->Signature) {=0D =0D case EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE:=0D - ASSERT(FALSE);=0D + ASSERT (FALSE);=0D break;=0D =0D case EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:=0D @@ -1324,9 +1188,9 @@ PlatformUpdateTables ( FadtHeader->XGpe1Blk.AccessSize =3D 0;=0D }=0D =0D - DEBUG(( EFI_D_ERROR, "ACPI FADT table @ address 0x%x\n", Table ));=0D - DEBUG(( EFI_D_ERROR, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch= ));=0D - DEBUG(( EFI_D_ERROR, " Flags 0x%x\n", FadtHeader->Flags ));=0D + DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table));=0D + DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)= );=0D + DEBUG ((DEBUG_INFO, " Flags 0x%x\n", FadtHeader->Flags));=0D break;=0D =0D case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:=0D @@ -1346,12 +1210,12 @@ PlatformUpdateTables ( HpetBlockId.Bits.VendorId =3D HpetCapabilities.Bits.VendorId;=0D HpetTable->EventTimerBlockId =3D HpetBlockId.Uint32;=0D HpetTable->MainCounterMinimumClockTickInPeriodicMode =3D (UINT16)HpetC= apabilities.Bits.CounterClockPeriod;=0D - DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x\n", Table ));=0D - DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddres= s) ));=0D + DEBUG ((DEBUG_INFO, "ACPI HPET table @ address 0x%x\n", Table));=0D + DEBUG ((DEBUG_INFO, " HPET base 0x%x\n", PcdGet32 (PcdHpetBaseAddress= )));=0D break;=0D =0D case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADD= RESS_DESCRIPTION_TABLE_SIGNATURE:=0D - ASSERT(FALSE);=0D + ASSERT (FALSE);=0D break;=0D =0D default:=0D @@ -1403,8 +1267,8 @@ IsHardwareChange ( // pFADT->XDsdt=0D //=0D HWChangeSize =3D HandleCount + 1;=0D - HWChange =3D AllocateZeroPool( sizeof(UINT32) * HWChangeSize );=0D - ASSERT( HWChange !=3D NULL );=0D + HWChange =3D AllocateZeroPool (sizeof(UINT32) * HWChangeSize);=0D + ASSERT(HWChange !=3D NULL);=0D =0D if (HWChange =3D=3D NULL) return;=0D =0D @@ -1445,14 +1309,14 @@ IsHardwareChange ( // Calculate CRC value with HWChange data.=0D //=0D Status =3D gBS->CalculateCrc32(HWChange, HWChangeSize, &CRC);=0D - DEBUG((DEBUG_INFO, "CRC =3D %x and Status =3D %r\n", CRC, Status));=0D + DEBUG ((DEBUG_INFO, "CRC =3D %x and Status =3D %r\n", CRC, Status));=0D =0D //=0D // Set HardwareSignature value based on CRC value.=0D //=0D FacsPtr =3D (EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)(UINTN)pFADT= ->FirmwareCtrl;=0D FacsPtr->HardwareSignature =3D CRC;=0D - FreePool( HWChange );=0D + FreePool (HWChange);=0D }=0D =0D VOID=0D @@ -1475,17 +1339,16 @@ UpdateLocalTable ( =0D if (Version !=3D EFI_ACPI_TABLE_VERSION_NONE) {=0D Status =3D mAcpiTable->InstallAcpiTable (=0D - mAcpiTable,=0D - CurrentTable,=0D - CurrentTable->Length,=0D - &TableHandle=0D - );=0D + mAcpiTable,=0D + CurrentTable,=0D + CurrentTable->Length,=0D + &TableHandle=0D + );=0D ASSERT_EFI_ERROR (Status);=0D }=0D }=0D }=0D =0D -=0D VOID=0D EFIAPI=0D AcpiEndOfDxeEvent (=0D @@ -1493,16 +1356,14 @@ AcpiEndOfDxeEvent ( VOID *ParentImageHandle=0D )=0D {=0D -=0D if (Event !=3D NULL) {=0D - gBS->CloseEvent(Event);=0D + gBS->CloseEvent (Event);=0D }=0D =0D -=0D //=0D // Calculate Hardware Signature value based on current platform configur= ations=0D //=0D - IsHardwareChange();=0D + IsHardwareChange ();=0D }=0D =0D /**=0D @@ -1526,7 +1387,6 @@ InstallAcpiPlatform ( EFI_STATUS Status;=0D EFI_EVENT EndOfDxeEvent;=0D =0D -=0D Status =3D gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID = **)&mMpService);=0D ASSERT_EFI_ERROR (Status);=0D =0D @@ -1550,19 +1410,19 @@ InstallAcpiPlatform ( // Determine the number of processors=0D //=0D mMpService->GetNumberOfProcessors (=0D - mMpService,=0D - &mNumberOfCPUs,=0D - &mNumberOfEnabledCPUs=0D - );=0D - ASSERT (mNumberOfCPUs <=3D MAX_CPU_NUM && mNumberOfEnabledCPUs >=3D 1);= =0D - DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d\n", mNumberOfCPUs));=0D + mMpService,=0D + &mNumberOfCpus,=0D + &mNumberOfEnabledCPUs=0D + );=0D +=0D + DEBUG ((DEBUG_INFO, "mNumberOfCpus - %d\n", mNumberOfCpus));=0D DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEnabledCPUs)= );=0D =0D DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled));=0D DEBUG ((DEBUG_INFO, "mForceX2ApicId - 0x%x\n", mForceX2ApicId));=0D =0D // support up to 64 threads/socket=0D - AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL= );=0D + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NUL= L);=0D mNumOfBitShift &=3D 0x1F;=0D DEBUG ((DEBUG_INFO, "mNumOfBitShift - 0x%x\n", mNumOfBitShift));=0D =0D --=20 2.26.2.windows.1