[edk2-platforms PATCH 4/7] SolidRun/Armada80x0McBin: AcpiTables: Introduce DBG2 table

["Marcin Wojtas" <mw@semihalf.com>]

The DBG2 table is mandatory as per SBBR v1.2 specification.
Expose it via J25 jumper on the Armada 8040 MacchiatoBin
platform.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf       |  1 +
 Silicon/Marvell/Armada7k8k/AcpiTables/AcpiHeader.h              |  2 +
 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.h    |  9 +++
 Silicon/Marvell/Armada7k8k/AcpiTables/IcuInterrupts.h           |  2 +
 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.aslc | 74 ++++++++++++++++++++
 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl  | 33 +++++++++
 Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc                 |  2 -
 7 files changed, 121 insertions(+), 2 deletions(-)
 create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.h
 create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.aslc

diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf
index 7cf9ecfbfd..98e5cc8b6e 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf
@@ -18,6 +18,7 @@
   VERSION_STRING                 = 1.0
 
 [Sources]
+  Armada80x0McBin/Dbg2.aslc
   Armada80x0McBin/Dsdt.asl
   Armada80x0McBin/Mcfg.aslc
   Fadt.aslc
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/AcpiHeader.h b/Silicon/Marvell/Armada7k8k/AcpiTables/AcpiHeader.h
index 90ab607845..9d83ba7837 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/AcpiHeader.h
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/AcpiHeader.h
@@ -11,6 +11,8 @@
 
 #include <IndustryStandard/Acpi.h>
 
+#define MV_UART_AS32(Address) { EFI_ACPI_5_0_SYSTEM_MEMORY, 32, 0, EFI_ACPI_5_0_BYTE, Address }
+
 #define ACPI_OEM_ID_ARRAY        {'M','V','E','B','U',' '}
 #define ACPI_OEM_REVISION        0
 #define ACPI_CREATOR_ID          SIGNATURE_32('L','N','R','O')
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.h b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.h
new file mode 100644
index 0000000000..b8ac770ed5
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.h
@@ -0,0 +1,9 @@
+/**
+
+  Copyright (C) 2021, Semihalf.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#define ARMADA80X0_MCBIN_DBG2_UART_REG_BASE        0xF2702100
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/IcuInterrupts.h b/Silicon/Marvell/Armada7k8k/AcpiTables/IcuInterrupts.h
index dd33cb5e7b..b106790913 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/IcuInterrupts.h
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/IcuInterrupts.h
@@ -22,6 +22,8 @@
 #define CP_GIC_SPI_CP0_USB_H1          112
 #define CP_GIC_SPI_CP0_USB_H0          113
 #define CP_GIC_SPI_CP0_SATA_H0         114
+#define CP_GIC_SPI_CP0_UART0           121
+#define CP_GIC_SPI_CP0_UART1           122
 
 #define CP_GIC_SPI_CP1_PCI0            288
 #define CP_GIC_SPI_CP1_PCI1            289
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.aslc b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.aslc
new file mode 100644
index 0000000000..1e6d99ee9e
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dbg2.aslc
@@ -0,0 +1,74 @@
+/** @file
+*  Debug Port Table (DBG2)
+*
+*  Copyright (c) 2020 Linaro Ltd. All rights reserved.
+*  Copyright (c) 2021 ARM Ltd. All rights reserved.
+*  Copyright (c) 2021 Semihalf. All rights reserved.
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiHeader.h"
+#include "Armada80x0McBin/Dbg2.h"
+
+#pragma pack(1)
+
+#define ARMADA7K8K_UART_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '2', 0x00 }
+
+typedef struct {
+  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+  EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
+  UINT32                                        AddressSize;
+  UINT8                                         NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
+  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+  {
+    __ACPI_HEADER (
+      EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+      DBG2_TABLE,
+      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+    ),
+    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+    1                                      /* NumberOfDebugPorts */
+  },
+  {
+    {
+      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+      sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+      1,                                   /* NumberofGenericAddressRegisters */
+      10,                                  /* NameSpaceStringLength */
+      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+      0,                                   /* OemDataLength */
+      0,                                   /* OemDataOffset */
+      EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_MS_DBGP_SPEC,
+      {
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE
+      },
+      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+    },
+    MV_UART_AS32 (ARMADA80X0_MCBIN_DBG2_UART_REG_BASE),  /* BaseAddress */
+    SIZE_4KB,                                            /* AddressSize */
+    ARMADA7K8K_UART_STR,                                 /* NameSpaceString */
+  }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
index 1ecbd0309c..a7d1c76e07 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
@@ -8,6 +8,7 @@
 
 **/
 
+#include "Armada80x0McBin/Dbg2.h"
 #include "Armada80x0McBin/Pcie.h"
 #include "IcuInterrupts.h"
 
@@ -246,6 +247,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
         {
             Name (_HID, "MRVL0001")                             // _HID: Hardware ID
             Name (_CID, "HISI0031")                             // _CID: Compatible ID
+            Name (_UID, 0x00)                                   // _UID: Unique ID
             Method (_STA)                                       // _STA: Device status
             {
                 Return (0xF)
@@ -272,6 +274,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
             })
         }
 
+        Device (COM2)
+        {
+            Name (_HID, "MRVL0001")                             // _HID: Hardware ID
+            Name (_CID, "HISI0031")                             // _CID: Compatible ID
+            Name (_UID, 0x01)                                   // _UID: Unique ID
+            Method (_STA)                                       // _STA: Device status
+            {
+                Return (0xF)
+            }
+            Name (_ADR, ARMADA80X0_MCBIN_DBG2_UART_REG_BASE)    // _ADR: Address
+            Name (_CRS, ResourceTemplate ()                     // _CRS: Current Resource Settings
+            {
+                Memory32Fixed (ReadWrite,
+                    ARMADA80X0_MCBIN_DBG2_UART_REG_BASE,        // Address Base
+                    0x00000100,                                 // Address Length
+                    )
+                Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+                {
+                  CP_GIC_SPI_CP0_UART1
+                }
+            })
+            Name (_DSD, Package () {
+                ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                Package () {
+                      Package () { "clock-frequency", FixedPcdGet32 (PcdSerialClockRate) },
+                      Package () { "reg-io-width", 1 },
+                      Package () { "reg-shift", 2 },
+                }
+            })
+        }
+
         Device (SMI0)
         {
             Name (_HID, "MRVL0100")                             // _HID: Hardware ID
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc b/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc
index 6efc175bdf..48e6699f52 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc
@@ -15,8 +15,6 @@
 
 #include "AcpiHeader.h"
 
-#define MV_UART_AS32(Address) { EFI_ACPI_5_0_SYSTEM_MEMORY, 32, 0, EFI_ACPI_5_0_BYTE, Address }
-
 EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
   __ACPI_HEADER(EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
                 EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
-- 
2.29.0