From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-yb1-f202.google.com (mail-yb1-f202.google.com [209.85.219.202]) by mx.groups.io with SMTP id smtpd.web12.3895.1626873862823102837 for ; Wed, 21 Jul 2021 06:24:22 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@google.com header.s=20161025 header.b=Z8YaKjHv; spf=pass (domain: flex--chengchieh.bounces.google.com, ip: 209.85.219.202, mailfrom: 3bsd4yaokbtqsxudwsxyuxweewbu.sectulubutas.whekfi.ye@flex--chengchieh.bounces.google.com) Received: by mail-yb1-f202.google.com with SMTP id 132-20020a25158a0000b029055791ebe1e6so3143806ybv.20 for ; Wed, 21 Jul 2021 06:24:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=EAcvzv2EVPMdojnVgptLv6L+Kbrf41QEYMHAZi5Z9W8=; b=Z8YaKjHv4Ix6Q7fzNTK/0nCAPFQW7LMpTf72d+b3ZH81qTWSbKEguEkMPbGrZheOpo 3Gf/8XSJYQyT+zbRYhOdr/vV/WBPbUCRU4cOYWAjPbKKJ5yTMRrDA5JSTXRRDAL9piIt OBxf8H8QxVQWzG7qHxdvWaSTww1BlcU3Q7OK2BQS1fQf6qMRz8M4z+ndVX/fOzNh8Bic Wk/7V754nbFGV2+By20QPQKsQProPa5LeBVmYwXGw4W82f/vO7RDz0hALaxvv8V8sULG ytm3clb4EJu8CMUlIJuNBTEyVGqTWeKuOXqTX0e62ksmEEUWR9C9ewfthg5bx/9T+5lb nZRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=EAcvzv2EVPMdojnVgptLv6L+Kbrf41QEYMHAZi5Z9W8=; b=mW0HMZyhcdrQ+yOcnBrvTNISW9AhPrwCNTrfrnNALfqsN0hV/iXA0vcqAidI4Bbu9+ XC0pOJQ5Wilagw4Keg5BA0gYwukFjeNOZLu0HoB9Vv/tNeZmwv6VwrPAw4pjQ8i0TGsC r2mgvQZlMrod/stbn/aBZA17SzkK4Iez2JQJYMVG+tuhhJNJWC18WmJGvVe0qn8I3KP8 2csiaw2Za4KTYD7YErPWpFbWoKdsXiwysV95OZiILE+tNthtEELmArNC2ml9sQa9/Jng HP1ml/vf3fE6pecgJHdYEeWQb+ouhIEPBf+5lxxTNJjm0hNKehZ71drvZfRzEzUtcYKi cpOw== X-Gm-Message-State: AOAM531K/VQvQTcIkCR9Zh714hCNJRa45BR94+bDszB73Dj+IZUnF+4X zpNxyOGumWphyFctCJ/q4pzS8mlOQwsTm5PLQJeECgqdNMJBgZDerEMehUmMauDvLzO7cptQvyj YCbSUI0VyCUpEvVGFyPyqbIyNLR/Ysjz59HFURkNOfA574+zIyUXz55vNusD2EtsdwW45aQ== X-Google-Smtp-Source: ABdhPJyNaqGmjjEgB+A0cc0190zoHSN35G1Ddew2jPQPIy0K4Z2Lry8fdUnHauitv8Mvulya2FgdN+AU6ETvMS47 X-Received: from ratho96.c.googlers.com ([fda3:e722:ac3:cc00:3:22c1:c0a8:aae]) (user=chengchieh job=sendgmr) by 2002:a25:d88a:: with SMTP id p132mr47959033ybg.409.1626873861600; Wed, 21 Jul 2021 06:24:21 -0700 (PDT) Date: Wed, 21 Jul 2021 13:23:23 +0000 In-Reply-To: <20210721132328.1415485-1-chengchieh@google.com> Message-Id: <20210721132328.1415485-2-chengchieh@google.com> Mime-Version: 1.0 References: <20210721132328.1415485-1-chengchieh@google.com> X-Mailer: git-send-email 2.32.0.402.g57bb445576-goog Subject: [PATCH v1 1/6] UefiPayloadPkg: Add LINUXBOOT payload target From: Cheng-Chieh Huang To: devel@edk2.groups.io Cc: Cheng-Chieh Huang Content-Type: text/plain; charset="UTF-8" Initial commit to support linuxboot payload. Signed-off-by: Cheng-Chieh Huang --- UefiPayloadPkg/UefiPayloadPkg.dsc | 16 +- UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf | 39 +++++ UefiPayloadPkg/Include/Linuxboot.h | 47 ++++++ UefiPayloadPkg/Library/LbParseLib/LbParseLib.c | 168 ++++++++++++++++++++ UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 6 +- CryptoPkg/Library/OpensslLib/openssl | 2 +- 6 files changed, 270 insertions(+), 8 deletions(-) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index bcedf1c746b4..54576ba485b7 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -33,6 +33,7 @@ [Defines] # # SBL: UEFI payload for Slim Bootloader # COREBOOT: UEFI payload for coreboot + # LINUXBOOT: UEFI payload for linuxboot # DEFINE BOOTLOADER = SBL @@ -93,6 +94,9 @@ [Defines] [BuildOptions] *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES +!if $(BOOTLOADER) == "LINUXBOOT" + *_*_*_CC_FLAGS = -D LINUXBOOT_PAYLOAD +!endif GCC:*_UNIXGCC_*_CC_FLAGS = -DMDEPKG_NDEBUG GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG @@ -222,11 +226,13 @@ [LibraryClasses] !endif PlatformSupportLib|UefiPayloadPkg/Library/PlatformSupportLibNull/PlatformSupportLibNull.inf !if $(UNIVERSAL_PAYLOAD) == FALSE - !if $(BOOTLOADER) == "COREBOOT" - BlParseLib|UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf - !else - BlParseLib|UefiPayloadPkg/Library/SblParseLib/SblParseLib.inf - !endif + !if $(BOOTLOADER) == "COREBOOT" + BlParseLib|UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf + !elseif $(BOOTLOADER) == "LINUXBOOT" + BlParseLib|UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf + !else + BlParseLib|UefiPayloadPkg/Library/SblParseLib/SblParseLib.inf + !endif !endif DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf diff --git a/UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf b/UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf new file mode 100644 index 000000000000..d75ba8db8cf3 --- /dev/null +++ b/UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf @@ -0,0 +1,39 @@ +## @file +# Linuxboot Table Parse Library. +# +# Copyright (c) 2021, the u-root Authors. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = LbParseLib + FILE_GUID = DBA15E1E-4C16-47DF-93C0-AB5888ED14C3 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = BlParseLib + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 +# + +[Sources] + LbParseLib.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + UefiPayloadPkg/UefiPayloadPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + IoLib + DebugLib + PcdLib + +[Pcd] + gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemBase diff --git a/UefiPayloadPkg/Include/Linuxboot.h b/UefiPayloadPkg/Include/Linuxboot.h new file mode 100644 index 000000000000..34ca18069983 --- /dev/null +++ b/UefiPayloadPkg/Include/Linuxboot.h @@ -0,0 +1,47 @@ +/** @file + LinuxBoot PEI module include file. +**/ +#ifndef _LINUXBOOT_PEI_H_INCLUDED_ +#define _LINUXBOOT_PEI_H_INCLUDED_ + +#if defined(_MSC_VER) +#pragma warning(disable : 4200) +#endif + +#pragma pack(1) +typedef struct SerialPortConfigStruct { + UINT32 Type; + UINT32 BaseAddr; + UINT32 Baud; + UINT32 RegWidth; + UINT32 InputHertz; + UINT32 UartPciAddr; +} SerialPortConfig; + +typedef struct MemoryMapEntryStruct { + UINT64 Start; + UINT64 End; + UINT32 Type; +} MemoryMapEntry; + +typedef struct UefiPayloadConfigStruct { + UINT64 Version; + UINT64 AcpiBase; + UINT64 AcpiSize; + UINT64 SmbiosBase; + UINT64 SmbiosSize; + SerialPortConfig SerialConfig; + UINT32 NumMemoryMapEntries; + MemoryMapEntry MemoryMapEntries[0]; +} UefiPayloadConfig; +#pragma pack() + +#define UEFI_PAYLOAD_CONFIG_VERSION 1 + +#define LINUXBOOT_MEM_RAM 1 +#define LINUXBOOT_MEM_DEFAULT 2 +#define LINUXBOOT_MEM_ACPI 3 +#define LINUXBOOT_MEM_NVS 4 +#define LINUXBOOT_MEM_RESERVED 5 + +#endif // _LINUXBOOT_PEI_H_INCLUDED_ diff --git a/UefiPayloadPkg/Library/LbParseLib/LbParseLib.c b/UefiPayloadPkg/Library/LbParseLib/LbParseLib.c new file mode 100644 index 000000000000..34bfb6a1073f --- /dev/null +++ b/UefiPayloadPkg/Library/LbParseLib/LbParseLib.c @@ -0,0 +1,168 @@ +/** @file + This library will parse the linuxboot table in memory and extract those required + information. + + Copyright (c) 2021, the u-root Authors. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +// Retrieve UefiPayloadConfig from Linuxboot's uefiboot +UefiPayloadConfig* GetUefiPayLoadConfig() { + UefiPayloadConfig* config = + (UefiPayloadConfig*)(UINTN)(PcdGet32(PcdPayloadFdMemBase) - SIZE_64KB); + if (config->Version != UEFI_PAYLOAD_CONFIG_VERSION) { + DEBUG((DEBUG_ERROR, "Expect payload config version: %d, but get %d\n", + UEFI_PAYLOAD_CONFIG_VERSION, config->Version)); + CpuDeadLoop (); + } + return config; +} + +// Align the address and add memory rang to MemInfoCallback +void AddMemoryRange(IN BL_MEM_INFO_CALLBACK MemInfoCallback, IN UINTN start, + IN UINTN end, IN int type) { + MEMROY_MAP_ENTRY MemoryMap; + UINTN AlignedStart; + UINTN AlignedEnd; + AlignedStart = ALIGN_VALUE(start, SIZE_4KB); + AlignedEnd = ALIGN_VALUE(end, SIZE_4KB); + // Conservative adjustment on Memory map. This should happen when booting from + // non UEFI bios and it may report a memory region less than 4KB. + if (AlignedStart > start && type != LINUXBOOT_MEM_RAM) { + AlignedStart -= SIZE_4KB; + } + if (AlignedEnd > end + 1 && type == LINUXBOOT_MEM_RAM) { + AlignedEnd -= SIZE_4KB; + } + MemoryMap.Base = AlignedStart; + MemoryMap.Size = AlignedEnd - AlignedStart; + MemoryMap.Type = type; + MemoryMap.Flag = 0; + MemInfoCallback(&MemoryMap, NULL); +} + +/** + Acquire the memory information from the linuxboot table in memory. + + @param MemInfoCallback The callback routine + @param Params Pointer to the callback routine parameter + + @retval RETURN_SUCCESS Successfully find out the memory information. + @retval RETURN_NOT_FOUND Failed to find the memory information. + +**/ +RETURN_STATUS +EFIAPI +ParseMemoryInfo(IN BL_MEM_INFO_CALLBACK MemInfoCallback, IN VOID* Params) { + UefiPayloadConfig* config; + int i; + + config = GetUefiPayLoadConfig(); + + DEBUG((DEBUG_INFO, "MemoryMap #entries: %d\n", config->NumMemoryMapEntries)); + + MemoryMapEntry* entry = &config->MemoryMapEntries[0]; + for (i = 0; i < config->NumMemoryMapEntries; i++) { + DEBUG((DEBUG_INFO, "Start: 0x%lx End: 0x%lx Type:%d\n", entry->Start, + entry->End, entry->Type)); + AddMemoryRange(MemInfoCallback, entry->Start, entry->End, entry->Type); + entry++; + } + return RETURN_SUCCESS; +} + +/** + Acquire acpi table and smbios table from linuxboot + + @param SystemTableInfo Pointer to the system table info + + @retval RETURN_SUCCESS Successfully find out the tables. + @retval RETURN_NOT_FOUND Failed to find the tables. + +**/ +RETURN_STATUS +EFIAPI +ParseSystemTable(OUT SYSTEM_TABLE_INFO* SystemTableInfo) { + UefiPayloadConfig* config; + + config = GetUefiPayLoadConfig(); + SystemTableInfo->AcpiTableBase = config->AcpiBase; + SystemTableInfo->AcpiTableSize = config->AcpiSize; + + SystemTableInfo->SmbiosTableBase = config->SmbiosBase; + SystemTableInfo->SmbiosTableSize = config->SmbiosSize; + + return RETURN_SUCCESS; +} + +/** + Find the serial port information + + @param SERIAL_PORT_INFO Pointer to serial port info structure + + @retval RETURN_SUCCESS Successfully find the serial port information. + @retval RETURN_NOT_FOUND Failed to find the serial port information . + +**/ +RETURN_STATUS +EFIAPI +ParseSerialInfo(OUT SERIAL_PORT_INFO* SerialPortInfo) { + UefiPayloadConfig* config; + config = GetUefiPayLoadConfig(); + + SerialPortInfo->BaseAddr = config->SerialConfig.BaseAddr; + SerialPortInfo->RegWidth = config->SerialConfig.RegWidth; + SerialPortInfo->Type = config->SerialConfig.Type; + SerialPortInfo->Baud = config->SerialConfig.Baud; + SerialPortInfo->InputHertz = config->SerialConfig.InputHertz; + SerialPortInfo->UartPciAddr = config->SerialConfig.UartPciAddr; + + return RETURN_SUCCESS; +} + +/** + Find the video frame buffer information + + @param GfxInfo Pointer to the EFI_PEI_GRAPHICS_INFO_HOB structure + + @retval RETURN_SUCCESS Successfully find the video frame buffer +information. + @retval RETURN_NOT_FOUND Failed to find the video frame buffer information . + +**/ +RETURN_STATUS +EFIAPI +ParseGfxInfo(OUT EFI_PEI_GRAPHICS_INFO_HOB* GfxInfo) { + // Not supported + return RETURN_NOT_FOUND; +} + +/** + Find the video frame buffer device information + + @param GfxDeviceInfo Pointer to the EFI_PEI_GRAPHICS_DEVICE_INFO_HOB +structure + + @retval RETURN_SUCCESS Successfully find the video frame buffer +information. + @retval RETURN_NOT_FOUND Failed to find the video frame buffer information. + +**/ +RETURN_STATUS +EFIAPI +ParseGfxDeviceInfo(OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB* GfxDeviceInfo) { + return RETURN_NOT_FOUND; +} diff --git a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index b0268f05069c..a4f714f765ea 100644 --- a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -40,8 +40,9 @@ AdjustRootBridgeResource ( IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G ) { +#ifndef LINUXBOOT_PAYLOAD UINT64 Mask; - +#endif // // For now try to downgrade everything into MEM32 since // - coreboot does not assign resource above 4GB @@ -80,7 +81,7 @@ AdjustRootBridgeResource ( PMemAbove4G->Base = MAX_UINT64; PMemAbove4G->Limit = 0; } - +#ifndef LINUXBOOT_PAYLOAD // // Align IO resource at 4K boundary // @@ -98,6 +99,7 @@ AdjustRootBridgeResource ( if (Mem->Base != MAX_UINT64) { Mem->Base &= ~Mask; } +#endif } /** diff --git a/CryptoPkg/Library/OpensslLib/openssl b/CryptoPkg/Library/OpensslLib/openssl index 52c587d60be6..e2e09d9fba11 160000 --- a/CryptoPkg/Library/OpensslLib/openssl +++ b/CryptoPkg/Library/OpensslLib/openssl @@ -1 +1 @@ -Subproject commit 52c587d60be67c337364b830dd3fdc15404a2f04 +Subproject commit e2e09d9fba1187f8d6aafaa34d4172f56f1ffb72 -- 2.32.0.402.g57bb445576-goog