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* [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances
@ 2021-08-03 15:00 Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 10/46] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
                   ` (5 more replies)
  0 siblings, 6 replies; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel
  Cc: Agyeman Prince, Chasel Chiu, Deepika Kethi Reddy, Eric Dong,
	Heng Luo, Jeremy Soller, Kathappan Esakkithevar, Liming Gao,
	Nate DeSimone, Rangasai V Chaganty

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

SpiFlashCommonLib is duplicated in multiple places across the MinPlatform
design in edk2-platforms. I'm planning to build some additional
functionality on top of SpiFlashCommonLib and, ideally, this duplication
will be consolidated into a single instance usable across all current library
consumers.

This patch series focuses on consolidating the various SpiFlashCommonLib
instances as agreed upon in https://edk2.groups.io/g/devel/message/71701.

Read the BZ for more general background around this series.

I only have an UpXtreme board on hand so maintainers/reviewers of other
board packages should test these changes on those boards.

V5 changes:
- Added build support for PurleyOpenBoardPkg and WhitleyOpenBoardPkg
  (added to edk2-platforms during the lifetime of this patch series).
- Updated KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash to
  use the new SPI PPI interface that identifies SPI flash regions
  by GUID.
- Added new Reviewed-by replies that came in to existing patches
  during v4.

V4 changes:
- Assigned new GUID values to the PCH SPI PPI and Protocols to
  differentiate from previous instances. This was done because
  the interface changed to identify SPI flash regions by GUID.

V3 changes:
- Added support to IntelSiliconPkg to identify flash regions by GUID as
  requested in v2 review feedback.
V2 changes:
- Rebased patch series on current edk2-platforms master (32183bdaa91)

Note: Previous patch series only received a couple review comments after
being on the mailing list for over 2 months. Please be respectful of
contributors time and efforts and review in a timely manner.

Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>

Michael Kubacki (46):
  CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
  WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
  CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
  IntelSiliconPkg: Add BIOS area base address and size PCDs
  IntelSiliconPkg: Add microcode FV PCDs
  IntelSiliconPkg: Add PCH SPI PPI
  IntelSiliconPkg: Add PCH SPI Protocol
  IntelSiliconPkg: Add SpiFlashCommonLib
  IntelSiliconPkg: Add SmmSpiFlashCommonLib
  IntelSiliconPkg: Add MM SPI FVB services
  CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  PurleyOpenBoardPkg: Use IntelSiliconPkg SpiFvbServiceSmm
  WhitleyOpenBoardPkg: UseIntelSiliconPkg SpiFvbServiceSmm
  MinPlatformPkg: Remove SpiFvbService modules
  CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
  KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib
  SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
  TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
  MinPlatformPkg: Remove SpiFlashCommonLibNull
  PurleyOpenBoardPkg: Add SpiFlashCommonLib.h
  KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
  CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
  KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
  SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
  TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
  IntelSiliconPkg: Add flash region GUIDs
  IntelSiliconPkg: Identify flash regions by GUID
  CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by
    GUID
  KabylakeSiliconPkg: Identify flash regions by GUID
  KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI
    API
  KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to
    build
  SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID
  TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by
    GUID

 Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c                                                                               |   4 +-
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c                                                                                        | 144 ++++++++--
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c                                                                                          | 196 -------------
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c                                                                                    |  54 ----
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c                                                                        |   0
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c                                                            |   4 +-
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c                                                                |   8 +-
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c                                                      |   0
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c                                                     |   0
 Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c |   2 +-
 {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c                                                         |   7 +-
 {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c                                                  |  12 +-
 Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c                                                                                                      | 106 ++++++-
 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c                                                                                            | 196 -------------
 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c                                                                                      |  54 ----
 Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c                                                                                           | 140 +++++++--
 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c                                                                                                    | 194 -------------
 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c                                                                                              |  54 ----
 Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c                                                                                                   | 165 ++++++++---
 Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c                                                                                                                                 |   4 +-
 Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c                                                                                     | 176 ++++++++++--
 Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf                                                                                                                    |   4 +-
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf                                                                                            |   4 +-
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc                                                                                                           |   7 +-
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf                                                                                                           |  38 +--
 Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf                                                                                 |   2 +-
 Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf                                                                                                   |   4 +-
 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf                                                                                                                     |   4 +-
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf                                                                                                |   4 +-
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc                                                                                                               |   7 +-
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf                                                                                                               |  40 +--
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf                                                                                              |   4 +-
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc                                                                                                             |   9 +-
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf                                                                                                             |  40 +--
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf                                                       |   4 +-
 Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf                                                                             |   2 +
 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h                                                                                                             |  98 -------
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec                                                                                                                              |   2 -
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc                                                                                                                              |   6 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.dsc                                                                                                             |   2 +-
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/OpenBoardPkg.fdf                                                                                                             |   2 +-
 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.dsc                                                                                                             |   4 +-
 Platform/Intel/PurleyOpenBoardPkg/BoardTiogaPass/OpenBoardPkg.fdf                                                                                                             |   5 +-
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc                                                                                                              |   6 +-
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf                                                                                                              |   2 +-
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc                                                                                                          |   8 +-
 Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf                                                                                                                    |   8 +-
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf                                                                                            |   4 +-
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc                                                                                                           |   7 +-
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf                                                                                                           |  40 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf                                                                                                                  |   4 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf                                                                               |   1 -
 Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf                                                                                                 |   4 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf                                                                                               |   4 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf                                                                           |   2 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc                                                                                                              |   7 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf                                                                                                              |  38 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf                                                                                        |   4 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc                                                                                                       |   7 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf                                                                                                       |  38 +--
 {Silicon/Intel/CoffeelakeSiliconPkg/Pch => Platform/Intel/WhitleyOpenBoardPkg}/Include/Library/SpiFlashCommonLib.h                                                            |   2 +-
 Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc                                                                                                                            |   2 +-
 Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf                                                                                                                            |   5 +-
 Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf                                                                                            |   4 +-
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h                                                                                              |  16 +-
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf                                                                                                        |   1 +
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf                                                                            |  13 +
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf                                                                                  |  51 ----
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf                                                                                                                  |   1 +
 Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec                                                                                                                                  |   8 -
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h                                                            |   0
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h                                                                |   0
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf                                                             |   6 +-
 {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf                                                    |   6 +-
 Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h                                                                                                                      |  45 +++
 Silicon/Intel/{SimicsIch10Pkg => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h                                                                                         |   2 +-
 Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h                                                                                                 |   4 +-
 Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Protocol/Spi.h                                                                                            |  39 +--
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec                                                                                                                             |  37 +++
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc                                                                                                                             |  17 ++
 {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf                                                 |  24 +-
 {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf                                                |   3 +-
 Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf                                                                                              |   4 +-
 Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf                                                                                                                  |  12 +-
 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h                                                                                                      |  98 -------
 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h                                                                                                                        |  26 --
 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h                                                                                                                   | 293 -------------------
 Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h                                                                                                 |  20 +-
 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf                                                                                                          |   1 +
 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf                                                                                    |  53 ----
 Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf                                                                               |  11 +
 Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf                                                                                                                    |   1 +
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec                                                                                                                                    |  13 +-
 Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec                                                                                                                                     |  11 -
 Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h                                                                                                                           | 295 -------------------
 Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h                                                                                                         |  46 +--
 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf                                                                                            |  50 ----
 Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf                                                                                       |  16 +-
 Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf                                                                                                                            |   3 +-
 Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h                                                                                                                      | 301 --------------------
 Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h                                                                                           |  16 +-
 Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf                                                                            |  19 +-
 Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf                                                                                                                  |   1 +
 Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf                                                                                                           |   1 +
 Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec                                                                                                                                   |   8 -
 105 files changed, 1101 insertions(+), 2480 deletions(-)
 delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c (100%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c (96%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c (94%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c (100%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c (100%)
 rename Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c => Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c (90%)
 rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c (93%)
 rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c (83%)
 delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
 delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
 delete mode 100644 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
 rename {Silicon/Intel/CoffeelakeSiliconPkg/Pch => Platform/Intel/WhitleyOpenBoardPkg}/Include/Library/SpiFlashCommonLib.h (96%)
 delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.h (100%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.h (100%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceSmm.inf (88%)
 rename {Platform/Intel/MinPlatformPkg => Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf (88%)
 create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h
 rename Silicon/Intel/{SimicsIch10Pkg => IntelSiliconPkg}/Include/Library/SpiFlashCommonLib.h (96%)
 rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Ppi/Spi.h (85%)
 rename Silicon/Intel/{CoffeelakeSiliconPkg/Pch => IntelSiliconPkg}/Include/Protocol/Spi.h (89%)
 rename {Platform/Intel/TigerlakeOpenBoardPkg => Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf (67%)
 rename {Platform/Intel/MinPlatformPkg/Flash => Silicon/Intel/IntelSiliconPkg}/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf (91%)
 delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h
 delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
 delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
 delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
 delete mode 100644 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 delete mode 100644 Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h

-- 
2.28.0.windows.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [edk2-platforms][PATCH v5 10/46] IntelSiliconPkg: Add MM SPI FVB services
  2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
@ 2021-08-03 15:00 ` Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 11/46] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel; +Cc: Ray Ni, Rangasai V Chaganty, Nate DeSimone

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds a Traditional MM and Standalone MM SPI FVB Service driver to
IntelSiliconPkg. These drivers produce the firmware volume block
protocol for SPI flash devices compliant with the Intel Serial
Flash Interface Compatibility Specification.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c                     |  94 ++
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c         | 903 ++++++++++++++++++++
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c             | 271 ++++++
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c   |  32 +
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c  |  32 +
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h         | 158 ++++
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h             |  22 +
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf          |  68 ++
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf |  67 ++
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc                                       |  11 +
 10 files changed, 1658 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
new file mode 100644
index 000000000000..7f2678fa9e5a
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
@@ -0,0 +1,94 @@
+/**@file
+  Defines data structure that is the volume header found.
+  These data is intent to decouple FVB driver with FV header.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+#define FIRMWARE_BLOCK_SIZE         0x10000
+#define FVB_MEDIA_BLOCK_SIZE        FIRMWARE_BLOCK_SIZE
+
+#define NV_STORAGE_BASE_ADDRESS     FixedPcdGet32(PcdFlashNvStorageVariableBase)
+#define SYSTEM_NV_BLOCK_NUM         ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESS        BaseAddress;
+  EFI_FIRMWARE_VOLUME_HEADER  FvbInfo;
+  EFI_FV_BLOCK_MAP_ENTRY      End[1];
+} EFI_FVB2_MEDIA_INFO;
+
+//
+// This data structure contains a template of all correct FV headers, which is used to restore
+// Fv header if it's corrupted.
+//
+EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
+  //
+  // Systen NvStorage FVB
+  //
+  {
+    NV_STORAGE_BASE_ADDRESS,
+    {
+      {0,}, //ZeroVector[16]
+      EFI_SYSTEM_NV_DATA_FV_GUID,
+      FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
+      EFI_FVH_SIGNATURE,
+      0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
+      sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
+      0,    //CheckSum which will be calucated dynamically.
+      0,    //ExtHeaderOffset
+      {0,}, //Reserved[1]
+      2,    //Revision
+      {
+        {
+          SYSTEM_NV_BLOCK_NUM,
+          FVB_MEDIA_BLOCK_SIZE,
+        }
+      }
+    },
+    {
+      {
+        0,
+        0
+      }
+    }
+  }
+};
+
+EFI_STATUS
+GetFvbInfo (
+  IN  EFI_PHYSICAL_ADDRESS         FvBaseAddress,
+  OUT EFI_FIRMWARE_VOLUME_HEADER   **FvbInfo
+  )
+{
+  UINTN                       Index;
+  EFI_FIRMWARE_VOLUME_HEADER  *FvHeader;
+
+  for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB2_MEDIA_INFO); Index++) {
+    if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
+      FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
+
+      //
+      // Update the checksum value of FV header.
+      //
+      FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader, FvHeader->HeaderLength);
+
+      *FvbInfo = FvHeader;
+
+      DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
+      DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
+      DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
+      DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum));
+      DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[0].NumBlocks));
+      DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)->BlockMap[0].Length));
+      DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[1].NumBlocks));
+      DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbInfo)->BlockMap[1].Length));
+
+      return EFI_SUCCESS;
+    }
+  }
+  return EFI_NOT_FOUND;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
new file mode 100644
index 000000000000..dab818e98087
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c
@@ -0,0 +1,903 @@
+/** @file
+  Common driver source for several Serial Flash devices
+  which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+//
+// Global variable for this FVB driver  which contains
+// the private data of all firmware volume block instances
+//
+FVB_GLOBAL   mFvbModuleGlobal;
+
+//
+// This platform driver knows there are multiple FVs on FD.
+// Now we only provide FVs on Variable region and MicorCode region for performance issue.
+//
+FV_INFO mPlatformFvBaseAddress[] = {
+  {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
+  {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
+  {0, 0}
+};
+
+FV_INFO mPlatformDefaultBaseAddress[] = {
+  {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(PcdFlashNvStorageVariableSize)},
+  {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFlashMicrocodeFvSize)},
+  {0, 0}
+};
+
+FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
+  {
+    {
+      HARDWARE_DEVICE_PATH,
+      HW_MEMMAP_DP,
+      {
+        (UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
+        (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
+      }
+    },
+    EfiMemoryMappedIO,
+    (EFI_PHYSICAL_ADDRESS) 0,
+    (EFI_PHYSICAL_ADDRESS) 0,
+  },
+  {
+    END_DEVICE_PATH_TYPE,
+    END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    {
+      END_DEVICE_PATH_LENGTH,
+      0
+    }
+  }
+};
+
+FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
+  {
+    {
+      MEDIA_DEVICE_PATH,
+      MEDIA_PIWG_FW_VOL_DP,
+      {
+        (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
+        (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
+      }
+    },
+    { 0 }
+  },
+  {
+    END_DEVICE_PATH_TYPE,
+    END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    {
+      END_DEVICE_PATH_LENGTH,
+      0
+    }
+  }
+};
+
+//
+// Template structure used when installing FVB protocol
+//
+EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate = {
+  FvbProtocolGetAttributes,
+  FvbProtocolSetAttributes,
+  FvbProtocolGetPhysicalAddress,
+  FvbProtocolGetBlockSize,
+  FvbProtocolRead,
+  FvbProtocolWrite,
+  FvbProtocolEraseBlocks,
+  NULL
+};
+
+/**
+  Get the EFI_FVB_ATTRIBUTES_2 of a FV.
+
+  @param[in]  FvbInstance The pointer to the EFI_FVB_INSTANCE.
+
+  @return     Attributes of the FV identified by FvbInstance.
+
+**/
+EFI_FVB_ATTRIBUTES_2
+FvbGetVolumeAttributes (
+  IN EFI_FVB_INSTANCE         *FvbInstance
+  )
+{
+  return FvbInstance->FvHeader.Attributes;
+}
+
+/**
+  Retrieves the starting address of an LBA in an FV. It also
+  return a few other attribut of the FV.
+
+  @param[in]  FvbInstance     The pointer to the EFI_FVB_INSTANCE.
+  @param[in]  Lba             The logical block address
+  @param[out] LbaAddress      On output, contains the physical starting address
+                              of the Lba
+  @param[out] LbaLength       On output, contains the length of the block
+  @param[out] NumOfBlocks     A pointer to a caller allocated UINTN in which the
+                              number of consecutive blocks starting with Lba is
+                              returned. All blocks in this range have a size of
+                              BlockSize
+
+  @retval   EFI_SUCCESS Successfully returns
+  @retval   EFI_INVALID_PARAMETER Instance not found
+
+**/
+EFI_STATUS
+FvbGetLbaAddress (
+  IN  EFI_FVB_INSTANCE                    *FvbInstance,
+  IN  EFI_LBA                             Lba,
+  OUT UINTN                               *LbaAddress,
+  OUT UINTN                               *LbaLength,
+  OUT UINTN                               *NumOfBlocks
+  )
+{
+  UINT32                                  NumBlocks;
+  UINT32                                  BlockLength;
+  UINTN                                   Offset;
+  EFI_LBA                                 StartLba;
+  EFI_LBA                                 NextLba;
+  EFI_FV_BLOCK_MAP_ENTRY                  *BlockMap;
+
+  StartLba  = 0;
+  Offset    = 0;
+  BlockMap  = &(FvbInstance->FvHeader.BlockMap[0]);
+
+  //
+  // Parse the blockmap of the FV to find which map entry the Lba belongs to
+  //
+  while (TRUE) {
+    NumBlocks   = BlockMap->NumBlocks;
+    BlockLength = BlockMap->Length;
+
+    if ( NumBlocks == 0 || BlockLength == 0) {
+      return EFI_INVALID_PARAMETER;
+    }
+
+    NextLba = StartLba + NumBlocks;
+
+    //
+    // The map entry found
+    //
+    if (Lba >= StartLba && Lba < NextLba) {
+      Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
+      if (LbaAddress ) {
+        *LbaAddress = FvbInstance->FvBase + Offset;
+      }
+
+      if (LbaLength ) {
+        *LbaLength = BlockLength;
+      }
+
+      if (NumOfBlocks ) {
+        *NumOfBlocks = (UINTN)(NextLba - Lba);
+      }
+      return EFI_SUCCESS;
+    }
+
+    StartLba  = NextLba;
+    Offset    = Offset + NumBlocks * BlockLength;
+    BlockMap++;
+  }
+}
+
+/**
+  Reads specified number of bytes into a buffer from the specified block.
+
+  @param[in]      FvbInstance           The pointer to the EFI_FVB_INSTANCE
+  @param[in]      Lba                   The logical block address to be read from
+  @param[in]      BlockOffset           Offset into the block at which to begin reading
+  @param[in]      NumBytes              Pointer that on input contains the total size of
+                                        the buffer. On output, it contains the total number
+                                        of bytes read
+  @param[in]      Buffer                Pointer to a caller allocated buffer that will be
+                                        used to hold the data read
+
+
+  @retval         EFI_SUCCESS           The firmware volume was read successfully and
+                                        contents are in Buffer
+  @retval         EFI_BAD_BUFFER_SIZE   Read attempted across a LBA boundary. On output,
+                                        NumBytes contains the total number of bytes returned
+                                        in Buffer
+  @retval         EFI_ACCESS_DENIED     The firmware volume is in the ReadDisabled state
+  @retval         EFI_DEVICE_ERROR      The block device is not functioning correctly and
+                                        could not be read
+  @retval         EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
+
+**/
+EFI_STATUS
+FvbReadBlock (
+  IN EFI_FVB_INSTANCE                     *FvbInstance,
+  IN EFI_LBA                              Lba,
+  IN UINTN                                BlockOffset,
+  IN OUT UINTN                            *NumBytes,
+  IN UINT8                                *Buffer
+  )
+{
+  EFI_FVB_ATTRIBUTES_2                    Attributes;
+  UINTN                                   LbaAddress;
+  UINTN                                   LbaLength;
+  EFI_STATUS                              Status;
+  BOOLEAN                                 BadBufferSize = FALSE;
+
+  if ((NumBytes == NULL) || (Buffer == NULL)) {
+    return EFI_INVALID_PARAMETER;
+  }
+  if (*NumBytes == 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
+  if (EFI_ERROR(Status)) {
+    return Status;
+  }
+
+  Attributes = FvbGetVolumeAttributes (FvbInstance);
+
+  if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
+    return EFI_ACCESS_DENIED;
+  }
+
+  if (BlockOffset > LbaLength) {
+   return EFI_INVALID_PARAMETER;
+  }
+
+  if (LbaLength < (*NumBytes + BlockOffset)) {
+    DEBUG ((DEBUG_INFO,
+      "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n",
+      *NumBytes,
+      (UINT32)(LbaLength - BlockOffset))
+      );
+    *NumBytes     = (UINT32) (LbaLength - BlockOffset);
+    BadBufferSize = TRUE;
+  }
+
+  Status = SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
+
+  if (!EFI_ERROR (Status) && BadBufferSize) {
+    return EFI_BAD_BUFFER_SIZE;
+  } else {
+    return Status;
+  }
+}
+
+/**
+  Writes specified number of bytes from the input buffer to the block.
+
+  @param[in]  FvbInstance           The pointer to the EFI_FVB_INSTANCE
+  @param[in]  Lba                   The starting logical block index to write to
+  @param[in]  BlockOffset           Offset into the block at which to begin writing
+  @param[in]  NumBytes              Pointer that on input contains the total size of
+                                    the buffer. On output, it contains the total number
+                                    of bytes actually written
+  @param[in]  Buffer                Pointer to a caller allocated buffer that contains
+                                    the source for the write
+  @retval     EFI_SUCCESS           The firmware volume was written successfully
+  @retval     EFI_BAD_BUFFER_SIZE   Write attempted across a LBA boundary. On output,
+                                    NumBytes contains the total number of bytes
+                                    actually written
+  @retval     EFI_ACCESS_DENIED     The firmware volume is in the WriteDisabled state
+  @retval     EFI_DEVICE_ERROR      The block device is not functioning correctly and
+                                    could not be written
+  @retval     EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffer are NULL
+
+**/
+EFI_STATUS
+FvbWriteBlock (
+  IN EFI_FVB_INSTANCE                     *FvbInstance,
+  IN EFI_LBA                              Lba,
+  IN UINTN                                BlockOffset,
+  IN OUT UINTN                            *NumBytes,
+  IN UINT8                                *Buffer
+  )
+{
+  EFI_FVB_ATTRIBUTES_2                    Attributes;
+  UINTN                                   LbaAddress;
+  UINTN                                   LbaLength;
+  EFI_STATUS                              Status;
+  BOOLEAN                                 BadBufferSize = FALSE;
+
+  if ((NumBytes == NULL) || (Buffer == NULL)) {
+    return EFI_INVALID_PARAMETER;
+  }
+  if (*NumBytes == 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
+  if (EFI_ERROR(Status)) {
+    return Status;
+  }
+
+  //
+  // Check if the FV is write enabled
+  //
+  Attributes = FvbGetVolumeAttributes (FvbInstance);
+  if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0)  {
+    return EFI_ACCESS_DENIED;
+  }
+
+  //
+  // Perform boundary checks and adjust NumBytes
+  //
+  if (BlockOffset > LbaLength) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  if (LbaLength < (*NumBytes + BlockOffset)) {
+    DEBUG ((DEBUG_INFO,
+      "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
+      *NumBytes,
+      (UINT32)(LbaLength - BlockOffset))
+      );
+    *NumBytes     = (UINT32) (LbaLength - BlockOffset);
+    BadBufferSize = TRUE;
+  }
+
+  Status = SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes, Buffer);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  Status = SpiFlashLock ();
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), *NumBytes);
+
+  if (!EFI_ERROR (Status) && BadBufferSize) {
+    return EFI_BAD_BUFFER_SIZE;
+  } else {
+    return Status;
+  }
+}
+
+
+
+/**
+  Erases and initializes a firmware volume block.
+
+  @param[in]    FvbInstance       The pointer to the EFI_FVB_INSTANCE
+  @param[in]    Lba               The logical block index to be erased
+
+  @retval   EFI_SUCCESS           The erase request was successfully completed
+  @retval   EFI_ACCESS_DENIED     The firmware volume is in the WriteDisabled state
+  @retval   EFI_DEVICE_ERROR      The block device is not functioning correctly and
+                                  could not be written. Firmware device may have been
+                                  partially erased
+  @retval   EFI_INVALID_PARAMETER Instance not found
+
+**/
+EFI_STATUS
+FvbEraseBlock (
+  IN EFI_FVB_INSTANCE           *FvbInstance,
+  IN EFI_LBA                    Lba
+  )
+{
+
+  EFI_FVB_ATTRIBUTES_2                    Attributes;
+  UINTN                                   LbaAddress;
+  UINTN                                   LbaLength;
+  EFI_STATUS                              Status;
+
+  //
+  // Check if the FV is write enabled
+  //
+  Attributes = FvbGetVolumeAttributes (FvbInstance);
+
+  if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0)  {
+    return EFI_ACCESS_DENIED;
+  }
+
+  //
+  // Get the starting address of the block for erase.
+  //
+  Status = FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, NULL);
+  if (EFI_ERROR(Status)) {
+    return Status;
+  }
+
+  Status = SpiFlashBlockErase (LbaAddress, &LbaLength);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  Status = SpiFlashLock ();
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
+
+  return Status;
+}
+
+/**
+  Modifies the current settings of the firmware volume according to the
+  input parameter, and returns the new setting of the volume
+
+  @param[in]  FvbInstance           The pointer to the EFI_FVB_INSTANCE.
+  @param[in]  Attributes            On input, it is a pointer to EFI_FVB_ATTRIBUTES_2
+                                    containing the desired firmware volume settings.
+                                    On successful return, it contains the new settings
+                                    of the firmware volume
+
+  @retval     EFI_SUCCESS           Successfully returns
+  @retval     EFI_ACCESS_DENIED     The volume setting is locked and cannot be modified
+  @retval     EFI_INVALID_PARAMETER Instance not found, or The attributes requested are
+                                    in conflict with the capabilities as declared in the
+                                    firmware volume header
+
+**/
+EFI_STATUS
+FvbSetVolumeAttributes (
+  IN EFI_FVB_INSTANCE                     *FvbInstance,
+  IN OUT EFI_FVB_ATTRIBUTES_2             *Attributes
+  )
+{
+  EFI_FVB_ATTRIBUTES_2                      OldAttributes;
+  EFI_FVB_ATTRIBUTES_2                      *AttribPtr;
+  EFI_FVB_ATTRIBUTES_2                      UnchangedAttributes;
+  UINT32                                    Capabilities;
+  UINT32                                    OldStatus, NewStatus;
+
+  AttribPtr     = (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attributes);
+  OldAttributes = *AttribPtr;
+  Capabilities  = OldAttributes & EFI_FVB2_CAPABILITIES;
+  OldStatus     = OldAttributes & EFI_FVB2_STATUS;
+  NewStatus     = *Attributes & EFI_FVB2_STATUS;
+
+  UnchangedAttributes = EFI_FVB2_READ_DISABLED_CAP  | \
+                        EFI_FVB2_READ_ENABLED_CAP   | \
+                        EFI_FVB2_WRITE_DISABLED_CAP | \
+                        EFI_FVB2_WRITE_ENABLED_CAP  | \
+                        EFI_FVB2_LOCK_CAP           | \
+                        EFI_FVB2_STICKY_WRITE       | \
+                        EFI_FVB2_MEMORY_MAPPED      | \
+                        EFI_FVB2_ERASE_POLARITY     | \
+                        EFI_FVB2_READ_LOCK_CAP      | \
+                        EFI_FVB2_WRITE_LOCK_CAP     | \
+                        EFI_FVB2_ALIGNMENT;
+
+  //
+  // Some attributes of FV is read only can *not* be set
+  //
+  if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAttributes)) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // If firmware volume is locked, no status bit can be updated
+  //
+  if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) {
+    if ( OldStatus ^ NewStatus ) {
+      return EFI_ACCESS_DENIED;
+    }
+  }
+
+  //
+  // Test read disable
+  //
+  if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) == 0) {
+    if ((NewStatus & EFI_FVB2_READ_STATUS) == 0) {
+      return EFI_INVALID_PARAMETER;
+    }
+  }
+
+  //
+  // Test read enable
+  //
+  if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) == 0) {
+    if (NewStatus & EFI_FVB2_READ_STATUS) {
+      return EFI_INVALID_PARAMETER;
+    }
+  }
+
+  //
+  // Test write disable
+  //
+  if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) == 0) {
+    if ((NewStatus & EFI_FVB2_WRITE_STATUS) == 0) {
+      return EFI_INVALID_PARAMETER;
+    }
+  }
+
+  //
+  // Test write enable
+  //
+  if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) == 0) {
+    if (NewStatus & EFI_FVB2_WRITE_STATUS) {
+      return EFI_INVALID_PARAMETER;
+    }
+  }
+
+  //
+  // Test lock
+  //
+  if ((Capabilities & EFI_FVB2_LOCK_CAP) == 0) {
+    if (NewStatus & EFI_FVB2_LOCK_STATUS) {
+      return EFI_INVALID_PARAMETER;
+    }
+  }
+
+  *AttribPtr  = (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS));
+  *AttribPtr  = (*AttribPtr) | NewStatus;
+  *Attributes = *AttribPtr;
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Check the integrity of firmware volume header
+
+  @param[in]  FvHeader   A pointer to a firmware volume header
+
+  @retval     TRUE          The firmware volume is consistent
+  @retval     FALSE         The firmware volume has corrupted.
+
+**/
+BOOLEAN
+IsFvHeaderValid (
+  IN       EFI_PHYSICAL_ADDRESS          FvBase,
+  IN CONST EFI_FIRMWARE_VOLUME_HEADER    *FvHeader
+  )
+{
+  if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
+    if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
+      return FALSE;
+    }
+  } else {
+    if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
+      return FALSE;
+    }
+  }
+  if ( (FvHeader->Revision != EFI_FVH_REVISION)   ||
+       (FvHeader->Signature != EFI_FVH_SIGNATURE) ||
+       (FvHeader->FvLength == ((UINTN) -1))       ||
+       ((FvHeader->HeaderLength & 0x01 ) !=0) )  {
+    return FALSE;
+  }
+
+  if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != 0) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
+//
+// FVB protocol APIs
+//
+
+/**
+  Retrieves the physical address of the device.
+
+  @param[in]  This    A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
+  @param[out] Address Output buffer containing the address.
+
+  retval      EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetPhysicalAddress (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL  *This,
+  OUT EFI_PHYSICAL_ADDRESS                     *Address
+  )
+{
+  EFI_FVB_INSTANCE      *FvbInstance;
+
+  FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+  *Address = FvbInstance->FvBase;
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Retrieve the size of a logical block
+
+  @param[in]  This        Calling context
+  @param[in]  Lba         Indicates which block to return the size for.
+  @param[out] BlockSize   A pointer to a caller allocated UINTN in which
+                          the size of the block is returned
+  @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
+                          number of consecutive blocks starting with Lba is
+                          returned. All blocks in this range have a size of
+                          BlockSize
+
+  @retval     EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetBlockSize (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL  *This,
+  IN  EFI_LBA                                  Lba,
+  OUT UINTN                                    *BlockSize,
+  OUT UINTN                                    *NumOfBlocks
+  )
+{
+  EFI_FVB_INSTANCE                 *FvbInstance;
+
+  FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+  DEBUG((DEBUG_INFO,
+    "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x%x\n",
+    Lba,
+    BlockSize,
+    NumOfBlocks)
+    );
+
+  return FvbGetLbaAddress (
+           FvbInstance,
+           Lba,
+           NULL,
+           BlockSize,
+           NumOfBlocks
+           );
+}
+
+/**
+  Retrieves Volume attributes.  No polarity translations are done.
+
+  @param[in]    This        Calling context
+  @param[out]   Attributes  Output buffer which contains attributes
+
+  @retval       EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolGetAttributes (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  OUT EFI_FVB_ATTRIBUTES_2                *Attributes
+  )
+{
+  EFI_FVB_INSTANCE                 *FvbInstance;
+
+  FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+  *Attributes = FvbGetVolumeAttributes (FvbInstance);
+
+  DEBUG ((DEBUG_INFO,
+    "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n",
+    This,
+    *Attributes)
+    );
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Sets Volume attributes. No polarity translations are done.
+
+  @param[in]  This        Calling context
+  @param[out] Attributes  Output buffer which contains attributes
+
+  @retval     EFI_SUCCESS The function always return successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolSetAttributes (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  IN OUT EFI_FVB_ATTRIBUTES_2                   *Attributes
+  )
+{
+  EFI_STATUS                       Status;
+  EFI_FVB_INSTANCE                 *FvbInstance;
+
+  DEBUG((DEBUG_INFO,
+    "FvbProtocolSetAttributes: Before SET -  This: 0x%x Attributes: 0x%x\n",
+    This,
+    *Attributes)
+    );
+
+  FvbInstance  = FVB_INSTANCE_FROM_THIS (This);
+
+  Status = FvbSetVolumeAttributes (FvbInstance, Attributes);
+
+  DEBUG((DEBUG_INFO,
+    "FvbProtocolSetAttributes: After SET -  This: 0x%x Attributes: 0x%x\n",
+    This,
+    *Attributes)
+    );
+
+  return Status;
+}
+
+/**
+  The EraseBlock() function erases one or more blocks as denoted by the
+  variable argument list. The entire parameter list of blocks must be verified
+  prior to erasing any blocks.  If a block is requested that does not exist
+  within the associated firmware volume (it has a larger index than the last
+  block of the firmware volume), the EraseBlock() function must return
+  EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
+
+  @param[in] This         Calling context
+  @param[in] ...          Starting LBA followed by Number of Lba to erase.
+                          a -1 to terminate the list.
+
+  @retval EFI_SUCCESS       The erase request was successfully completed
+  @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
+  @retval EFI_DEVICE_ERROR  The block device is not functioning correctly and
+                            could not be written. Firmware device may have been
+                            partially erased
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolEraseBlocks (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL    *This,
+  ...
+  )
+{
+  EFI_FVB_INSTANCE                      *FvbInstance;
+  UINTN                                 NumOfBlocks;
+  VA_LIST                               Args;
+  EFI_LBA                               StartingLba;
+  UINTN                                 NumOfLba;
+  EFI_STATUS                            Status;
+
+  DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n"));
+
+  FvbInstance  = FVB_INSTANCE_FROM_THIS (This);
+
+  NumOfBlocks = FvbInstance->NumOfBlocks;
+
+  VA_START (Args, This);
+
+  do {
+    StartingLba = VA_ARG (Args, EFI_LBA);
+    if ( StartingLba == EFI_LBA_LIST_TERMINATOR ) {
+      break;
+    }
+
+    NumOfLba = VA_ARG (Args, UINT32);
+
+    //
+    // Check input parameters
+    //
+    if (NumOfLba == 0) {
+      VA_END (Args);
+      return EFI_INVALID_PARAMETER;
+    }
+
+    if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
+      return EFI_INVALID_PARAMETER;
+    }
+  } while ( 1 );
+
+  VA_END (Args);
+
+  VA_START (Args, This);
+  do {
+    StartingLba = VA_ARG (Args, EFI_LBA);
+    if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
+      break;
+    }
+
+    NumOfLba = VA_ARG (Args, UINT32);
+
+    while ( NumOfLba > 0 ) {
+      Status = FvbEraseBlock (FvbInstance, StartingLba);
+      if ( EFI_ERROR(Status)) {
+        VA_END (Args);
+        return Status;
+      }
+      StartingLba ++;
+      NumOfLba --;
+    }
+
+  } while ( 1 );
+
+  VA_END (Args);
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Writes data beginning at Lba:Offset from FV. The write terminates either
+  when *NumBytes of data have been written, or when a block boundary is
+  reached.  *NumBytes is updated to reflect the actual number of bytes
+  written. The write opertion does not include erase. This routine will
+  attempt to write only the specified bytes. If the writes do not stick,
+  it will return an error.
+
+  @param[in]      This      Calling context
+  @param[in]      Lba       Block in which to begin write
+  @param[in]      Offset    Offset in the block at which to begin write
+  @param[in,out]  NumBytes  On input, indicates the requested write size. On
+                            output, indicates the actual number of bytes written
+  @param[in]      Buffer    Buffer containing source data for the write.
+
+  @retval EFI_SUCCESS           The firmware volume was written successfully
+  @retval EFI_BAD_BUFFER_SIZE   Write attempted across a LBA boundary. On output,
+                                NumBytes contains the total number of bytes
+                                actually written
+  @retval EFI_ACCESS_DENIED     The firmware volume is in the WriteDisabled state
+  @retval EFI_DEVICE_ERROR      The block device is not functioning correctly and
+                                could not be written
+  @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolWrite (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  IN EFI_LBA                                    Lba,
+  IN UINTN                                      Offset,
+  IN OUT UINTN                                  *NumBytes,
+  IN UINT8                                      *Buffer
+  )
+{
+  EFI_FVB_INSTANCE        *FvbInstance;
+
+  FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+
+  DEBUG((DEBUG_INFO,
+    "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
+    Lba,
+    Offset,
+    *NumBytes,
+    Buffer)
+    );
+
+  return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
+}
+
+/**
+  Reads data beginning at Lba:Offset from FV. The Read terminates either
+  when *NumBytes of data have been read, or when a block boundary is
+  reached.  *NumBytes is updated to reflect the actual number of bytes
+  written. The write opertion does not include erase. This routine will
+  attempt to write only the specified bytes. If the writes do not stick,
+  it will return an error.
+
+  @param[in]      This      Calling context
+  @param[in]      Lba       Block in which to begin write
+  @param[in]      Offset    Offset in the block at which to begin write
+  @param[in,out]  NumBytes  On input, indicates the requested write size. On
+                            output, indicates the actual number of bytes written
+  @param[in]      Buffer    Buffer containing source data for the write.
+
+  @retval EFI_SUCCESS           The firmware volume was read successfully and
+                                contents are in Buffer
+  @retval EFI_BAD_BUFFER_SIZE   Read attempted across a LBA boundary. On output,
+                                NumBytes contains the total number of bytes returned
+                                in Buffer
+  @retval EFI_ACCESS_DENIED     The firmware volume is in the ReadDisabled state
+  @retval EFI_DEVICE_ERROR      The block device is not functioning correctly and
+                                could not be read
+  @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
+
+**/
+EFI_STATUS
+EFIAPI
+FvbProtocolRead (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  IN EFI_LBA                                    Lba,
+  IN UINTN                                      Offset,
+  IN OUT UINTN                                  *NumBytes,
+  OUT UINT8                                     *Buffer
+  )
+{
+  EFI_FVB_INSTANCE     *FvbInstance;
+  EFI_STATUS           Status;
+
+  FvbInstance = FVB_INSTANCE_FROM_THIS (This);
+  Status = FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer);
+  DEBUG((DEBUG_INFO,
+    "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x\n",
+    Lba,
+    Offset,
+    *NumBytes,
+    Buffer)
+    );
+
+  return Status;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
new file mode 100644
index 000000000000..42a0828c6fae
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
@@ -0,0 +1,271 @@
+/** @file
+  MM driver source for several Serial Flash devices
+  which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) Microsoft Corporation.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include <Library/MmServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Protocol/SmmFirmwareVolumeBlock.h>
+
+/**
+  The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
+  for each FV in the system.
+
+  @param[in]  FvbInstance   The pointer to a FW volume instance structure,
+                            which contains the information about one FV.
+
+  @retval     VOID
+
+**/
+VOID
+InstallFvbProtocol (
+  IN  EFI_FVB_INSTANCE               *FvbInstance
+  )
+{
+  EFI_FIRMWARE_VOLUME_HEADER            *FvHeader;
+  EFI_STATUS                            Status;
+  EFI_HANDLE                            FvbHandle;
+
+  ASSERT (FvbInstance != NULL);
+  if (FvbInstance == NULL) {
+    return;
+  }
+
+  CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL));
+
+  FvHeader = &FvbInstance->FvHeader;
+  if (FvHeader == NULL) {
+    return;
+  }
+
+  //
+  // Set up the devicepath
+  //
+  DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\n", FvbInstance->FvBase));
+  if (FvHeader->ExtHeaderOffset == 0) {
+    //
+    // FV does not contains extension header, then produce MEMMAP_DEVICE_PATH
+    //
+    FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
+    if (FvbInstance->DevicePath == NULL) {
+      DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMAP_DEVICE_PATH failed\n"));
+      return;
+    }
+    ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.StartingAddress = FvbInstance->FvBase;
+    ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.EndingAddress   = FvbInstance->FvBase + FvHeader->FvLength - 1;
+  } else {
+    FvbInstance->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
+    if (FvbInstance->DevicePath == NULL) {
+      DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PIWG_DEVICE_PATH failed\n"));
+      return;
+    }
+    CopyGuid (
+      &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName,
+      (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset)
+      );
+  }
+
+  //
+  // LocateDevicePath fails so install a new interface and device path
+  //
+  FvbHandle = NULL;
+
+  Status = gMmst->MmInstallProtocolInterface (
+                    &FvbHandle,
+                    &gEfiSmmFirmwareVolumeBlockProtocolGuid,
+                    EFI_NATIVE_INTERFACE,
+                    &(FvbInstance->FvbProtocol)
+                    );
+  ASSERT_EFI_ERROR (Status);
+
+  Status = gMmst->MmInstallProtocolInterface (
+                    &FvbHandle,
+                    &gEfiDevicePathProtocolGuid,
+                    EFI_NATIVE_INTERFACE,
+                    &(FvbInstance->DevicePath)
+                    );
+  ASSERT_EFI_ERROR (Status);
+}
+
+/**
+  The function does the necessary initialization work for
+  Firmware Volume Block Driver.
+
+**/
+VOID
+FvbInitialize (
+  VOID
+  )
+{
+  EFI_FVB_INSTANCE                      *FvbInstance;
+  EFI_FIRMWARE_VOLUME_HEADER            *FvHeader;
+  EFI_FV_BLOCK_MAP_ENTRY                *PtrBlockMapEntry;
+  EFI_PHYSICAL_ADDRESS                  BaseAddress;
+  EFI_STATUS                            Status;
+  UINTN                                 BufferSize;
+  UINTN                                 Idx;
+  UINT32                                MaxLbaSize;
+  UINT32                                BytesWritten;
+  UINTN                                 BytesErased;
+
+  mPlatformFvBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
+  mPlatformFvBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
+  mPlatformFvBaseAddress[1].FvBase = PcdGet32(PcdFlashMicrocodeFvBase);
+  mPlatformFvBaseAddress[1].FvSize = PcdGet32(PcdFlashMicrocodeFvSize);
+  mPlatformDefaultBaseAddress[0].FvBase = PcdGet32(PcdFlashNvStorageVariableBase);
+  mPlatformDefaultBaseAddress[0].FvSize = PcdGet32(PcdFlashNvStorageVariableSize);
+  mPlatformDefaultBaseAddress[1].FvBase = PcdGet32(PcdFlashMicrocodeFvBase);
+  mPlatformDefaultBaseAddress[1].FvSize = PcdGet32(PcdFlashMicrocodeFvSize);
+
+  //
+  // We will only continue with FVB installation if the
+  // SPI is the active BIOS state
+  //
+  {
+    //
+    // Make sure all FVB are valid and/or fix if possible
+    //
+    for (Idx = 0;; Idx++) {
+      if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
+        break;
+      }
+
+      BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
+      FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+      if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+        BytesWritten = 0;
+        BytesErased = 0;
+        DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
+        Status = GetFvbInfo (BaseAddress, &FvHeader);
+        if (EFI_ERROR (Status)) {
+          DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x.  GetFvbInfo Status %r\n", BaseAddress, Status));
+          continue;
+        }
+        DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\n", BaseAddress));
+        //
+        // Spi erase
+        //
+        BytesErased = (UINTN) FvHeader->BlockMap->Length;
+        Status = SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased);
+        if (EFI_ERROR (Status)) {
+          DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error  %r\n", Status));
+          continue;
+        }
+        if (BytesErased != FvHeader->BlockMap->Length) {
+          DEBUG ((DEBUG_WARN, "ERROR - BytesErased != FvHeader->BlockMap->Length\n"));
+          DEBUG ((DEBUG_INFO, " BytesErased = 0x%X\n Length = 0x%X\n", BytesErased, FvHeader->BlockMap->Length));
+          continue;
+        }
+        BytesWritten = FvHeader->HeaderLength;
+        Status = SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT8*)FvHeader);
+        if (EFI_ERROR (Status)) {
+          DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error  %r\n", Status));
+          continue;
+        }
+        if (BytesWritten != FvHeader->HeaderLength) {
+          DEBUG ((DEBUG_WARN, "ERROR - BytesWritten != HeaderLength\n"));
+          DEBUG ((DEBUG_INFO, " BytesWritten = 0x%X\n HeaderLength = 0x%X\n", BytesWritten, FvHeader->HeaderLength));
+          continue;
+        }
+        Status = SpiFlashLock ();
+        if (EFI_ERROR (Status)) {
+          DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error  %r\n", Status));
+          continue;
+        }
+        DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n", BaseAddress));
+        //
+        // Clear cache for this range.
+        //
+        WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, FvHeader->BlockMap->Length);
+      }
+    }
+
+    //
+    // Calculate the total size for all firmware volume block instances
+    //
+    BufferSize = 0;
+    for (Idx = 0; ; Idx++) {
+      if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
+        break;
+      }
+      BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
+      FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+      if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+        DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
+        continue;
+      }
+
+      BufferSize += (FvHeader->HeaderLength +
+                    sizeof (EFI_FVB_INSTANCE) -
+                    sizeof (EFI_FIRMWARE_VOLUME_HEADER)
+                    );
+    }
+
+    mFvbModuleGlobal.FvbInstance =  (EFI_FVB_INSTANCE *) AllocateRuntimeZeroPool (BufferSize);
+    if (mFvbModuleGlobal.FvbInstance == NULL) {
+      ASSERT (FALSE);
+      return;
+    }
+
+    MaxLbaSize      = 0;
+    FvbInstance     = mFvbModuleGlobal.FvbInstance;
+    mFvbModuleGlobal.NumFv   = 0;
+
+    for (Idx = 0; ; Idx++) {
+      if (mPlatformFvBaseAddress[Idx].FvSize == 0 && mPlatformFvBaseAddress[Idx].FvBase == 0) {
+        break;
+      }
+      BaseAddress = mPlatformFvBaseAddress[Idx].FvBase;
+      FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
+
+      if (!IsFvHeaderValid (BaseAddress, FvHeader)) {
+        DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHeader));
+        continue;
+      }
+
+      FvbInstance->Signature = FVB_INSTANCE_SIGNATURE;
+      CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength);
+
+      FvHeader = &(FvbInstance->FvHeader);
+      FvbInstance->FvBase = (UINTN)BaseAddress;
+
+      //
+      // Process the block map for each FV
+      //
+      FvbInstance->NumOfBlocks   = 0;
+      for (PtrBlockMapEntry = FvHeader->BlockMap;
+           PtrBlockMapEntry->NumBlocks != 0;
+           PtrBlockMapEntry++) {
+        //
+        // Get the maximum size of a block.
+        //
+        if (MaxLbaSize < PtrBlockMapEntry->Length) {
+          MaxLbaSize  = PtrBlockMapEntry->Length;
+        }
+        FvbInstance->NumOfBlocks += PtrBlockMapEntry->NumBlocks;
+      }
+
+      //
+      // Add a FVB Protocol Instance
+      //
+      InstallFvbProtocol (FvbInstance);
+      mFvbModuleGlobal.NumFv++;
+
+      //
+      // Move on to the next FvbInstance
+      //
+      FvbInstance = (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) +
+                                            FvHeader->HeaderLength +
+                                            (sizeof (EFI_FVB_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
+
+    }
+  }
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
new file mode 100644
index 000000000000..252c818d6551
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
@@ -0,0 +1,32 @@
+/** @file
+  MM driver source for several Serial Flash devices
+  which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+  Copyright (c) Microsoft Corporation.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include "SpiFvbServiceMm.h"
+
+/**
+  The driver Standalone MM entry point.
+
+  @param[in] ImageHandle          Image handle of this driver.
+  @param[in] MmSystemTable        A pointer to the MM system table.
+
+  @retval EFI_SUCCESS             This function always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFvbStandaloneMmInitialize (
+  IN EFI_HANDLE            ImageHandle,
+  IN EFI_MM_SYSTEM_TABLE   *MmSystemTable
+  )
+{
+  FvbInitialize ();
+
+  return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
new file mode 100644
index 000000000000..1c2dac70e3c6
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
@@ -0,0 +1,32 @@
+/** @file
+  MM driver source for several Serial Flash devices
+  which are compliant with the Intel(R) Serial Flash Interface Compatibility Specification.
+
+  Copyright (c) Microsoft Corporation.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+#include "SpiFvbServiceMm.h"
+
+/**
+  The driver Traditional MM entry point.
+
+  @param[in] ImageHandle          Image handle of this driver.
+  @param[in] SystemTable          A pointer to the EFI system table.
+
+  @retval EFI_SUCCESS             This function always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFvbTraditionalMmInitialize (
+  IN EFI_HANDLE            ImageHandle,
+  IN EFI_SYSTEM_TABLE      *SystemTable
+  )
+{
+  FvbInitialize ();
+
+  return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
new file mode 100644
index 000000000000..e9d69e985814
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h
@@ -0,0 +1,158 @@
+/** @file
+  Common source definitions used in serial flash drivers
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SPI_FVB_SERVICE_COMMON_H
+#define _SPI_FVB_SERVICE_COMMON_H
+
+#include <Guid/EventGroup.h>
+#include <Guid/FirmwareFileSystem2.h>
+#include <Guid/SystemNvDataGuid.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/IoLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HobLib.h>
+
+#include <Library/SpiFlashCommonLib.h>
+
+//
+// Define two helper macro to extract the Capability field or Status field in FVB
+// bit fields
+//
+#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
+                              EFI_FVB2_READ_ENABLED_CAP | \
+                              EFI_FVB2_WRITE_DISABLED_CAP | \
+                              EFI_FVB2_WRITE_ENABLED_CAP | \
+                              EFI_FVB2_LOCK_CAP \
+                              )
+
+#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
+
+#define FVB_INSTANCE_SIGNATURE       SIGNATURE_32('F','V','B','I')
+
+typedef struct {
+  UINT32                                Signature;
+  UINTN                                 FvBase;
+  UINTN                                 NumOfBlocks;
+  EFI_DEVICE_PATH_PROTOCOL              *DevicePath;
+  EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL    FvbProtocol;
+  EFI_FIRMWARE_VOLUME_HEADER            FvHeader;
+} EFI_FVB_INSTANCE;
+
+typedef struct {
+  EFI_FVB_INSTANCE            *FvbInstance;
+  UINT32                      NumFv;
+} FVB_GLOBAL;
+
+//
+// Fvb Protocol instance data
+//
+#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, FVB_INSTANCE_SIGNATURE)
+
+typedef struct {
+  MEDIA_FW_VOL_DEVICE_PATH  FvDevPath;
+  EFI_DEVICE_PATH_PROTOCOL  EndDevPath;
+} FV_PIWG_DEVICE_PATH;
+
+typedef struct {
+  MEMMAP_DEVICE_PATH          MemMapDevPath;
+  EFI_DEVICE_PATH_PROTOCOL    EndDevPath;
+} FV_MEMMAP_DEVICE_PATH;
+
+typedef struct {
+  UINT32              FvBase;
+  UINT32              FvSize;
+} FV_INFO;
+
+//
+// Protocol APIs
+//
+EFI_STATUS
+EFIAPI
+FvbProtocolGetAttributes (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  OUT EFI_FVB_ATTRIBUTES_2                      *Attributes
+  );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolSetAttributes (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  IN OUT EFI_FVB_ATTRIBUTES_2                   *Attributes
+  );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolGetPhysicalAddress (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL  *This,
+       OUT EFI_PHYSICAL_ADDRESS                *Address
+  );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolGetBlockSize (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL  *This,
+  IN  EFI_LBA                                  Lba,
+  OUT UINTN                                    *BlockSize,
+  OUT UINTN                                    *NumOfBlocks
+  );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolRead (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  IN EFI_LBA                                    Lba,
+  IN UINTN                                      Offset,
+  IN OUT UINTN                                  *NumBytes,
+  OUT UINT8                                     *Buffer
+  );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolWrite (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL   *This,
+  IN EFI_LBA                                    Lba,
+  IN UINTN                                      Offset,
+  IN OUT UINTN                                  *NumBytes,
+  IN UINT8                                      *Buffer
+  );
+
+EFI_STATUS
+EFIAPI
+FvbProtocolEraseBlocks (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL    *This,
+  ...
+  );
+
+BOOLEAN
+IsFvHeaderValid (
+  IN       EFI_PHYSICAL_ADDRESS          FvBase,
+  IN CONST EFI_FIRMWARE_VOLUME_HEADER    *FwVolHeader
+  );
+
+EFI_STATUS
+GetFvbInfo (
+  IN  EFI_PHYSICAL_ADDRESS         FvBaseAddress,
+  OUT EFI_FIRMWARE_VOLUME_HEADER   **FvbInfo
+  );
+
+extern FVB_GLOBAL                         mFvbModuleGlobal;
+extern FV_MEMMAP_DEVICE_PATH              mFvMemmapDevicePathTemplate;
+extern FV_PIWG_DEVICE_PATH                mFvPIWGDevicePathTemplate;
+extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate;
+extern FV_INFO                            mPlatformFvBaseAddress[];
+extern FV_INFO                            mPlatformDefaultBaseAddress[];
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
new file mode 100644
index 000000000000..36af1130c8ee
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
@@ -0,0 +1,22 @@
+/** @file
+  Definitions common to MM implementation in this driver.
+
+  Copyright (c) Microsoft Corporation.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SPI_FVB_SERVICE_MM_H_
+#define _SPI_FVB_SERVICE_MM_H_
+
+/**
+  The function does the necessary initialization work for
+  Firmware Volume Block Driver.
+
+**/
+VOID
+FvbInitialize (
+  VOID
+  );
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
new file mode 100644
index 000000000000..bf1306f00201
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
@@ -0,0 +1,68 @@
+### @file
+# Component description file for the Serial Flash device Runtime driver.
+#
+# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+  INF_VERSION                    = 0x00010017
+  BASE_NAME                      = SpiFvbServiceSmm
+  FILE_GUID                      = 68A10D85-6858-4402-B070-028B3EA21747
+  VERSION_STRING                 = 1.0
+  MODULE_TYPE                    = DXE_SMM_DRIVER
+  PI_SPECIFICATION_VERSION       = 1.10
+  ENTRY_POINT                    = SpiFvbTraditionalMmInitialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[LibraryClasses]
+  PcdLib
+  MemoryAllocationLib
+  CacheMaintenanceLib
+  BaseMemoryLib
+  DebugLib
+  BaseLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  SpiFlashCommonLib
+  MmServicesTableLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase   ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize   ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize   ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase         ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize         ## CONSUMES
+
+[Sources]
+  FvbInfo.c
+  SpiFvbServiceCommon.h
+  SpiFvbServiceCommon.c
+  SpiFvbServiceMm.h
+  SpiFvbServiceMm.c
+  SpiFvbServiceTraditionalMm.c
+
+[Protocols]
+  gEfiDevicePathProtocolGuid                    ## PRODUCES
+  gEfiSmmFirmwareVolumeBlockProtocolGuid        ## PRODUCES
+
+[Guids]
+  gEfiFirmwareFileSystem2Guid                   ## CONSUMES
+  gEfiSystemNvDataFvGuid                        ## CONSUMES
+
+[Depex]
+  TRUE
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
new file mode 100644
index 000000000000..b66233968247
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
@@ -0,0 +1,67 @@
+### @file
+# Component description file for the Serial Flash device Standalone MM driver.
+#
+# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = SpiFvbServiceStandaloneMm
+  FILE_GUID                      = E6313655-8BD0-4EAB-B319-AD5E212CE6AB
+  VERSION_STRING                 = 1.0
+  MODULE_TYPE                    = MM_STANDALONE
+  PI_SPECIFICATION_VERSION       = 0x00010032
+  ENTRY_POINT                    = SpiFvbStandaloneMmInitialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  CacheMaintenanceLib
+  DebugLib
+  MemoryAllocationLib
+  PcdLib
+  MmServicesTableLib
+  SpiFlashCommonLib
+  StandaloneMmDriverEntryPoint
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase   ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize   ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize   ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase         ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize         ## CONSUMES
+
+[Sources]
+  FvbInfo.c
+  SpiFvbServiceCommon.h
+  SpiFvbServiceCommon.c
+  SpiFvbServiceMm.h
+  SpiFvbServiceMm.c
+  SpiFvbServiceStandaloneMm.c
+
+[Protocols]
+  gEfiDevicePathProtocolGuid                    ## PRODUCES
+  gEfiSmmFirmwareVolumeBlockProtocolGuid        ## PRODUCES
+
+[Guids]
+  gEfiFirmwareFileSystem2Guid                   ## CONSUMES
+  gEfiSystemNvDataFvGuid                        ## CONSUMES
+
+[Depex]
+  TRUE
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
index d4e15100bfde..1e826a080f28 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc
@@ -40,6 +40,9 @@ [LibraryClasses]
   PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignmentLib/PeiGetVtdPmrAlignmentLib.inf
   TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
   MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
+  SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
 
 [LibraryClasses.common.PEIM]
   PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
@@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER]
 
 [LibraryClasses.common.DXE_SMM_DRIVER]
   MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
+  MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf
   SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
 
+[LibraryClasses.common.MM_STANDALONE]
+  MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf
+  MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
+  StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
+
 ###################################################################################################
 #
 # Components Section - list of the modules and components that will be processed by compilation
@@ -86,6 +95,8 @@ [Components]
   IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
   IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.inf
   IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/SamplePlatformDevicePolicyDxe.inf
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
   IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
   IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf
   IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf
-- 
2.28.0.windows.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [edk2-platforms][PATCH v5 11/46] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 10/46] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
@ 2021-08-03 15:00 ` Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 15/46] WhiskeylakeOpenBoardPkg: " Michael Kubacki
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel
  Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
	Deepika Kethi Reddy, Kathappan Esakkithevar

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
 Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf                         |  4 +--
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf |  4 +--
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf                | 36 ++++++++++----------
 Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf        |  4 +--
 4 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 9208aeda5d2a..6ca0ada751f6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
   MinPlatformPkg/MinPlatformPkg.dec
 
 [Pcd]
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                    ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase          ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize          ## CONSUMES
 
 [Sources]
   BiosInfo.c
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
index d9959a79d0bb..7d2f4b2c0cb2 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -34,8 +34,8 @@
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize            = 0x00190000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset        = 0x00320000  # Flash addr (0xFFB20000)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize          = 0x00170000  #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset                  = 0x00490000  # Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    = 0x000B0000  #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset        = 0x00490000  # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize          = 0x000B0000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset              = 0x00540000  # Flash addr (0xFFD40000)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize                = 0x00070000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset              = 0x005B0000  # Flash addr (0xFFDB0000)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
index 795cc0da75d8..6397d80d3895 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.CometlakeURvp]
 # assigned with PCD values. Instead, it uses the definitions for its variety, which
 # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
 #
-BaseAddress   = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress      #The base address of the FLASH Device.
-Size          = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize             #The size in bytes of the FLASH Device
+BaseAddress   = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the FLASH Device.
+Size          = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize             #The size in bytes of the FLASH Device
 ErasePolarity = 1
 BlockSize     = $(FLASH_BLOCK_SIZE)
 NumBlocks     = $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.CometlakeURvp]
 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
 # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
 SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv     = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
 ################################################################################
 #
 # Following are lists of FD Region layout which correspond to the locations of different
@@ -153,8 +153,8 @@ [FD.CometlakeURvp]
 gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
 FV = FvPostMemory
 
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
 #Microcode
 FV = FvMicrocode
 
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
index 1d09b990b163..abb79c111e0b 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
@@ -47,8 +47,8 @@ [Packages]
 
 [Pcd]
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress                     ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                          ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                          ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                ## CONSUMES
   gCometlakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
   gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
   gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
-- 
2.28.0.windows.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [edk2-platforms][PATCH v5 15/46] WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 10/46] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 11/46] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
@ 2021-08-03 15:00 ` Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel; +Cc: Chasel Chiu, Nate DeSimone

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf                                        |  4 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf                       |  4 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf                     |  4 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf |  2 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf                                    | 36 ++++++++++----------
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf              |  4 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf                             | 36 ++++++++++----------
 7 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index a9687d93dee1..0a807ad84f4d 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
   MinPlatformPkg/MinPlatformPkg.dec
 
 [Pcd]
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                    ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                    ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    ## CONSUMES
 
 [Sources]
   BiosInfo.c
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
index 3233375d6568..537d507ed7d6 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
@@ -47,8 +47,8 @@ [Packages]
 
 [Pcd]
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress                     ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                          ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                          ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase                ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                ## CONSUMES
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
index f7aa730ae7d2..5895eebc5a79 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
@@ -38,8 +38,8 @@
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize          = 0x00170000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset              = 0x00490000  # Flash addr (0xFFDE0000)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize                = 0x00070000  #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset                  = 0x00500000  # Flash addr (0xFFE50000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    = 0x00050000  #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset        = 0x00500000  # Flash addr (0xFFE50000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize          = 0x00050000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset              = 0x00550000  # Flash addr (0xFFEA0000)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize                = 0x000EA000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset              = 0x0063A000  # Flash addr (0xFFF8A000)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
index 2903bdacaebd..091d2118c7b3 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
@@ -293,7 +293,7 @@ [Pcd]
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
 
 [FixedPcd]
   gSiPkgTokenSpaceGuid.PcdMchBaseAddress              ## CONSUMES
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 22fbfc99f0f0..8aea5aa475a0 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.UpXtreme]
 # assigned with PCD values. Instead, it uses the definitions for its variety, which
 # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
 #
-BaseAddress   = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the FLASH Device.
-Size          = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize             #The size in bytes of the FLASH Device
+BaseAddress   = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the FLASH Device.
+Size          = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize             #The size in bytes of the FLASH Device
 ErasePolarity = 1
 BlockSize     = $(FLASH_BLOCK_SIZE)
 NumBlocks     = $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.UpXtreme]
 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
 # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
 SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv     = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
 ################################################################################
 #
 # Following are lists of FD Region layout which correspond to the locations of different
@@ -158,8 +158,8 @@ [FD.UpXtreme]
 # FSP_S Section
 FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_S.fd
 
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
 #Microcode
 FV = FvMicrocode
 
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
index e0db38194211..586e3488c2a7 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -34,8 +34,8 @@
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize            = 0x00190000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset        = 0x00320000  # Flash addr (0xFFB20000)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize          = 0x00170000  #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset                  = 0x00490000  # Flash addr (0xFFC90000)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize                    = 0x000B0000  #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset        = 0x00490000  # Flash addr (0xFFC90000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize          = 0x000B0000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset              = 0x00540000  # Flash addr (0xFFD40000)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize                = 0x00070000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset              = 0x005B0000  # Flash addr (0xFFDB0000)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
index 1ab8c137924e..f0601984338c 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.WhiskeylakeURvp]
 # assigned with PCD values. Instead, it uses the definitions for its variety, which
 # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
 #
-BaseAddress   = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress      #The base address of the FLASH Device.
-Size          = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize             #The size in bytes of the FLASH Device
+BaseAddress   = $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the FLASH Device.
+Size          = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize             #The size in bytes of the FLASH Device
 ErasePolarity = 1
 BlockSize     = $(FLASH_BLOCK_SIZE)
 NumBlocks     = $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.WhiskeylakeURvp]
 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro expression is not supported.
 # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get the real CodeCache base address.
 SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv     = 0x60
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    = gSiPkgTokenSpaceGuid.PcdBiosSize
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           = gSiPkgTokenSpaceGuid.PcdBiosSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase    = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize    = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset  = gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize    = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress       = $(gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress    = gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize           = gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
 ################################################################################
 #
 # Following are lists of FD Region layout which correspond to the locations of different
@@ -153,8 +153,8 @@ [FD.WhiskeylakeURvp]
 gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize
 FV = FvPostMemory
 
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
 #Microcode
 FV = FvMicrocode
 
-- 
2.28.0.windows.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
                   ` (2 preceding siblings ...)
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 15/46] WhiskeylakeOpenBoardPkg: " Michael Kubacki
@ 2021-08-03 15:00 ` Michael Kubacki
  2021-08-23  3:15   ` Heng Luo
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 32/46] MinPlatformPkg: Remove SpiFlashCommonLibNull Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
  5 siblings, 1 reply; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates TigerlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 +++++--
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 2 +-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
index 1adf63403450..758b966fee81 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -173,7 +173,7 @@ [LibraryClasses.X64]
   !include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
 
 [LibraryClasses.X64.DXE_SMM_DRIVER]
-  SpiFlashCommonLib|$(PLATFORM_BOARD_PACKAGE)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 !if $(TARGET) == DEBUG
   TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
 !endif
@@ -297,6 +297,10 @@ [Components.X64]
   !include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   #
   # SmmAccess
   #
@@ -326,7 +330,6 @@ [Components.X64]
       NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
   }
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index e3b2f048524c..b802c2167d06 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -434,7 +434,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
 INF  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 
 INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
-- 
2.28.0.windows.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [edk2-platforms][PATCH v5 32/46] MinPlatformPkg: Remove SpiFlashCommonLibNull
  2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
                   ` (3 preceding siblings ...)
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
@ 2021-08-03 15:00 ` Michael Kubacki
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
  5 siblings, 0 replies; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel; +Cc: Chasel Chiu, Nate DeSimone, Liming Gao, Eric Dong

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library instance has moved to IntelSiliconPkg.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
 Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c   | 101 --------------------
 Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf |  29 ------
 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h                           |  98 -------------------
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec                                            |   2 -
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc                                            |   4 -
 5 files changed, 234 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
deleted file mode 100644
index 403b16a1b421..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/** @file
-  Null Library instance of SPI Flash Common Library Class
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Uefi.h>
-#include <Library/DebugLib.h>
-
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval     EFI_SUCCESS       Opertion is successful.
-  @retval     EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]      Address       The starting physical address of the read.
-  @param[in,out]  NumBytes      On input, the number of bytes to read. On output, the number
-                                of bytes actually read.
-  @param[out]     Buffer        The destination data buffer for the read.
-
-  @retval         EFI_SUCCESS       Opertion is successful.
-  @retval         EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN     UINTN                        Address,
-  IN OUT UINT32                       *NumBytes,
-     OUT UINT8                        *Buffer
-  )
-{
-  ASSERT(FALSE);
-  return EFI_SUCCESS;
-}
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]      Address         The starting physical address of the write.
-  @param[in,out]  NumBytes        On input, the number of bytes to write. On output,
-                                  the actual number of bytes written.
-  @param[in]      Buffer          The source data buffer for the write.
-
-  @retval         EFI_SUCCESS       Opertion is successful.
-  @retval         EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN     UINTN                      Address,
-  IN OUT UINT32                     *NumBytes,
-  IN     UINT8                      *Buffer
-  )
-{
-  ASSERT(FALSE);
-  return EFI_SUCCESS;
-}
-
-/**
-  Erase the block starting at Address.
-
-  @param[in]  Address         The starting physical address of the block to be erased.
-                              This library assume that caller garantee that the PAddress
-                              is at the starting address of this block.
-  @param[in]  NumBytes        On input, the number of bytes of the logical block to be erased.
-                              On output, the actual number of bytes erased.
-
-  @retval     EFI_SUCCESS.      Opertion is successful.
-  @retval     EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
-  IN    UINTN                     Address,
-  IN    UINTN                     *NumBytes
-  )
-{
-  ASSERT(FALSE);
-  return EFI_SUCCESS;
-}
-
diff --git a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
deleted file mode 100644
index 75ef1cb921df..000000000000
--- a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
+++ /dev/null
@@ -1,29 +0,0 @@
-### @file
-# NULL instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  INF_VERSION                    = 0x00010017
-  BASE_NAME                      = SpiFlashCommonLibNull
-  FILE_GUID                      = F35BBEE7-A681-443E-BB15-07AF9FABBDED
-  VERSION_STRING                 = 1.0
-  MODULE_TYPE                    = BASE
-  LIBRARY_CLASS                  = SpiFlashCommonLib
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[LibraryClasses]
-
-[Packages]
-  MdePkg/MdePkg.dec
-
-[Sources]
-  SpiFlashCommonLibNull.c
diff --git a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h b/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
deleted file mode 100644
index 0c5e72258c2d..000000000000
--- a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
-  The header file includes the common header files, defines
-  internal structure and functions used by SpiFlashCommonLib.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __SPI_FLASH_COMMON_LIB_H__
-#define __SPI_FLASH_COMMON_LIB_H__
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define SECTOR_SIZE_4KB   0x1000      // Common 4kBytes sector size
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval     EFI_SUCCESS       Opertion is successful.
-  @retval     EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  );
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]      Address       The starting physical address of the read.
-  @param[in,out]  NumBytes      On input, the number of bytes to read. On output, the number
-                                of bytes actually read.
-  @param[out]     Buffer        The destination data buffer for the read.
-
-  @retval         EFI_SUCCESS       Opertion is successful.
-  @retval         EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN     UINTN                        Address,
-  IN OUT UINT32                       *NumBytes,
-     OUT UINT8                        *Buffer
-  );
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]      Address         The starting physical address of the write.
-  @param[in,out]  NumBytes        On input, the number of bytes to write. On output,
-                                  the actual number of bytes written.
-  @param[in]      Buffer          The source data buffer for the write.
-
-  @retval         EFI_SUCCESS       Opertion is successful.
-  @retval         EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN     UINTN                      Address,
-  IN OUT UINT32                     *NumBytes,
-  IN     UINT8                      *Buffer
-  );
-
-/**
-  Erase the block starting at Address.
-
-  @param[in]  Address         The starting physical address of the block to be erased.
-                              This library assume that caller garantee that the PAddress
-                              is at the starting address of this block.
-  @param[in]  NumBytes        On input, the number of bytes of the logical block to be erased.
-                              On output, the actual number of bytes erased.
-
-  @retval     EFI_SUCCESS.      Opertion is successful.
-  @retval     EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
-  IN    UINTN                     Address,
-  IN    UINTN                     *NumBytes
-  );
-
-#endif
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index bcb42f0ef9e6..3bcd7c854369 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -62,8 +62,6 @@ [LibraryClasses]
   SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
   SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h
 
-  SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
-
   BoardInitLib|Include/Library/BoardInitLib.h
   MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
   SecBoardInitLib|Include/Library/SecBoardInitLib.h
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
index d43131bf9cec..cf7870a66140 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc
@@ -110,7 +110,6 @@ [LibraryClasses.common.DXE_DRIVER]
   TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf
 
 [LibraryClasses.common.DXE_SMM_DRIVER]
-  SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
   TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
   TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/SmmTestPointLib.inf
 
@@ -119,7 +118,6 @@ [LibraryClasses.common.MM_STANDALONE]
   MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf
   MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-  SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
   StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
   VariableReadLib|MinPlatformPkg/Library/SmmVariableReadLib/StandaloneMmVariableReadLib.inf
   VariableWriteLib|MinPlatformPkg/Library/SmmVariableWriteLib/StandaloneMmVariableWriteLib.inf
@@ -162,8 +160,6 @@ [Components]
   MinPlatformPkg/Bds/Library/BoardBootManagerLibNull/BoardBootManagerLibNull.inf
   MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
 
-  MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
-
   MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
   MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
   MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
-- 
2.28.0.windows.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
  2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
                   ` (4 preceding siblings ...)
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 32/46] MinPlatformPkg: Remove SpiFlashCommonLibNull Michael Kubacki
@ 2021-08-03 15:00 ` Michael Kubacki
  2021-08-06  2:40   ` Chiu, Chasel
  2021-08-06  2:42   ` Chiu, Chasel
  5 siblings, 2 replies; 10+ messages in thread
From: Michael Kubacki @ 2021-08-03 15:00 UTC (permalink / raw)
  To: devel; +Cc: Chasel Chiu, Nate DeSimone

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates usage of gPchSpiPpiGuid to use the new interface that
identifies SPI flash regions by GUID.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
 Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c   | 4 ++--
 Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
index fc48bdc6fccb..fe8883a8af29 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
@@ -98,7 +98,7 @@ SerialPortWrite (
     LinearOffset = (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress));
     Status = PchSpiPpi->FlashErase (
                           PchSpiPpi,
-                          FlashRegionBios,
+                          &gFlashRegionBiosGuid,
                           LinearOffset,
                           NvMessageAreaSize
                           );
@@ -118,7 +118,7 @@ SerialPortWrite (
 
   Status = PchSpiPpi->FlashWrite (
                         PchSpiPpi,
-                        FlashRegionBios,
+                        &gFlashRegionBiosGuid,
                         LinearOffset,
                         BytesWritten,
                         (UINT8 *) &Buffer[SourceBufferOffset]
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
index b959cd1f4612..b8ae214f0920 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
@@ -43,6 +43,7 @@ [Ppis]
   gPchSpiPpiGuid
 
 [Guids]
+  gFlashRegionBiosGuid
   gSpiFlashDebugHobGuid
 
 [Pcd]
-- 
2.28.0.windows.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
@ 2021-08-06  2:40   ` Chiu, Chasel
  2021-08-06  2:42   ` Chiu, Chasel
  1 sibling, 0 replies; 10+ messages in thread
From: Chiu, Chasel @ 2021-08-06  2:40 UTC (permalink / raw)
  To: mikuback@linux.microsoft.com, devel@edk2.groups.io,
	Benjamin Doron
  Cc: Desimone, Nathaniel L


Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Tested-by: Benjamin Doron <benjamin.doron00@gmail.com>


> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Tuesday, August 3, 2021 11:01 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>
> Subject: [edk2-platforms][PATCH v5 43/46]
> KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
> 
> From: Michael Kubacki <michael.kubacki@microsoft.com>
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
> 
> Updates usage of gPchSpiPpiGuid to use the new interface that identifies SPI
> flash regions by GUID.
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> ---
> 
> Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiS
> erialPortLibSpiFlash.c   | 4 ++--
> 
> Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiS
> erialPortLibSpiFlash.inf | 1 +
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.c
> b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.c
> index fc48bdc6fccb..fe8883a8af29 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.c
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
> +++ sh/PeiSerialPortLibSpiFlash.c
> @@ -98,7 +98,7 @@ SerialPortWrite (
>      LinearOffset = (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase)
> - FixedPcdGet32 (PcdFlashAreaBaseAddress));
>      Status = PchSpiPpi->FlashErase (
>                            PchSpiPpi,
> -                          FlashRegionBios,
> +                          &gFlashRegionBiosGuid,
>                            LinearOffset,
>                            NvMessageAreaSize
>                            );
> @@ -118,7 +118,7 @@ SerialPortWrite (
> 
>    Status = PchSpiPpi->FlashWrite (
>                          PchSpiPpi,
> -                        FlashRegionBios,
> +                        &gFlashRegionBiosGuid,
>                          LinearOffset,
>                          BytesWritten,
>                          (UINT8 *) &Buffer[SourceBufferOffset] diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.inf
> b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.inf
> index b959cd1f4612..b8ae214f0920 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.inf
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
> +++ sh/PeiSerialPortLibSpiFlash.inf
> @@ -43,6 +43,7 @@ [Ppis]
>    gPchSpiPpiGuid
> 
>  [Guids]
> +  gFlashRegionBiosGuid
>    gSpiFlashDebugHobGuid
> 
>  [Pcd]
> --
> 2.28.0.windows.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
  2021-08-06  2:40   ` Chiu, Chasel
@ 2021-08-06  2:42   ` Chiu, Chasel
  1 sibling, 0 replies; 10+ messages in thread
From: Chiu, Chasel @ 2021-08-06  2:42 UTC (permalink / raw)
  To: mikuback@linux.microsoft.com, devel@edk2.groups.io,
	Benjamin Doron
  Cc: Desimone, Nathaniel L


Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Tested-by: Benjamin Doron <benjamin.doron00@gmail.com>

> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Tuesday, August 3, 2021 11:01 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>
> Subject: [edk2-platforms][PATCH v5 43/46]
> KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
> 
> From: Michael Kubacki <michael.kubacki@microsoft.com>
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
> 
> Updates usage of gPchSpiPpiGuid to use the new interface that identifies SPI
> flash regions by GUID.
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> ---
> 
> Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiS
> erialPortLibSpiFlash.c   | 4 ++--
> 
> Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiS
> erialPortLibSpiFlash.inf | 1 +
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.c
> b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.c
> index fc48bdc6fccb..fe8883a8af29 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.c
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
> +++ sh/PeiSerialPortLibSpiFlash.c
> @@ -98,7 +98,7 @@ SerialPortWrite (
>      LinearOffset = (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase)
> - FixedPcdGet32 (PcdFlashAreaBaseAddress));
>      Status = PchSpiPpi->FlashErase (
>                            PchSpiPpi,
> -                          FlashRegionBios,
> +                          &gFlashRegionBiosGuid,
>                            LinearOffset,
>                            NvMessageAreaSize
>                            );
> @@ -118,7 +118,7 @@ SerialPortWrite (
> 
>    Status = PchSpiPpi->FlashWrite (
>                          PchSpiPpi,
> -                        FlashRegionBios,
> +                        &gFlashRegionBiosGuid,
>                          LinearOffset,
>                          BytesWritten,
>                          (UINT8 *) &Buffer[SourceBufferOffset] diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.inf
> b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.inf
> index b959cd1f4612..b8ae214f0920 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/P
> eiSerialPortLibSpiFlash.inf
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
> +++ sh/PeiSerialPortLibSpiFlash.inf
> @@ -43,6 +43,7 @@ [Ppis]
>    gPchSpiPpiGuid
> 
>  [Guids]
> +  gFlashRegionBiosGuid
>    gSpiFlashDebugHobGuid
> 
>  [Pcd]
> --
> 2.28.0.windows.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  2021-08-03 15:00 ` [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
@ 2021-08-23  3:15   ` Heng Luo
  0 siblings, 0 replies; 10+ messages in thread
From: Heng Luo @ 2021-08-23  3:15 UTC (permalink / raw)
  To: mikuback@linux.microsoft.com, devel@edk2.groups.io
  Cc: Chaganty, Rangasai V, Desimone, Nathaniel L

Reviewed-by: Heng Luo <heng.luo@intel.com>

> -----Original Message-----
> From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
> Sent: Tuesday, August 3, 2021 11:01 PM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone,
> Nathaniel L <nathaniel.l.desimone@intel.com>; Luo, Heng <heng.luo@intel.com>
> Subject: [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update
> SpiFvbService & SpiFlashCommonLib
> 
> From: Michael Kubacki <michael.kubacki@microsoft.com>
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
> 
> Updates TigerlakeOpenBoardPkg to use the SmmSpiFlashCommonLib instance in
> IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg.
> 
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Heng Luo <heng.luo@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
>  Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7
> +++++--
> Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 2 +-
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git
> a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
> b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
> index 1adf63403450..758b966fee81 100644
> --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
> +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.ds
> +++ c
> @@ -173,7 +173,7 @@ [LibraryClasses.X64]
>    !include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
> 
>  [LibraryClasses.X64.DXE_SMM_DRIVER]
> -
> SpiFlashCommonLib|$(PLATFORM_BOARD_PACKAGE)/Library/SmmSpiFlashCom
> monLib/SmmSpiFlashCommonLib.inf
> +
> +
> SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiF
> + lashCommonLib.inf
>  !if $(TARGET) == DEBUG
> 
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Sm
> mTestPointCheckLib.inf
>  !endif
> @@ -297,6 +297,10 @@ [Components.X64]
>    !include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
>    $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
> 
> +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
> +  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> +!endif
> +
>    #
>    # SmmAccess
>    #
> @@ -326,7 +330,6 @@ [Components.X64]
>        NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
>    }
> 
> -  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
>    $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
> 
>    UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { diff --git
> a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> index e3b2f048524c..b802c2167d06 100644
> --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
> +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fd
> +++ f
> @@ -434,7 +434,7 @@ [FV.FvOsBootUncompact]  !if
> gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE  INF
> $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
>  INF
> $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
> -INF  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> +INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
> 
>  INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
>  INF  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
> --
> 2.28.0.windows.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-08-23  3:15 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-08-03 15:00 [edk2-platforms][PATCH v5 00/46] Consolidate SpiFlashCommonLib instances Michael Kubacki
2021-08-03 15:00 ` [edk2-platforms][PATCH v5 10/46] IntelSiliconPkg: Add MM SPI FVB services Michael Kubacki
2021-08-03 15:00 ` [edk2-platforms][PATCH v5 11/46] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Michael Kubacki
2021-08-03 15:00 ` [edk2-platforms][PATCH v5 15/46] WhiskeylakeOpenBoardPkg: " Michael Kubacki
2021-08-03 15:00 ` [edk2-platforms][PATCH v5 23/46] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Michael Kubacki
2021-08-23  3:15   ` Heng Luo
2021-08-03 15:00 ` [edk2-platforms][PATCH v5 32/46] MinPlatformPkg: Remove SpiFlashCommonLibNull Michael Kubacki
2021-08-03 15:00 ` [edk2-platforms][PATCH v5 43/46] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
2021-08-06  2:40   ` Chiu, Chasel
2021-08-06  2:42   ` Chiu, Chasel

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