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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?f153O+Ox0SclA8GdWYBYEr0gu0hTxuuw0h1Pe5j0ojMoYq6vg8wocE4C6Rz0?= =?us-ascii?Q?Q8vptQnHjoZSNBB8BAO5ByvFJsVJ3dnxOy+JY2cP9O8Id9NjUa1Eezf0gvIa?= =?us-ascii?Q?OjhbJLKI7DaK8jaMyIcdRACWuSq2b496VkkbGyf5GM9xiOJiFlWQEmiVIHki?= =?us-ascii?Q?nHZBF6q1ybhY7E1KU98z4vryfdVFTgUK7rrfN7trk1yEQHEvPuwcdAGYtgmY?= =?us-ascii?Q?82lbu4GtwP3WEMHpkAYsCrDouINgeo3614rSY+9cDBch2tX7s3EOK5ZVz3Md?= =?us-ascii?Q?9pOFNeNLI8D3zoBuQyTEXnX/tU4EqBfzG7XkGa/p/dro42Pj/lJFkzqd327p?= =?us-ascii?Q?LdgP6zkZ2FQYfyLrnQRVdTt8lBao5Vj8R7s+XpKl1E4YGX5TxSFpHQP67L/o?= =?us-ascii?Q?O6EF6oike46vnTU8iYhuVZLscaaUUJ2yrBYVTljtM6OPW4oRPq7AaCXtLp8z?= =?us-ascii?Q?Xi38CTdNiS+RkROkkTd2bnysodG6xbNFi3cv7NNBZia4XVyUxXVXnutk/F4y?= =?us-ascii?Q?WmOPBgDA2KuuaSj/hLFvLyKd4jw6JWmXxUfZov98wq6S2aSMabDTRl5wrCV8?= =?us-ascii?Q?V4FDG27WY8ue5/4xe7UXEkEveWC5wSERdaDD7W3TT2t6Nc/5HgeuD6TYOP0R?= =?us-ascii?Q?Nj2v98EdnMDsDMiRvvJwRIj4sNdtUycDF+yDldWzRFE65LlEVfJqcWDb3dqU?= =?us-ascii?Q?Xelht/v3Xqgc54X+/dfFY8S+dsld43GUz6Ccbvj0cgpkklnAhAJ17hWUlkIv?= =?us-ascii?Q?u+l6hgqKFPowzvxO6bExwVxJXAuXPrkHxryA6Y6DNrCRDy46+Dl0avVT5TCN?= =?us-ascii?Q?Swz5MbASXkhmksKPWnnfgzPdp8UqfBxhL3TBsr8FlC2XrCAguvPrzZv8AqkB?= =?us-ascii?Q?eK4KxYyzlzyijW40562rb7/f5hF7K4ONyd+uf0liCrGlCopGUxmWrcMHuMSb?= =?us-ascii?Q?jXaWTS9kGApaeRX8UxK48tHsKqISyUCcPN6CGILYIN3RM/hajLsQoXsZnNZy?= =?us-ascii?Q?e+rNRhYZlHNta5U5Ty9Mx/yJ0Ytl59MGiULWM+3xU6sTl2/OHQVQi1KdQbAH?= =?us-ascii?Q?XIiyKgNf/jUkeQe8fbNButT3t0q+TvRAIMTmWo5BYNo0hAWobbrXWhqjDTW3?= =?us-ascii?Q?5sc4A4Drt+Rirue4QJhWNTC7kSJjvTN0m6pkli1J7SzthC0LxGWs9hqVk6IE?= =?us-ascii?Q?RgpOkuultCY/NRG9zC2c4KNRTRO8cPanUp+1e6Or0XqIyb8mF2OxN0yqiRNZ?= =?us-ascii?Q?5Tb64/ULQI6+ngSTdBSXp3N8WdZpS0BmzEDXTC7QTs/nos1pslXsEpueZwyo?= =?us-ascii?Q?9+Lf0N8gB7lbweRCextugPqp?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 12eacaf5-f573-43ac-4e34-08d9578545d4 X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Aug 2021 20:20:16.4883 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nXqyEk0ry3ve3nvNg/CbVczvodqA6NDl7ywwWdiMxA5XCfsCBz3kobfN5IxLC+NVbwMUNhl2/JILmazvwLkCSA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4432 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3429 Both the TDX and SEV support needs to reserve a page in MEMFD as a work area. The page will contain meta data specific to the guest type. Currently, the SEV-ES support reserves a page in MEMFD (PcdSevEsWorkArea) for the work area. This page can be reused as a TDX work area when Intel TDX is enabled. Based on the discussion [1], it was agreed to rename the SevEsWorkArea to the OvmfWorkArea, and add a header that can be used to indicate the work area type. [1] https://edk2.groups.io/g/devel/message/78262?p=3D,,,20,0,0,0::\ created,0,SNP,20,2,0,84476064 Cc: James Bottomley Cc: Min Xu Cc: Jiewen Yao Cc: Tom Lendacky Cc: Jordan Justen Cc: Ard Biesheuvel Cc: Erdem Aktas Signed-off-by: Brijesh Singh --- OvmfPkg/OvmfPkg.dec | 6 +++ OvmfPkg/OvmfPkgX64.fdf | 9 +++- OvmfPkg/PlatformPei/PlatformPei.inf | 4 +- OvmfPkg/Include/Library/MemEncryptSevLib.h | 21 +-------- OvmfPkg/Include/WorkArea.h | 53 ++++++++++++++++++++++ OvmfPkg/PlatformPei/MemDetect.c | 32 ++++++------- 6 files changed, 85 insertions(+), 40 deletions(-) create mode 100644 OvmfPkg/Include/WorkArea.h diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index 2ab27f0c73c2..9d31ec45c78a 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -330,6 +330,12 @@ [PcdsFixedAtBuild] gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|0x0|UINT32|0x47 gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize|0x0|UINT32|0x48 =20 + ## The base address and size of the work area used during the SEC + # phase by the SEV and TDX supports. + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|0|UINT32|0x49 + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize|0|UINT32|0x50 + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaHeaderSize|4|UINT32|0x51 + [PcdsDynamic, PcdsDynamicEx] gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x1= 0 diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf index 5fa8c0895808..418e0ea5add4 100644 --- a/OvmfPkg/OvmfPkgX64.fdf +++ b/OvmfPkg/OvmfPkgX64.fdf @@ -83,7 +83,7 @@ [FD.MEMFD] gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|gUefiOvmfPkgTokenSpaceGuid.P= cdOvmfSecGhcbSize =20 0x00B000|0x001000 -gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpaceGuid.P= cdSevEsWorkAreaSize +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|gUefiOvmfPkgTokenSpaceGuid.= PcdOvmfWorkAreaSize =20 0x00C000|0x001000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecGhcbBackupSize @@ -99,6 +99,13 @@ [FD.MEMFD] gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|gUefiOvmfPkgTokenSpaceGuid.= PcdOvmfDxeMemFvSize FV =3D DXEFV =20 +##########################################################################= ################ +# SEV specific PCD settings +SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaHeaderSize =3D 0x4 +SET gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase =3D $(MEMFD_BASE_ADDRES= S) + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase + gUefiOvmfPkgTokenSpa= ceGuid.PcdOvmfWorkAreaHeaderSize +SET gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize =3D gUefiOvmfPkgTokenSp= aceGuid.PcdOvmfWorkAreaSize - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaHea= derSize +##########################################################################= ################ + ##########################################################################= ###### =20 [FV.SECFV] diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/Plat= formPei.inf index 89d1f7636870..67eb7aa7166b 100644 --- a/OvmfPkg/PlatformPei/PlatformPei.inf +++ b/OvmfPkg/PlatformPei/PlatformPei.inf @@ -116,8 +116,8 @@ [FixedPcd] gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize - gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase - gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable diff --git a/OvmfPkg/Include/Library/MemEncryptSevLib.h b/OvmfPkg/Include/L= ibrary/MemEncryptSevLib.h index 76d06c206c8b..adc490e466ec 100644 --- a/OvmfPkg/Include/Library/MemEncryptSevLib.h +++ b/OvmfPkg/Include/Library/MemEncryptSevLib.h @@ -12,6 +12,7 @@ #define _MEM_ENCRYPT_SEV_LIB_H_ =20 #include +#include =20 // // Define the maximum number of #VCs allowed (e.g. the level of nesting @@ -36,26 +37,6 @@ typedef struct { VOID *GhcbBackupPages; } SEV_ES_PER_CPU_DATA; =20 -// -// Internal structure for holding SEV-ES information needed during SEC pha= se -// and valid only during SEC phase and early PEI during platform -// initialization. -// -// This structure is also used by assembler files: -// OvmfPkg/ResetVector/ResetVector.nasmb -// OvmfPkg/ResetVector/Ia32/PageTables64.asm -// OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm -// any changes must stay in sync with its usage. -// -typedef struct _SEC_SEV_ES_WORK_AREA { - UINT8 SevEsEnabled; - UINT8 Reserved1[7]; - - UINT64 RandomData; - - UINT64 EncryptionMask; -} SEC_SEV_ES_WORK_AREA; - // // Memory encryption address range states. // diff --git a/OvmfPkg/Include/WorkArea.h b/OvmfPkg/Include/WorkArea.h new file mode 100644 index 000000000000..0aaad7e1da67 --- /dev/null +++ b/OvmfPkg/Include/WorkArea.h @@ -0,0 +1,53 @@ +/** @file + + Work Area structure definition + + Copyright (c) 2021, AMD Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef __OVMF_WORK_AREA_H__ +#define __OVMF_WORK_AREA_H__ + +// +// Internal structure for holding SEV-ES information needed during SEC pha= se +// and valid only during SEC phase and early PEI during platform +// initialization. +// +// This structure is also used by assembler files: +// OvmfPkg/ResetVector/ResetVector.nasmb +// OvmfPkg/ResetVector/Ia32/PageTables64.asm +// OvmfPkg/ResetVector/Ia32/Flat32ToFlat64.asm +// any changes must stay in sync with its usage. +// +typedef struct _SEC_SEV_ES_WORK_AREA { + UINT8 SevEsEnabled; + UINT8 Reserved1[7]; + + UINT64 RandomData; + + UINT64 EncryptionMask; +} SEC_SEV_ES_WORK_AREA; + +// +// Guest type for the work area +// +typedef enum { + GUEST_TYPE_NON_ENCRYPTED, + GUEST_TYPE_AMD_SEV, + GUEST_TYPE_INTEL_TDX, + +} GUEST_TYPE; + +// +// The work area structure header definition. +// +typedef struct _OVMF_WORK_AREA { + UINT8 GuestType; + UINT8 Reserved1[3]; + + SEC_SEV_ES_WORK_AREA SevEsWorkArea; +} OVMF_WORK_AREA; + +#endif diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetec= t.c index 2deec128f464..4c53b0fdf2fe 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -939,23 +939,21 @@ InitializeRamRegions ( } =20 #ifdef MDE_CPU_X64 - if (MemEncryptSevEsIsEnabled ()) { - // - // If SEV-ES is enabled, reserve the SEV-ES work area. - // - // Since this memory range will be used by the Reset Vector on S3 - // resume, it must be reserved as ACPI NVS. - // - // If S3 is unsupported, then various drivers might still write to t= he - // work area. We ought to prevent DXE from serving allocation reques= ts - // such that they would overlap the work area. - // - BuildMemoryAllocationHob ( - (EFI_PHYSICAL_ADDRESS)(UINTN) FixedPcdGet32 (PcdSevEsWorkAreaBase)= , - (UINT64)(UINTN) FixedPcdGet32 (PcdSevEsWorkAreaSize), - mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData - ); - } + // + // Reserve the work area. + // + // Since this memory range will be used by the Reset Vector on S3 + // resume, it must be reserved as ACPI NVS. + // + // If S3 is unsupported, then various drivers might still write to the + // work area. We ought to prevent DXE from serving allocation requests + // such that they would overlap the work area. + // + BuildMemoryAllocationHob ( + (EFI_PHYSICAL_ADDRESS)(UINTN) FixedPcdGet32 (PcdOvmfWorkAreaBase), + (UINT64)(UINTN) FixedPcdGet32 (PcdOvmfWorkAreaSize), + mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData + ); #endif } } --=20 2.17.1