From: "Marcin Wojtas" <mw@semihalf.com>
To: devel@edk2.groups.io
Cc: leif@nuviainc.com, ardb+tianocore@kernel.org, jaz@semihalf.com,
gjb@semihalf.com, upstream@semihalf.com,
Samer.El-Haj-Mahmoud@arm.com, jon@solid-run.com,
alon.rotman@solid-run.com, Marcin Wojtas <mw@semihalf.com>
Subject: [edk2-platforms PATCH 0/4] SolidRun CEx7 Evaluation Board support
Date: Sat, 7 Aug 2021 01:59:01 +0200 [thread overview]
Message-ID: <20210806235905.3327396-1-mw@semihalf.com> (raw)
Hi,
This patchset introduces support for the CEx7 Evaluation Board
Support, together with the ACPI tables and DT (edk2-non-osi patch).
Additional patch toggles the default HW description to ACPI for
all platforms based on SoCs.
Supported interaces:
* SPI flash & memory-mapped variable storage access
* uSD
* eMMC
* 7x PCIE root complex
* USB
* Networking:
* 1Gbps RGMII via PHY
* 2500Base-X via quad 1Gpbs switch
* 5Gbps via SFP cage and PHY
The patches are also available on public branches:
https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/cex7-r20210806
https://github.com/semihalf-wojtas-marcin/edk2-non-osi/commits/cex7-r20210806
I would appreciate any comments or remarks.
Best regards,
Marcin
Marcin Wojtas (3):
edk2-platforms:
Marvell: Armada7k8k/OcteonTx: Select ACPI description as a default
SolidRun/Cn913xCEx7Eval: Add ACPI support
SolidRun/Cn913xCEx7Eval: Add platform support
edk2-non-osi:
SolidRun/Cn913xCEx7Eval: Add DeviceTree
Platform/SolidRun/Cn913xCEx7Eval/Cn9130Eval.dsc.inc | 54 ++
Platform/SolidRun/Cn913xCEx7Eval/Cn9131Eval.dsc.inc | 64 +++
Platform/SolidRun/Cn913xCEx7Eval/Cn9132Eval.dsc.inc | 64 +++
Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7.dsc.inc | 68 +++
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 7 +
Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc | 57 +++
Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.inf | 30 ++
Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.inf | 38 ++
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval.inf | 61 +++
Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.h | 30 ++
Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.h | 13 +
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.h | 9 +
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Pcie.h | 114 +++++
Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.c | 294 +++++++++++
Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 89 ++++
Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.fdf.inc | 17 +
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9130EvalSsdt.asl | 383 +++++++++++++++
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9131EvalSsdt.asl | 493 +++++++++++++++++++
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9132EvalSsdt.asl | 515 ++++++++++++++++++++
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn913xCEx7Dsdt.asl | 120 +++++
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.aslc | 74 +++
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Mcfg.aslc | 87 ++++
22 files changed, 2681 insertions(+)
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9130Eval.dsc.inc
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9131Eval.dsc.inc
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9132Eval.dsc.inc
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7.dsc.inc
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.inf
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.inf
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval.inf
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.h
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.h
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.h
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Pcie.h
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.c
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c
create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.fdf.inc
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9130EvalSsdt.asl
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9131EvalSsdt.asl
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9132EvalSsdt.asl
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn913xCEx7Dsdt.asl
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.aslc
create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Mcfg.aslc
--
2.29.0
next reply other threads:[~2021-08-06 23:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-06 23:59 Marcin Wojtas [this message]
2021-08-06 23:59 ` [edk2-platforms PATCH 1/3] Marvell: Armada7k8k/OcteonTx: Select ACPI description as a default Marcin Wojtas
2021-08-06 23:59 ` [edk2-platforms PATCH 2/3] SolidRun/Cn913xCEx7Eval: Add ACPI support Marcin Wojtas
2021-08-06 23:59 ` [edk2-platforms PATCH 3/3] SolidRun/Cn913xCEx7Eval: Add platform support Marcin Wojtas
2021-08-06 23:59 ` [edk2-non-osi PATCH] SolidRun/Cn913xCEx7Eval: Add DeviceTree Marcin Wojtas
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