From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.3659.1628566581408207024 for ; Mon, 09 Aug 2021 20:36:21 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jeremy.linton@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F5AD6D; Mon, 9 Aug 2021 20:36:20 -0700 (PDT) Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2A0F63F70D; Mon, 9 Aug 2021 20:36:20 -0700 (PDT) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, Jeremy Linton Subject: [PATCH v2 0/6] RPi4: Enable ACPI PCIe conduit Date: Mon, 9 Aug 2021 22:36:12 -0500 Message-Id: <20210810033618.5139-1-jeremy.linton@arm.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable A new Arm standard DEN0115A specifies how platforms that don't have standard ECAM can use the firmware to handle config read/write operations. This is mostly implemented in TFA but UEFI needs to assure that there is a description of the root complex in the ACPI namespace. This set adds that description based on a new menu item which toggles between XHCI platform description and PCIe via a BDS menu selection on the RPi4. The CM4 is really the platform that needs this as it has a PCIe slot. On that platform PCIe is enabled by default. v1->v2: Use global shared interrupts in PCI PRT which is a pretty significant simplification. Modify bus max to use the secondary side of the root port for enforcing device limits Various other AML cleanups per Ard (drop redundant _DMA, bump UID to make it unique, etc) Break link status move into its own patch MADT->MCFG typos in various comments Commit message tweaking =09 Jeremy Linton (6): Platform/RaspberryPi: Add XHCI/PCI selection menu Platform/RaspberryPi: Break XHCI into its own SSDT Platform/RaspberryPi: Add PCIe SSDT Silicon/Broadcom/Bcm27xx: Relax PCIe device restriction Silicon/Broadcom/Bcm27xx: Move linkup check into the cfg accessor Platform/RaspberryPi: Enable NVMe boot on CM4 Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 4 + Platform/RaspberryPi/AcpiTables/Dsdt.asl | 3 - Platform/RaspberryPi/AcpiTables/Pci.asl | 209 +++++++++++++++= ++++++ Platform/RaspberryPi/AcpiTables/Xhci.asl | 35 ++-- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 56 ++++++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 + .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 + .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 17 ++ Platform/RaspberryPi/Include/ConfigVars.h | 4 + Platform/RaspberryPi/RPi3/RPi3.dsc | 6 + Platform/RaspberryPi/RPi4/RPi4.dsc | 13 ++ Platform/RaspberryPi/RPi4/RPi4.fdf | 5 + Platform/RaspberryPi/RaspberryPi.dec | 1 + .../Bcm2711PciHostBridgeLibConstructor.c | 5 - .../Library/Bcm2711PciSegmentLib/PciSegmentLib.c | 28 ++- 15 files changed, 364 insertions(+), 28 deletions(-) create mode 100644 Platform/RaspberryPi/AcpiTables/Pci.asl --=20 2.13.7