From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.groups.io with SMTP id smtpd.web10.3758.1630567102201070471 for ; Thu, 02 Sep 2021 00:18:22 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=cSN3BSB1; spf=pass (domain: redhat.com, ip: 216.205.24.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1630567100; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=QGlVC4kNPJvtBsbd20deqCAyniUrTCueKpURE9HWhxQ=; b=cSN3BSB1UreFTSelAPmPNfRcrXsfnopZS+94a3gDaXIubQQXY1e0EPYYCqGSoe/L32yjBL AVg5RAvPQ02Xz27wG4c1OzvpkJgdPIs+jHIEN9ajRbB0pL3DYhwc+wziLmQbCR3bOUViNo vnay2PwSzSsVCjiwIThs/DHrDZ1kK+c= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-439-QhiskT3ePXuYc_9AHGGFqg-1; Thu, 02 Sep 2021 03:18:17 -0400 X-MC-Unique: QhiskT3ePXuYc_9AHGGFqg-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 968401854E20; Thu, 2 Sep 2021 07:18:15 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.192.91]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 1DB9E6A05B; Thu, 2 Sep 2021 07:18:15 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id D61A018000AE; Thu, 2 Sep 2021 09:18:12 +0200 (CEST) Date: Thu, 2 Sep 2021 09:18:12 +0200 From: "Gerd Hoffmann" To: "Xu, Min M" Cc: "devel@edk2.groups.io" , Ard Biesheuvel , "Justen, Jordan L" , Brijesh Singh , Erdem Aktas , James Bottomley , "Yao, Jiewen" , Tom Lendacky Subject: Re: [edk2-devel] [PATCH V5 2/2] OvmfPkg/ResetVector: Enable Intel TDX in ResetVector of Ovmf Message-ID: <20210902071812.2qet62x7npu25rht@sirius.home.kraxel.org> References: <81c97a782bbbf83043854ad8a86d14604918d788.1630289827.git.min.m.xu@intel.com> <20210830074058.22gfqmzrha4su6fh@sirius.home.kraxel.org> <20210831053510.ian6sqpefzmrrfi7@sirius.home.kraxel.org> MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, > > Sure. And I think we should add proper 5-level paging support to the current > > ovmf implementation instead of adding hacks to the tdx code. > My understanding is that we should first add 5-level paging support in OVMF, right? Well, the page table setup should be in common code not tdx code as 5-level paging isn't something tdx-specific. I'd suggest to add this to OvmfPkg/ResetVector/Ia32/PageTables64.asm. Reserve one more page, setup the tables for 5-level paging by inserting a level 5 page directory. When using 5-level paging let cr3 point to the first page (level 5 pagedir), when using 4-level paging let cr3 point to the second page (level 4 pagedir). Can be part of this patch series, just make it a separate patch for easier review. Whenever we should enable 5-level paging even in non-tdx mode or use 5-level paging only with tdx is a separate question. We can continue to use 4-level paging in non-tdx mode for now and discuss that later. I'm not sure which implications this would have for booting older kernels, when handing over control to a OS kernel without 5-level paging support but 5-level paging enabled (non-issue for tdx as this requires a new tdx-aware guest kernel anyway ...). take care, Gerd