From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web08.5751.1631185114157006917 for ; Thu, 09 Sep 2021 03:58:34 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=Qtn52m1u; spf=pass (domain: redhat.com, ip: 170.10.133.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1631185113; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=k/0cXRETbjeOYvn+59yeDvwcB0fi9zg1L2InkbaV6qU=; b=Qtn52m1uLsz1YlDc7cx1PT4EaVvLTK4ya+s5kkzsj61wb6Q1ZHKW5e5Z1uCHIXfzwMJnqz lgOy0JEEcm+yZlzd8NMdALAGGdic+rwJ8hppuON3JO3QfOgPYUlNwSZ0jxJjbdSAgrQQKs VHM691Syj4nZSO/yd701tyUeNOQeIxc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-562-2IiaCN9rMlu8fnDMJrtn8Q-1; Thu, 09 Sep 2021 06:58:30 -0400 X-MC-Unique: 2IiaCN9rMlu8fnDMJrtn8Q-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A5B4C80196C; Thu, 9 Sep 2021 10:58:28 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.192.91]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 576FB60C04; Thu, 9 Sep 2021 10:58:25 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id CA945180038E; Thu, 9 Sep 2021 12:58:23 +0200 (CEST) Date: Thu, 9 Sep 2021 12:58:23 +0200 From: "Gerd Hoffmann" To: Leif Lindholm Cc: devel@edk2.groups.io, Jiewen Yao , =?utf-8?Q?Marc-Andr=C3=A9?= Lureau , Michael D Kinney , Andrew Fish , Jordan Justen , Julien Grall , Anthony Perard , Ard Biesheuvel , Stefan Berger Subject: Re: [PATCH v3 11/19] OvmfPkg/Microvm: PlatformPei/MemDetect tweaks Message-ID: <20210909105823.d4e5yafgpzc6atm6@sirius.home.kraxel.org> References: <20210908090119.2378189-1-kraxel@redhat.com> <20210908090119.2378189-12-kraxel@redhat.com> <20210908110646.zuvhetarmi2bvszb@leviathan> <20210908113351.ken5secnrkot4dde@sirius.home.kraxel.org> <20210908115415.457jrctnokke3n6u@leviathan> MIME-Version: 1.0 In-Reply-To: <20210908115415.457jrctnokke3n6u@leviathan> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline > > Sure. Suggestions? Add a Pcd and set it in Microvm.dsc? > > Or is there some better way? > > It's all a question of how much we want to overengineer things :) > > I'm tempted to suggest a balanced version would be adding > GCC: *_*_*_CC_FLAGS = -D PLATFORM_IS_MICROVM > to [BuildOptions] in the .dsc, and test for that. How about the approach below? take care, Gerd commit 2d48e3eba022ba92eadcbad2c55e10ed281631c2 Author: Gerd Hoffmann Date: Tue Jun 1 12:38:38 2021 +0200 OvmfPkg/Microvm: PlatformPei/MemDetect tweaks Set mHostBridgeDevId to MICROVM_PSEUDO_DEVICE_ID using a compile time switch. Skip host bridge setup on microvm. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599 Signed-off-by: Gerd Hoffmann Acked-by: Jiewen Yao diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc index 019b50de7d8f..a000c195d866 100644 --- a/OvmfPkg/Microvm/MicrovmX64.dsc +++ b/OvmfPkg/Microvm/MicrovmX64.dsc @@ -73,6 +73,9 @@ [Defines] !endif [BuildOptions] + GCC:*_*_*_CC_FLAGS = -DPLATFORM_IS_MICROVM + INTEL:*_*_*_CC_FLAGS = /D PLATFORM_IS_MICROVM + MSFT:*_*_*_CC_FLAGS = /D PLATFORM_IS_MICROVM GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG MSFT:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 2c2c4641ec8a..8125644bc91a 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -15,6 +15,7 @@ Module Name: // #include #include +#include #include #include #include @@ -135,6 +136,10 @@ QemuUc32BaseInitialization ( UINT32 LowerMemorySize; UINT32 Uc32Size; + if (mHostBridgeDevId == MICROVM_PSEUDO_DEVICE_ID) { + return; + } + if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) { // // On q35, the 32-bit area that we'll mark as UC, through variable MTRRs, diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index d3a20122a2ea..ed93d11c8ac6 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -714,7 +715,11 @@ InitializePlatform ( // // Query Host Bridge DID // +#ifdef PLATFORM_IS_MICROVM + mHostBridgeDevId = MICROVM_PSEUDO_DEVICE_ID; +#else mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID); +#endif MaxCpuCountInitialization ();