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Date: Thu, 9 Sep 2021 13:22:31 +0200
From: "Gerd Hoffmann" <kraxel@redhat.com>
To: Brijesh Singh <brijesh.singh@amd.com>
Cc: "Xu, Min M" <min.m.xu@intel.com>, "Yao, Jiewen" <jiewen.yao@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>,
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	Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Erdem Aktas <erdemaktas@google.com>,
	Michael Roth <Michael.Roth@amd.com>
Subject: Re: [PATCH v6 00/29] Add AMD Secure Nested Paging (SEV-SNP) support
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  Hi,

> I am not sure if its a good idea to pack a header like above in a 32-bit
> PCD. The caller need to unpack the 32-bit number and perform a bitshit
> etc. Additionally we also need to check for reserved bits being set to
> zero etc. I am more inclined toward something like this:
> 
> enum {

Well, various places probably just need to know whenever they should
call into the sev or the tdx library, so grouping stuff makes sense to
me.  We don't need bitfields for that though, could also be done this
way:

enum {
   NOT_ENCRYPTED = 0,
   AMD_SEV = 0x100,
   AMD_SEV_ES,
   [ ... ]
   INTEL_TDX = 0x200,
   [ ... ]
}

So if you need the exact mode you can compare values as-is, if you want
figure which vendor library should be called you'll just mask out the
least significant 8 bits.

take care,
  Gerd