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dkim=none (message not signed) header.d=none;edk2.groups.io; dmarc=none action=none header.from=os.amperecomputing.com; Received: from DM6PR01MB5849.prod.exchangelabs.com (2603:10b6:5:205::20) by DM6PR01MB4652.prod.exchangelabs.com (2603:10b6:5:63::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4523.14; Wed, 15 Sep 2021 13:57:13 +0000 Received: from DM6PR01MB5849.prod.exchangelabs.com ([fe80::8eb:704f:2ba7:9bc3]) by DM6PR01MB5849.prod.exchangelabs.com ([fe80::8eb:704f:2ba7:9bc3%4]) with mapi id 15.20.4523.014; Wed, 15 Sep 2021 13:57:12 +0000 From: "Nhi Pham" To: devel@edk2.groups.io Cc: patches@amperecomputing.com, Nhi Pham , Leif Lindholm , Ard Biesheuvel , Rebecca Cran Subject: [PATCH 1/1] ArmPkg/ProcessorSubClassDxe: Fix the format of ProcessorId Date: Wed, 15 Sep 2021 20:55:32 +0700 Message-Id: <20210915135532.3465-1-nhi@os.amperecomputing.com> X-Mailer: git-send-email 2.17.1 X-ClientProxiedBy: HK2PR0302CA0021.apcprd03.prod.outlook.com (2603:1096:202::31) To DM6PR01MB5849.prod.exchangelabs.com (2603:10b6:5:205::20) Return-Path: nhi@os.amperecomputing.com MIME-Version: 1.0 Received: from sw004.amperecomputing.com (118.69.219.201) by HK2PR0302CA0021.apcprd03.prod.outlook.com (2603:1096:202::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4523.8 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?hmnEy7IbWB/MbBzM8bCVAaljWVgzkqht6AHBrHyS+IAgpyig4q6wuSCUI14/?= =?us-ascii?Q?b/ZJ6z12ZHnwKgdJBmj9MsBQj2RZ1LcAHeMpMklNNKJnRz07pvOdo7yFX/sj?= =?us-ascii?Q?GrYjsmdwWIvnAUcs7IfMkFvgdmrvhBu+z8mpwPHGAWrivNPxov5aNZHhPxFU?= =?us-ascii?Q?W+d/MOBcn9fnsLNQzEXS3eS8hRR1jCg1nGANdWoWl9alBAXjoCKXCxfalrwE?= =?us-ascii?Q?Gvq3Py7VCfSRHQbj6bZkuYlXVma6TZTnY6sObR8bCB9/1jLqNU6gv+bwNA90?= =?us-ascii?Q?7V4Z3TguYRODelJ5vYk7epr+9gSFkrAjqMic7GKB/kGMQ8LNXOcoepGW1GYO?= =?us-ascii?Q?q4MflBF0emT0rx0dvXgrJgvSwtYVrkPWKtxTfrnq/Sk/CvU92m7ZR4vbBfu/?= =?us-ascii?Q?biW009/h+4Xn1lTE5OdUnyBnGA+qX+kyp24J5pJD638PGWlUnw2qyYPun7Jn?= =?us-ascii?Q?dG1nC3Ua2ra7ZpioU49uI7QrimGVVkF3Hc2Ngyp1jjyAWG+8CwxuaJulrPAu?= =?us-ascii?Q?pUA98XZNrh7sUgE9QeSBpr4O3SSfID/jH7wP+uPlM5MfNeekWE1TLC1bRF6a?= =?us-ascii?Q?8vWYquZijULFgQZeQ14OTNNZHd2uhQFQTh2IolDaQNPEFCPXVRUkNecljisO?= =?us-ascii?Q?ig5we1MG1MudAubefEM1/0khBjMu5JRgGNKANXYo3OjGkbVWjUByq7j91Oey?= =?us-ascii?Q?NbYWtSkhuM3PYmXtK8+xqBNUWw1dD4HUEi5LcLMyNIpotRANQlRLysrtKELY?= =?us-ascii?Q?XsHtoI9tEojoNYLXLj2zLn4beeq9xZjeyiWfxzyRfOaAt1V+7yj79jQk8DjT?= =?us-ascii?Q?FkAozLuRBRyYSoZ0DNNZriFEUa3X5fTpu8vWlV4DXvSRgDeaRQcYt/9LKpHI?= =?us-ascii?Q?BC2LjMDmPLoBG7gYJ3hSFNOCRDN0ZdYm044NcB1epoQISRs+3ZRBpKAEq+Dd?= =?us-ascii?Q?iOWVIr+mwHHyAa9YUj7FCs73ABYjsBr9WyLApcl5Uns1CqRRB4ZNJlu+kpr3?= =?us-ascii?Q?5hfttvjex3TmKX6CxQZ5BiuIhc901fmh9MQ15IHuF2oIeD4i/xtfCka8IpqY?= =?us-ascii?Q?HNWvc9FXJSNma6PVDr9bjHOsyXqqIV892iHgBgmTrbMOn6EL5NMcyC9ARcdN?= =?us-ascii?Q?Z3azB1jSSlXTxH2sQrsOqueYQMlFO1GITkgS7CLYeTYgJuXdLjpjWosVTpDV?= =?us-ascii?Q?GcBQqiX4C+wi7/yHr/RVksZDc4t/pci7xrWH4roRSIO8FuX17cLEgTfBmC6m?= =?us-ascii?Q?i5AeJ4GVeYbb7ciPWjjez8eRlTAONAa/DEp8XGfwTI6jx/TvGvcS3uSlJrgI?= =?us-ascii?Q?TR5o/ZCbqZmIcxm2KG+U5ZTn?= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 76a97306-53d1-4bcb-1330-08d97850b7b6 X-MS-Exchange-CrossTenant-AuthSource: DM6PR01MB5849.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2021 13:57:12.8463 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tfRClQgb+/xVdnZXNSR2UhKmO7DlbxD/qyFm9sPxAhhkFtcUNxUJ4F1FFIqb24lWp1dALhVJgmstW+tCcJ+MvoJEHfMyFR2V6cY5csan2Mc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR01MB4652 Content-Type: text/plain According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code and the second DWORD is the SoC revision value. But in the current implementation, they are set in reverse. This patch is to correct it. Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Rebecca Cran Signed-off-by: Nhi Pham --- ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c index 292f10bf97eb..d644cd33d249 100644 --- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c @@ -2,6 +2,7 @@ Functions for processor information common to ARM and AARCH64. Copyright (c) 2021, NUVIA Inc. All rights reserved.
+ Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -171,7 +172,7 @@ SmbiosGetProcessorId ( if (HasSmcArm64SocId ()) { SmbiosGetSmcArm64SocId (&Jep106Code, &SocRevision); - ProcessorId = ((UINT64)Jep106Code << 32) | SocRevision; + ProcessorId = ((UINT64)SocRevision << 32) | Jep106Code; } else { ProcessorId = ArmReadMidr (); } -- 2.17.1