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[82.11.186.48]) by smtp.gmail.com with ESMTPSA id a25sm12125795wmj.34.2021.09.24.05.43.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Sep 2021 05:43:46 -0700 (PDT) Date: Fri, 24 Sep 2021 13:43:44 +0100 From: "Leif Lindholm" To: Nhi Pham Cc: devel@edk2.groups.io, patches@amperecomputing.com, vunguyen@os.amperecomputing.com, Thang Nguyen , Chuong Tran , Phong Vo , Michael D Kinney , Ard Biesheuvel , Nate DeSimone Subject: Re: [PATCH v3 21/28] AmpereAltraPkg: Add DebugInfoPei module Message-ID: <20210924124344.r4eist6f3vtaqzhb@leviathan> References: <20210915155527.8176-1-nhi@os.amperecomputing.com> <20210915155527.8176-22-nhi@os.amperecomputing.com> MIME-Version: 1.0 In-Reply-To: <20210915155527.8176-22-nhi@os.amperecomputing.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Sep 15, 2021 at 22:55:20 +0700, Nhi Pham wrote: > From: Vu Nguyen > > Helps to show various system information like CPU info and Board Setting > values to UART console during boot process. > > Cc: Thang Nguyen > Cc: Chuong Tran > Cc: Phong Vo > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Ard Biesheuvel > Cc: Nate DeSimone > > Signed-off-by: Vu Nguyen Reviewed-by: Leif Lindholm > --- > Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 4 + > Platform/Ampere/JadePkg/Jade.fdf | 2 + > Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf | 40 ++++ > Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c | 210 ++++++++++++++++++++ > 4 files changed, 256 insertions(+) > > diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc > index 459d06c33c02..aadbf6dae83e 100644 > --- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc > +++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc > @@ -543,6 +543,10 @@ [Components.common] > ArmPlatformPkg/PlatformPei/PlatformPeim.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/MemoryInitPeim/MemoryInitPeim.inf > + Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf { > + > + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf > + } > Silicon/Ampere/AmpereAltraPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.inf > ArmPkg/Drivers/CpuPei/CpuPei.inf > diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf > index 96213edb2676..56a54b307f04 100644 > --- a/Platform/Ampere/JadePkg/Jade.fdf > +++ b/Platform/Ampere/JadePkg/Jade.fdf > @@ -167,6 +167,8 @@ [FV.FVMAIN_COMPACT] > # > # Print platform information before passing control into the Driver Execution Environment (DXE) phase > # > + INF Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > + > INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > new file mode 100644 > index 000000000000..1f50f811f273 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf > @@ -0,0 +1,40 @@ > +## @file > +# > +# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001B > + BASE_NAME = DebugInfo > + FILE_GUID = C0571D26-6176-11E9-8647-D663BD873D93 > + MODULE_TYPE = PEIM > + VERSION_STRING = 1.0 > + ENTRY_POINT = DebugInfoPeiEntryPoint > + > +[Sources] > + DebugInfoPei.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec > + Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec > + > +[LibraryClasses] > + AmpereCpuLib > + ArmLib > + DebugLib > + HobLib > + NVParamLib > + PeimEntryPoint > + > +[Guids] > + gPlatformHobGuid > + > +[Depex] > + TRUE > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c > new file mode 100644 > index 000000000000..ece9295864a8 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c > @@ -0,0 +1,210 @@ > +/** @file > + > + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > + > +#define GB_SCALE_FACTOR 1073741824 > +#define MB_SCALE_FACTOR 1048576 > +#define KB_SCALE_FACTOR 1024 > +#define MHZ_SCALE_FACTOR 1000000 > + > +/** > + Print any existence NVRAM. > +**/ > +STATIC VOID > +PrintNVRAM ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + NVPARAM Idx; > + UINT32 Val; > + UINT16 ACLRd = NV_PERM_ALL; > + BOOLEAN Flag; > + > + Flag = FALSE; > + for (Idx = NV_PREBOOT_PARAM_START; Idx <= NV_PREBOOT_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + DebugPrint (DEBUG_INIT, "Pre-boot Configuration Setting:\n"); > + Flag = TRUE; > + } > + DebugPrint (DEBUG_INIT, " %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > + > + Flag = FALSE; > + for (Idx = NV_MANU_PARAM_START; Idx <= NV_MANU_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + DebugPrint (DEBUG_INIT, "Manufacturer Configuration Setting:\n"); > + Flag = TRUE; > + } > + DebugPrint (DEBUG_INIT, " %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > + > + Flag = FALSE; > + for (Idx = NV_USER_PARAM_START; Idx <= NV_USER_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + DebugPrint (DEBUG_INIT, "User Configuration Setting:\n"); > + Flag = TRUE; > + } > + DebugPrint (DEBUG_INIT, " %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > + > + Flag = FALSE; > + for (Idx = NV_BOARD_PARAM_START; Idx <= NV_BOARD_PARAM_MAX; Idx += NVPARAM_SIZE) { > + Status = NVParamGet (Idx, ACLRd, &Val); > + if (!EFI_ERROR (Status)) { > + if (!Flag) { > + DebugPrint (DEBUG_INIT, "Board Configuration Setting:\n"); > + Flag = TRUE; > + } > + DebugPrint (DEBUG_INIT, " %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val); > + } > + } > +} > + > +STATIC > +CHAR8 * > +GetCCIXLinkSpeed ( > + IN UINTN Speed > + ) > +{ > + switch (Speed) { > + case 1: > + return "2.5 GT/s"; > + > + case 2: > + return "5 GT/s"; > + > + case 3: > + return "8 GT/s"; > + > + case 4: > + case 6: > + return "16 GT/s"; > + > + case 0xa: > + return "20 GT/s"; > + > + case 0xf: > + return "25 GT/s"; > + } > + > + return "Unknown"; > +} > + > +/** > + Print system info > +**/ > +STATIC VOID > +PrintSystemInfo ( > + VOID > + ) > +{ > + UINTN Idx; > + VOID *Hob; > + PLATFORM_INFO_HOB *PlatformHob; > + > + Hob = GetFirstGuidHob (&gPlatformHobGuid); > + if (Hob == NULL) { > + return; > + } > + > + PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob); > + > + DebugPrint (DEBUG_INIT, "SCP FW version : %a\n", (const CHAR8 *)PlatformHob->SmPmProVer); > + DebugPrint (DEBUG_INIT, "SCP FW build date : %a\n", (const CHAR8 *)PlatformHob->SmPmProBuild); > + > + DebugPrint (DEBUG_INIT, "Failsafe status : %d\n", PlatformHob->FailSafeStatus); > + DebugPrint (DEBUG_INIT, "Reset status : %d\n", PlatformHob->ResetStatus); > + DebugPrint (DEBUG_INIT, "CPU info\n"); > + DebugPrint (DEBUG_INIT, " CPU ID : %X\n", ArmReadMidr ()); > + DebugPrint (DEBUG_INIT, " CPU Clock : %d MHz\n", PlatformHob->CpuClk / MHZ_SCALE_FACTOR); > + DebugPrint (DEBUG_INIT, " Number of active sockets : %d\n", GetNumberOfActiveSockets ()); > + DebugPrint (DEBUG_INIT, " Number of active cores : %d\n", GetNumberOfActiveCores ()); > + if (IsSlaveSocketActive ()) { > + DebugPrint (DEBUG_INIT, > + " Inter Socket Connection 0 : Width: x%d / Speed %a\n", > + PlatformHob->Link2PWidth[0], > + GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[0]) > + ); > + DebugPrint (DEBUG_INIT, > + " Inter Socket Connection 1 : Width: x%d / Speed %a\n", > + PlatformHob->Link2PWidth[1], > + GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[1]) > + ); > + } > + for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) { > + DebugPrint (DEBUG_INIT, " Socket[%d]: Core voltage : %d\n", Idx, PlatformHob->CoreVoltage[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: SCU ProductID : %X\n", Idx, PlatformHob->ScuProductId[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: Max cores : %d\n", Idx, PlatformHob->MaxNumOfCore[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: Warranty : %d\n", Idx, PlatformHob->Warranty[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: Subnuma : %d\n", Idx, PlatformHob->SubNumaMode[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: RC disable mask : %X\n", Idx, PlatformHob->RcDisableMask[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: AVS enabled : %d\n", Idx, PlatformHob->AvsEnable[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: AVS voltage : %d\n", Idx, PlatformHob->AvsVoltageMV[Idx]); > + } > + > + DebugPrint (DEBUG_INIT, "SOC info\n"); > + DebugPrint (DEBUG_INIT, " DDR Frequency : %d MHz\n", PlatformHob->DramInfo.MaxSpeed); > + for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) { > + DebugPrint (DEBUG_INIT, " Socket[%d]: Soc voltage : %d\n", Idx, PlatformHob->SocVoltage[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: DIMM1 voltage : %d\n", Idx, PlatformHob->Dimm1Voltage[Idx]); > + DebugPrint (DEBUG_INIT, " Socket[%d]: DIMM2 voltage : %d\n", Idx, PlatformHob->Dimm2Voltage[Idx]); > + } > + > + DebugPrint (DEBUG_INIT, " PCP Clock : %d MHz\n", PlatformHob->PcpClk / MHZ_SCALE_FACTOR); > + DebugPrint (DEBUG_INIT, " SOC Clock : %d MHz\n", PlatformHob->SocClk / MHZ_SCALE_FACTOR); > + DebugPrint (DEBUG_INIT, " SYS Clock : %d MHz\n", PlatformHob->SysClk / MHZ_SCALE_FACTOR); > + DebugPrint (DEBUG_INIT, " AHB Clock : %d MHz\n", PlatformHob->AhbClk / MHZ_SCALE_FACTOR); > +} > + > +/** > + Entry point function for the PEIM > + > + @param FileHandle Handle of the file being invoked. > + @param PeiServices Describes the list of possible PEI Services. > + > + @return EFI_SUCCESS If we installed our PPI > + > +**/ > +EFI_STATUS > +EFIAPI > +DebugInfoPeiEntryPoint ( > + IN EFI_PEI_FILE_HANDLE FileHandle, > + IN CONST EFI_PEI_SERVICES **PeiServices > + ) > +{ > + PrintSystemInfo (); > + PrintNVRAM (); > + > + return EFI_SUCCESS; > +} > -- > 2.17.1 >