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[82.11.186.48]) by smtp.gmail.com with ESMTPSA id 4sm7659851wmv.42.2021.09.24.05.54.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Sep 2021 05:54:24 -0700 (PDT) Date: Fri, 24 Sep 2021 13:54:22 +0100 From: "Leif Lindholm" To: Nhi Pham Cc: devel@edk2.groups.io, patches@amperecomputing.com, vunguyen@os.amperecomputing.com, Quan Nguyen , Thang Nguyen , Chuong Tran , Phong Vo , Michael D Kinney , Ard Biesheuvel , Nate DeSimone Subject: Re: [PATCH v3 26/28] AmpereAltraPkg: Add configuration screen for RAS Message-ID: <20210924125422.hcvj7lolwj76gm3b@leviathan> References: <20210915155527.8176-1-nhi@os.amperecomputing.com> <20210915155527.8176-27-nhi@os.amperecomputing.com> MIME-Version: 1.0 In-Reply-To: <20210915155527.8176-27-nhi@os.amperecomputing.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Sep 15, 2021 at 22:55:25 +0700, Nhi Pham wrote: > From: Quan Nguyen > > This supports user to enable/disable RAS APEI components running in the > system firmware such as HEST, BERT, and EINJ. > > Cc: Thang Nguyen > Cc: Chuong Tran > Cc: Phong Vo > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Ard Biesheuvel > Cc: Nate DeSimone > > Signed-off-by: Quan Nguyen Reviewed-by: Leif Lindholm > --- > Platform/Ampere/JadePkg/Jade.dsc | 1 + > Platform/Ampere/JadePkg/Jade.fdf | 1 + > Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf | 56 ++ > Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h | 61 ++ > Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigNVDataStruct.h | 46 ++ > Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigVfr.vfr | 95 +++ > Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c | 822 ++++++++++++++++++++ > Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigStrings.uni | 38 + > 8 files changed, 1120 insertions(+) > > diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jade.dsc > index daac52e84ea2..b5ac2547c8f8 100644 > --- a/Platform/Ampere/JadePkg/Jade.dsc > +++ b/Platform/Ampere/JadePkg/Jade.dsc > @@ -200,3 +200,4 @@ [Components.common] > Silicon/Ampere/AmpereAltraPkg/Drivers/MemInfoDxe/MemInfoDxe.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf > Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.inf > + Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf > diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf > index 1564e45c30cd..e0d4b049f6bf 100644 > --- a/Platform/Ampere/JadePkg/Jade.fdf > +++ b/Platform/Ampere/JadePkg/Jade.fdf > @@ -358,5 +358,6 @@ [FV.FvMain] > INF Silicon/Ampere/AmpereAltraPkg/Drivers/MemInfoDxe/MemInfoDxe.inf > INF Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.inf > INF Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.inf > + INF Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf > > !include Platform/Ampere/AmperePlatformPkg/FvRules.fdf.inc > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf > new file mode 100644 > index 000000000000..9b03ed57944f > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.inf > @@ -0,0 +1,56 @@ > +## @file > +# > +# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = RasConfigDxe > + FILE_GUID = 5b5ee6e3-3135-45f7-ad21-46a3f36813cc > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = RasConfigEntryPoint > + > +[Sources.common] > + RasConfigNVDataStruct.h > + RasConfigDxe.c > + RasConfigDxe.h > + RasConfigVfr.vfr > + RasConfigStrings.uni > + > +[Packages] > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec > + Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec > + > +[LibraryClasses] > + AmpereCpuLib > + BaseLib > + BaseMemoryLib > + DebugLib > + DevicePathLib > + DevicePathLib > + HiiLib > + MemoryAllocationLib > + NVParamLib > + UefiBootServicesTableLib > + UefiDriverEntryPoint > + UefiLib > + UefiRuntimeServicesTableLib > + > +[Guids] > + gEfiIfrTianoGuid > + gPlatformManagerFormsetGuid > + gAcpiConfigFormSetGuid > + > +[Protocols] > + gEfiDevicePathProtocolGuid ## CONSUMES > + gEfiHiiConfigRoutingProtocolGuid ## CONSUMES > + gEfiHiiConfigAccessProtocolGuid ## PRODUCES > + > +[Depex] > + TRUE > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h > new file mode 100644 > index 000000000000..1258fbeda6a1 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.h > @@ -0,0 +1,61 @@ > +/** @file > + > + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef RAS_CONFIG_DXE_H_ > +#define RAS_CONFIG_DXE_H_ > + > +#include "RasConfigNVDataStruct.h" > + > +// > +// This is the generated IFR binary data for each formset defined in VFR. > +// > +extern UINT8 RasConfigVfrBin[]; > + > +// > +// This is the generated String package data for all .UNI files. > +// > +extern UINT8 RasConfigDxeStrings[]; > + > +#define RAS_DDR_CE_THRESHOLD_OFST OFFSET_OF (RAS_CONFIG_VARSTORE_DATA, RasDdrCeThreshold) > +#define RAS_2P_CE_THRESHOLD_OFST OFFSET_OF (RAS_CONFIG_VARSTORE_DATA, Ras2pCeThreshold) > + > +#define RAS_CONFIG_PRIVATE_SIGNATURE SIGNATURE_32 ('R', 'A', 'S', 'C') > + > +typedef struct { > + UINTN Signature; > + > + EFI_HANDLE DriverHandle; > + EFI_HII_HANDLE HiiHandle; > + RAS_CONFIG_VARSTORE_DATA Configuration; > + > + // > + // Consumed protocol > + // > + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; > + > + // > + // Produced protocol > + // > + EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess; > +} RAS_CONFIG_PRIVATE_DATA; > + > +#define RAS_CONFIG_PRIVATE_FROM_THIS(a) CR (a, RAS_CONFIG_PRIVATE_DATA, ConfigAccess, RAS_CONFIG_PRIVATE_SIGNATURE) > + > +#pragma pack(1) > + > +/// > +/// HII specific Vendor Device Path definition. > +/// > +typedef struct { > + VENDOR_DEVICE_PATH VendorDevicePath; > + EFI_DEVICE_PATH_PROTOCOL End; > +} HII_VENDOR_DEVICE_PATH; > + > +#pragma pack() > + > +#endif /* RAS_CONFIG_DXE_H_ */ > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigNVDataStruct.h b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigNVDataStruct.h > new file mode 100644 > index 000000000000..8c528f043c27 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigNVDataStruct.h > @@ -0,0 +1,46 @@ > +/** @file > + > + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef RAS_CONFIG_NV_DATA_STRUCT_H_ > +#define RAS_CONFIG_NV_DATA_STRUCT_H_ > + > +#define RAS_CONFIG_VARSTORE_ID 0x1234 > +#define RAS_CONFIG_FORM_ID 0x1235 > + > +#define RAS_VARSTORE_NAME L"RasConfigNVData" > + > +#define RAS_CONFIG_FORMSET_GUID \ > + { \ > + 0x96934cc6, 0xcb15, 0x4d8a, { 0xbe, 0x5f, 0x8e, 0x7d, 0x55, 0x0e, 0xc9, 0xc6 } \ > + } > + > +// > +// Labels definition > +// > +#define LABEL_UPDATE 0x3234 > +#define LABEL_END 0xffff > + > +#pragma pack(1) > + > +// > +// Ras Configuration NV data structure definition > +// > +typedef struct { > + UINT32 RasHardwareEinj; > + UINT32 RasPcieAerFwFirstEnabled; > + UINT32 RasBertEnabled; > + UINT32 RasSdeiEnabled; > + UINT32 RasDdrCeThreshold; > + UINT32 Ras2pCeThreshold; > + UINT32 RasCpmCeThreshold; > + UINT32 RasLinkErrThreshold; > +} RAS_CONFIG_VARSTORE_DATA; > + > +#pragma pack() > + > +#endif /* RAS_CONFIG_NV_DATA_STRUCT_H_ */ > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigVfr.vfr b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigVfr.vfr > new file mode 100644 > index 000000000000..ec38eb186c1b > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigVfr.vfr > @@ -0,0 +1,95 @@ > +/** @file > + > + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "RasConfigNVDataStruct.h" > + > +formset > + guid = RAS_CONFIG_FORMSET_GUID, > + title = STRING_TOKEN(STR_RAS_FORM), > + help = STRING_TOKEN(STR_RAS_FORM_HELP), > + classguid = gPlatformManagerFormsetGuid, > + > + // > + // Define a variable Storage > + // > + varstore RAS_CONFIG_VARSTORE_DATA, > + varid = RAS_CONFIG_VARSTORE_ID, > + name = RasConfigNVData, > + guid = RAS_CONFIG_FORMSET_GUID; > + > + form formid = RAS_CONFIG_FORM_ID, > + title = STRING_TOKEN(STR_RAS_FORM); > + > + subtitle text = STRING_TOKEN(STR_RAS_FORM); > + > + oneof varid = RasConfigNVData.RasHardwareEinj, > + prompt = STRING_TOKEN(STR_RAS_HARDWARE_EINJ_PROMPT), > + help = STRING_TOKEN(STR_RAS_HARDWARE_EINJ_HELP), > + flags = NUMERIC_SIZE_4 | RESET_REQUIRED, > + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = DEFAULT; > + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = 0; > + > + endoneof; > + > + oneof varid = RasConfigNVData.RasPcieAerFwFirstEnabled, > + prompt = STRING_TOKEN(STR_RAS_PCIE_AER_FW_FIRST_PROMPT), > + help = STRING_TOKEN(STR_RAS_PCIE_AER_FW_FIRST_HELP), > + flags = NUMERIC_SIZE_4 | RESET_REQUIRED, > + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = 0; > + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = DEFAULT; > + > + endoneof; > + > + oneof varid = RasConfigNVData.RasBertEnabled, > + prompt = STRING_TOKEN(STR_RAS_BERT_ENABLED_PROMPT), > + help = STRING_TOKEN(STR_RAS_BERT_ENABLED_HELP), > + flags = NUMERIC_SIZE_4 | RESET_REQUIRED, > + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = DEFAULT; > + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = 0; > + > + endoneof; > + > + oneof varid = RasConfigNVData.RasSdeiEnabled, > + prompt = STRING_TOKEN(STR_RAS_SDEI_ENABLED_PROMPT), > + help = STRING_TOKEN(STR_RAS_SDEI_ENABLED_HELP), > + flags = NUMERIC_SIZE_4 | RESET_REQUIRED, > + option text = STRING_TOKEN(STR_RAS_COMMON_ENABLE), value = 1, flags = 0; > + option text = STRING_TOKEN(STR_RAS_COMMON_DISABLE), value = 0, flags = DEFAULT; > + > + endoneof; > + > + label LABEL_UPDATE; > + // > + // This is where we will dynamically add other Action type op-code > + // > + label LABEL_END; > + > + numeric varid = RasConfigNVData.RasCpmCeThreshold, > + prompt = STRING_TOKEN(STR_RAS_CPM_CE_THRESHOLD_PROMPT), > + help = STRING_TOKEN(STR_RAS_CPM_CE_THRESHOLD_HELP), > + flags = NUMERIC_SIZE_4 | RESET_REQUIRED, > + minimum = 1, > + maximum = 8192, > + default = 1, > + > + endnumeric; > + > + numeric varid = RasConfigNVData.RasLinkErrThreshold, > + prompt = STRING_TOKEN(STR_RAS_LINK_ERR_THRESHOLD_PROMPT), > + help = STRING_TOKEN(STR_RAS_LINK_ERR_THRESHOLD_HELP), > + flags = NUMERIC_SIZE_4 | RESET_REQUIRED, > + minimum = 1, > + maximum = 8192, > + default = 1, > + > + endnumeric; > + > + > + endform; > + > +endformset; > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c > new file mode 100644 > index 000000000000..41554775a0b4 > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c > @@ -0,0 +1,822 @@ > +/** @file > + > + Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "RasConfigDxe.h" > + > +CHAR16 RasConfigVarstoreDataName[] = L"RasConfigNVData"; > + > +EFI_HANDLE mDriverHandle = NULL; > +RAS_CONFIG_PRIVATE_DATA *mPrivateData = NULL; > + > +EFI_GUID mRasConfigFormSetGuid = RAS_CONFIG_FORMSET_GUID; > + > +// > +// Default RAS Settings > +// > +#define RAS_DEFAULT_HARDWARE_EINJ_SUPPORT 0 > +#define RAS_DEFAULT_PCIE_AER_FW_FIRST 0 > +#define RAS_DEFAULT_BERT_SUPPORT 1 > +#define RAS_DEFAULT_SDEI_SUPPORT 0 > +#define RAS_DEFAULT_DDR_CE_THRESHOLD 1 > +#define RAS_DEFAULT_2P_CE_THRESHOLD 1 > +#define RAS_DEFAULT_PROCESSOR_CE_THRESHOLD 1 > +#define RAS_DEFAULT_DDR_LINK_ERROR_THRESHOLD 1 > + > + > +HII_VENDOR_DEVICE_PATH mRasConfigHiiVendorDevicePath = { > + { > + { > + HARDWARE_DEVICE_PATH, > + HW_VENDOR_DP, > + { > + (UINT8)(sizeof (VENDOR_DEVICE_PATH)), > + (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8) > + } > + }, > + RAS_CONFIG_FORMSET_GUID > + }, > + { > + END_DEVICE_PATH_TYPE, > + END_ENTIRE_DEVICE_PATH_SUBTYPE, > + { > + (UINT8)(END_DEVICE_PATH_LENGTH), > + (UINT8)((END_DEVICE_PATH_LENGTH) >> 8) > + } > + } > +}; > + > +BOOLEAN > +IsDdrCeWindowEnabled ( > + VOID > + ) > +{ > + UINT32 DdrCeWindow; > + EFI_STATUS Status; > + > + Status = NVParamGet ( > + NV_SI_RO_BOARD_RAS_DDR_CE_WINDOW, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &DdrCeWindow > + ); > + if (EFI_ERROR (Status)) { > + return FALSE; > + } > + > + return (DdrCeWindow != 0) ? TRUE : FALSE; > +} > + > +EFI_STATUS > +RasConfigNvParamGet ( > + OUT RAS_CONFIG_VARSTORE_DATA *Configuration > + ) > +{ > + EFI_STATUS Status; > + UINT32 Value; > + > + Status = NVParamGet ( > + NV_SI_HARDWARE_EINJ, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_HARDWARE_EINJ_SUPPORT; > + Status = NVParamSet ( > + NV_SI_HARDWARE_EINJ, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasHardwareEinj = Value; > + > + Status = NVParamGet ( > + NV_SI_RAS_PCIE_AER_FW_FIRST, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_PCIE_AER_FW_FIRST; > + Status = NVParamSet ( > + NV_SI_RAS_PCIE_AER_FW_FIRST, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasPcieAerFwFirstEnabled = Value; > + > + Status = NVParamGet ( > + NV_SI_RAS_BERT_ENABLED, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_BERT_SUPPORT; > + Status = NVParamSet ( > + NV_SI_RAS_BERT_ENABLED, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasBertEnabled = Value; > + > + Status = NVParamGet ( > + NV_SI_RAS_SDEI_ENABLED, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_SDEI_SUPPORT; > + Status = NVParamSet ( > + NV_SI_RAS_SDEI_ENABLED, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasSdeiEnabled = Value; > + > + Status = NVParamGet ( > + NV_SI_DDR_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_DDR_CE_THRESHOLD; > + Status = NVParamSet ( > + NV_SI_DDR_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasDdrCeThreshold = Value; > + > + Status = NVParamGet ( > + NV_SI_2P_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_2P_CE_THRESHOLD; > + Status = NVParamSet ( > + NV_SI_2P_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->Ras2pCeThreshold = Value; > + > + Status = NVParamGet ( > + NV_SI_CPM_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_PROCESSOR_CE_THRESHOLD; > + Status = NVParamSet ( > + NV_SI_CPM_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasCpmCeThreshold = Value; > + > + Status = NVParamGet ( > + NV_SI_LINK_ERR_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + &Value > + ); > + if (EFI_ERROR (Status)) { > + Value = RAS_DEFAULT_DDR_LINK_ERROR_THRESHOLD; > + Status = NVParamSet ( > + NV_SI_LINK_ERR_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Value > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); > + ASSERT_EFI_ERROR (Status); > + Value = 0; > + } > + } > + Configuration->RasLinkErrThreshold = Value; > + > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +RasConfigNvParamSet ( > + IN RAS_CONFIG_VARSTORE_DATA *Configuration > + ) > +{ > + EFI_STATUS Status; > + > + Status = NVParamSet ( > + NV_SI_HARDWARE_EINJ, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasHardwareEinj > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_RAS_PCIE_AER_FW_FIRST, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasPcieAerFwFirstEnabled > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_RAS_BERT_ENABLED, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasBertEnabled > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_RAS_SDEI_ENABLED, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasSdeiEnabled > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_DDR_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasDdrCeThreshold > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_2P_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->Ras2pCeThreshold > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_CPM_CE_RAS_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasCpmCeThreshold > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = NVParamSet ( > + NV_SI_LINK_ERR_THRESHOLD, > + NV_PERM_ATF | NV_PERM_BIOS | NV_PERM_MANU | NV_PERM_BMC, > + NV_PERM_BIOS | NV_PERM_MANU, > + Configuration->RasLinkErrThreshold > + ); > + ASSERT_EFI_ERROR (Status); > + > + return EFI_SUCCESS; > +} > + > +/** > + This function allows a caller to extract the current configuration for one > + or more named elements from the target driver. > + > + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL. > + @param Request A null-terminated Unicode string in > + format. > + @param Progress On return, points to a character in the Request > + string. Points to the string's null terminator if > + request was successful. Points to the most recent > + '&' before the first failing name/value pair (or > + the beginning of the string if the failure is in > + the first name/value pair) if the request was not > + successful. > + @param Results A null-terminated Unicode string in > + format which has all values filled > + in for the names in the Request string. String to > + be allocated by the called function. > + > + @retval EFI_SUCCESS The Results is filled with the requested values. > + @retval EFI_OUT_OF_RESOURCES Not enough memory to store the results. > + @retval EFI_INVALID_PARAMETER Request is illegal syntax, or unknown name. > + @retval EFI_NOT_FOUND Routing data doesn't match any storage in this > + driver. > + > +**/ > +EFI_STATUS > +EFIAPI > +RasConfigExtractConfig ( > + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, > + IN CONST EFI_STRING Request, > + OUT EFI_STRING *Progress, > + OUT EFI_STRING *Results > + ) > +{ > + EFI_STATUS Status; > + UINTN BufferSize; > + RAS_CONFIG_PRIVATE_DATA *PrivateData; > + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; > + EFI_STRING ConfigRequest; > + EFI_STRING ConfigRequestHdr; > + UINTN Size; > + BOOLEAN AllocatedRequest; > + > + if (Progress == NULL || Results == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + // > + // Initialize the local variables. > + // > + ConfigRequestHdr = NULL; > + ConfigRequest = NULL; > + Size = 0; > + *Progress = Request; > + AllocatedRequest = FALSE; > + > + if ((Request != NULL) && !HiiIsConfigHdrMatch (Request, &mRasConfigFormSetGuid, RasConfigVarstoreDataName)) { > + return EFI_NOT_FOUND; > + } > + > + PrivateData = RAS_CONFIG_PRIVATE_FROM_THIS (This); > + HiiConfigRouting = PrivateData->HiiConfigRouting; > + > + // > + // Get current setting from NVParam. > + // > + Status = RasConfigNvParamGet (&PrivateData->Configuration); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + // > + // Convert buffer data to by helper function BlockToConfig() > + // > + BufferSize = sizeof (RAS_CONFIG_VARSTORE_DATA); > + ConfigRequest = Request; > + if ((Request == NULL) || (StrStr (Request, L"OFFSET") == NULL)) { > + // > + // Request has no request element, construct full request string. > + // Allocate and fill a buffer large enough to hold the template > + // followed by "&OFFSET=0&WIDTH=WWWWWWWWWWWWWWWW" followed by a Null-terminator > + // > + ConfigRequestHdr = HiiConstructConfigHdr (&mRasConfigFormSetGuid, RasConfigVarstoreDataName, PrivateData->DriverHandle); > + Size = (StrLen (ConfigRequestHdr) + 32 + 1) * sizeof (CHAR16); > + ConfigRequest = AllocateZeroPool (Size); > + ASSERT (ConfigRequest != NULL); > + if (ConfigRequest == NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + AllocatedRequest = TRUE; > + UnicodeSPrint (ConfigRequest, Size, L"%s&OFFSET=0&WIDTH=%016LX", ConfigRequestHdr, (UINT64)BufferSize); > + FreePool (ConfigRequestHdr); > + } > + > + // > + // Convert buffer data to by helper function BlockToConfig() > + // > + Status = HiiConfigRouting->BlockToConfig ( > + HiiConfigRouting, > + ConfigRequest, > + (UINT8 *)&PrivateData->Configuration, > + BufferSize, > + Results, > + Progress > + ); > + > + // > + // Free the allocated config request string. > + // > + if (AllocatedRequest) { > + FreePool (ConfigRequest); > + ConfigRequest = NULL; > + } > + > + // > + // Set Progress string to the original request string. > + // > + if (Request == NULL) { > + *Progress = NULL; > + } else if (StrStr (Request, L"OFFSET") == NULL) { > + *Progress = Request + StrLen (Request); > + } > + > + return Status; > +} > + > +/** > + This function processes the results of changes in configuration. > + > + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL. > + @param Configuration A null-terminated Unicode string in > + format. > + @param Progress A pointer to a string filled in with the offset of > + the most recent '&' before the first failing > + name/value pair (or the beginning of the string if > + the failure is in the first name/value pair) or > + the terminating NULL if all was successful. > + > + @retval EFI_SUCCESS The Results is processed successfully. > + @retval EFI_INVALID_PARAMETER Configuration is NULL. > + @retval EFI_NOT_FOUND Routing data doesn't match any storage in this > + driver. > + > +**/ > +EFI_STATUS > +EFIAPI > +RasConfigRouteConfig ( > + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, > + IN CONST EFI_STRING Configuration, > + OUT EFI_STRING *Progress > + ) > +{ > + EFI_STATUS Status; > + UINTN BufferSize; > + RAS_CONFIG_PRIVATE_DATA *PrivateData; > + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; > + > + if (Configuration == NULL || Progress == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + PrivateData = RAS_CONFIG_PRIVATE_FROM_THIS (This); > + HiiConfigRouting = PrivateData->HiiConfigRouting; > + *Progress = Configuration; > + > + // > + // Check routing data in . > + // Note: if only one Storage is used, then this checking could be skipped. > + // > + if (!HiiIsConfigHdrMatch (Configuration, &mRasConfigFormSetGuid, RasConfigVarstoreDataName)) { > + return EFI_NOT_FOUND; > + } > + > + // > + // Get configuration data from NVParam > + // > + Status = RasConfigNvParamGet (&PrivateData->Configuration); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + // > + // Convert to buffer data by helper function ConfigToBlock() > + // > + BufferSize = sizeof (RAS_CONFIG_VARSTORE_DATA); > + Status = HiiConfigRouting->ConfigToBlock ( > + HiiConfigRouting, > + Configuration, > + (UINT8 *)&PrivateData->Configuration, > + &BufferSize, > + Progress > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + // > + // Store configuration data back to NVParam > + // > + Status = RasConfigNvParamSet (&PrivateData->Configuration); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + return Status; > +} > + > +/** > + This function processes the results of changes in configuration. > + > + @param This Points to the EFI_HII_CONFIG_ACCESS_PROTOCOL. > + @param Action Specifies the type of action taken by the browser. > + @param QuestionId A unique value which is sent to the original > + exporting driver so that it can identify the type > + of data to expect. > + @param Type The type of value for the question. > + @param Value A pointer to the data being sent to the original > + exporting driver. > + @param ActionRequest On return, points to the action requested by the > + callback function. > + > + @retval EFI_SUCCESS The callback successfully handled the action. > + @retval EFI_INVALID_PARAMETER The setup browser call this function with invalid parameters. > + > +**/ > +EFI_STATUS > +EFIAPI > +RasConfigCallback ( > + IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This, > + IN EFI_BROWSER_ACTION Action, > + IN EFI_QUESTION_ID QuestionId, > + IN UINT8 Type, > + IN EFI_IFR_TYPE_VALUE *Value, > + OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest > + ) > +{ > + if (Action != EFI_BROWSER_ACTION_CHANGING) { > + // > + // Do nothing for other UEFI Action. Only do call back when data is changed. > + // > + return EFI_UNSUPPORTED; > + } > + if (((Value == NULL) > + && (Action != EFI_BROWSER_ACTION_FORM_OPEN) > + && (Action != EFI_BROWSER_ACTION_FORM_CLOSE)) > + || (ActionRequest == NULL)) > + { > + return EFI_INVALID_PARAMETER; > + } > + > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +UpdateRasConfigScreen ( > + IN RAS_CONFIG_PRIVATE_DATA *PrivateData > + ) > +{ > + EFI_STATUS Status; > + VOID *StartOpCodeHandle; > + EFI_IFR_GUID_LABEL *StartLabel; > + VOID *EndOpCodeHandle; > + EFI_IFR_GUID_LABEL *EndLabel; > + > + // > + // Initialize the container for dynamic opcodes > + // > + StartOpCodeHandle = HiiAllocateOpCodeHandle (); > + ASSERT (StartOpCodeHandle != NULL); > + > + EndOpCodeHandle = HiiAllocateOpCodeHandle (); > + ASSERT (EndOpCodeHandle != NULL); > + > + // > + // Create Hii Extend Label OpCode as the start opcode > + // > + StartLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode ( > + StartOpCodeHandle, > + &gEfiIfrTianoGuid, > + NULL, > + sizeof (EFI_IFR_GUID_LABEL) > + ); > + if (StartLabel == NULL) { > + Status = EFI_OUT_OF_RESOURCES; > + goto FreeOpCodeBuffer; > + } > + StartLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL; > + StartLabel->Number = LABEL_UPDATE; > + > + // > + // Create Hii Extend Label OpCode as the end opcode > + // > + EndLabel = (EFI_IFR_GUID_LABEL *)HiiCreateGuidOpCode ( > + EndOpCodeHandle, > + &gEfiIfrTianoGuid, > + NULL, > + sizeof (EFI_IFR_GUID_LABEL) > + ); > + if (EndLabel == NULL) { > + Status = EFI_OUT_OF_RESOURCES; > + goto FreeOpCodeBuffer; > + } > + EndLabel->ExtendOpCode = EFI_IFR_EXTEND_OP_LABEL; > + EndLabel->Number = LABEL_END; > + > + // > + // Create the numeric for DDR CE threshold > + // > + if (!IsDdrCeWindowEnabled ()) { > + HiiCreateNumericOpCode ( > + StartOpCodeHandle, // Container for dynamic created opcodes > + 0x8004, // Question ID > + RAS_CONFIG_VARSTORE_ID, // VarStore ID > + (UINT16)RAS_DDR_CE_THRESHOLD_OFST, // Offset in Buffer Storage > + STRING_TOKEN (STR_RAS_DDR_CE_THRESHOLD_PROMPT), // Question prompt text > + STRING_TOKEN (STR_RAS_DDR_CE_THRESHOLD_HELP), > + EFI_IFR_FLAG_CALLBACK | EFI_IFR_FLAG_RESET_REQUIRED, > + EFI_IFR_NUMERIC_SIZE_4, > + 1, > + 8192, > + 1, > + NULL > + ); > + } > + > + // > + // Create the numeric for 2P CE threshold > + // > + if (IsSlaveSocketActive ()) { > + HiiCreateNumericOpCode ( > + StartOpCodeHandle, // Container for dynamic created opcodes > + 0x8005, // Question ID > + RAS_CONFIG_VARSTORE_ID, // VarStore ID > + (UINT16)RAS_2P_CE_THRESHOLD_OFST, // Offset in Buffer Storage > + STRING_TOKEN (STR_RAS_2P_CE_THRESHOLD_PROMPT), // Question prompt text > + STRING_TOKEN (STR_RAS_2P_CE_THRESHOLD_HELP), > + EFI_IFR_FLAG_CALLBACK | EFI_IFR_FLAG_RESET_REQUIRED, > + EFI_IFR_NUMERIC_SIZE_4, > + 1, > + 8192, > + 1, > + NULL > + ); > + } > + > + Status = HiiUpdateForm ( > + PrivateData->HiiHandle, // HII handle > + &mRasConfigFormSetGuid, // Formset GUID > + RAS_CONFIG_FORM_ID, // Form ID > + StartOpCodeHandle, // Label for where to insert opcodes > + EndOpCodeHandle // Insert data > + ); > + > +FreeOpCodeBuffer: > + HiiFreeOpCodeHandle (StartOpCodeHandle); > + HiiFreeOpCodeHandle (EndOpCodeHandle); > + > + return Status; > +} > + > +EFI_STATUS > +EFIAPI > +RasConfigUnload ( > + VOID > + ) > +{ > + ASSERT (mPrivateData != NULL); > + > + if (mDriverHandle != NULL) { > + gBS->UninstallMultipleProtocolInterfaces ( > + mDriverHandle, > + &gEfiDevicePathProtocolGuid, > + &mRasConfigHiiVendorDevicePath, > + &gEfiHiiConfigAccessProtocolGuid, > + &mPrivateData->ConfigAccess, > + NULL > + ); > + mDriverHandle = NULL; > + } > + > + if (mPrivateData->HiiHandle != NULL) { > + HiiRemovePackages (mPrivateData->HiiHandle); > + } > + > + FreePool (mPrivateData); > + mPrivateData = NULL; > + > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +EFIAPI > +RasConfigEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + EFI_HII_HANDLE HiiHandle; > + EFI_HII_CONFIG_ROUTING_PROTOCOL *HiiConfigRouting; > + > + // > + // Initialize driver private data > + // > + mPrivateData = AllocateZeroPool (sizeof (RAS_CONFIG_PRIVATE_DATA)); > + if (mPrivateData == NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + > + mPrivateData->Signature = RAS_CONFIG_PRIVATE_SIGNATURE; > + > + mPrivateData->ConfigAccess.ExtractConfig = RasConfigExtractConfig; > + mPrivateData->ConfigAccess.RouteConfig = RasConfigRouteConfig; > + mPrivateData->ConfigAccess.Callback = RasConfigCallback; > + > + // > + // Locate ConfigRouting protocol > + // > + Status = gBS->LocateProtocol (&gEfiHiiConfigRoutingProtocolGuid, NULL, (VOID **)&HiiConfigRouting); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + mPrivateData->HiiConfigRouting = HiiConfigRouting; > + > + Status = gBS->InstallMultipleProtocolInterfaces ( > + &mDriverHandle, > + &gEfiDevicePathProtocolGuid, > + &mRasConfigHiiVendorDevicePath, > + &gEfiHiiConfigAccessProtocolGuid, > + &mPrivateData->ConfigAccess, > + NULL > + ); > + ASSERT_EFI_ERROR (Status); > + > + mPrivateData->DriverHandle = mDriverHandle; > + > + // > + // Publish our HII data > + // > + HiiHandle = HiiAddPackages ( > + &mRasConfigFormSetGuid, > + mDriverHandle, > + RasConfigDxeStrings, > + RasConfigVfrBin, > + NULL > + ); > + if (HiiHandle == NULL) { > + gBS->UninstallMultipleProtocolInterfaces ( > + mDriverHandle, > + &gEfiDevicePathProtocolGuid, > + &mRasConfigHiiVendorDevicePath, > + &gEfiHiiConfigAccessProtocolGuid, > + &mPrivateData->ConfigAccess, > + NULL > + ); > + return EFI_OUT_OF_RESOURCES; > + } > + > + mPrivateData->HiiHandle = HiiHandle; > + > + Status = UpdateRasConfigScreen (mPrivateData); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a %d Fail to update Memory Configuration screen \n", > + __FUNCTION__, > + __LINE__ > + )); > + RasConfigUnload (); > + ASSERT_EFI_ERROR (Status); > + return Status; > + } > + > + return EFI_SUCCESS; > +} > diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigStrings.uni b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigStrings.uni > new file mode 100644 > index 000000000000..c502093a2bbf > --- /dev/null > +++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigStrings.uni > @@ -0,0 +1,38 @@ > +// > +// Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.
> +// > +// SPDX-License-Identifier: BSD-2-Clause-Patent > +// > + > +#langdef en-US "English" > + > +#string STR_RAS_FORM #language en-US "RAS Configuration" > +#string STR_RAS_FORM_HELP #language en-US "RAS Configuration" > + > +#string STR_RAS_FORM_SEPERATE_LINE #language en-US "" > +#string STR_RAS_COMMON_ENABLE #language en-US "Enabled" > +#string STR_RAS_COMMON_DISABLE #language en-US "Disabled" > + > +#string STR_RAS_HARDWARE_EINJ_PROMPT #language en-US "Hardware EINJ" > +#string STR_RAS_HARDWARE_EINJ_HELP #language en-US "Enable hardware EINJ support, if disabled EINJ is software simulated" > + > +#string STR_RAS_PCIE_AER_FW_FIRST_PROMPT #language en-US "PCIe AER Firmware First" > +#string STR_RAS_PCIE_AER_FW_FIRST_HELP #language en-US "Enable firmware to detect PCIe AER, if disabled OS detects AER" > + > +#string STR_RAS_BERT_ENABLED_PROMPT #language en-US "Enable BERT" > +#string STR_RAS_BERT_ENABLED_HELP #language en-US "Enable Boot Error Record Table, if disabled BERT will not be populated" > + > +#string STR_RAS_SDEI_ENABLED_PROMPT #language en-US "Enable SDEI" > +#string STR_RAS_SDEI_ENABLED_HELP #language en-US "Enable Software Delegated Exception Interface for NMI support" > + > +#string STR_RAS_DDR_CE_THRESHOLD_PROMPT #language en-US "DDR CE Threshold" > +#string STR_RAS_DDR_CE_THRESHOLD_HELP #language en-US "Number of DDR CEs to occur before using SCI notification to OS rather than polled notification" > + > +#string STR_RAS_2P_CE_THRESHOLD_PROMPT #language en-US "2P CE Threshold" > +#string STR_RAS_2P_CE_THRESHOLD_HELP #language en-US "Number of 2P CEs to occur before using SCI notification to OS rather than polled notification" > + > +#string STR_RAS_CPM_CE_THRESHOLD_PROMPT #language en-US "Processor CE Threshold" > +#string STR_RAS_CPM_CE_THRESHOLD_HELP #language en-US "Number of processor CEs to occur before using SCI notification to OS rather than polled notification" > + > +#string STR_RAS_LINK_ERR_THRESHOLD_PROMPT #language en-US "DDR Link Error Threshold" > +#string STR_RAS_LINK_ERR_THRESHOLD_HELP #language en-US "Number of DDR link errors before considering it fatal severity" > -- > 2.17.1 >