From: Sunil V L <sunilvl@ventanamicro.com>
To: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: devel@edk2.groups.io, Abner Chang <abner.chang@hpe.com>,
Leif Lindholm <leif@nuviainc.com>
Subject: Re: [PATCH v1 4/5] U540: BuildCpuHob with 48 to indicate size memory space
Date: Mon, 4 Oct 2021 16:32:24 +0530 [thread overview]
Message-ID: <20211004110224.GD83401@sunil-ThinkPad-T490> (raw)
In-Reply-To: <20211003172359.1622768-5-daniel.schaefer@hpe.com>
On Mon, Oct 04, 2021 at 01:23:58AM +0800, Daniel Schaefer wrote:
> Otherwise it will crash on QEMU 6.0 with:
>
> > Loading driver at 0x000BF814000 EntryPoint=0x000BF81428A PciHostBridgeDxe.efi
> > InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF BF351F98
> > ProtectUefiImageCommon - 0xBF365BC0
> > - 0x00000000BF814000 - 0x00000000000124C0
> > PROGRESS CODE: V03040002 I0
> > ProcessPciHost: Config[0x30000000+0x10000000) Bus[0x0..0xFF] Io[0x0+0x10000)@0x3000000 Mem32[0x40000000+0x40000000)@0x0 Mem64[0x400000000+0x400000000)@0x0
> > CpuSetMemoryAttributes: Set memory attributes not supported yet
> > CpuSetMemoryAttributes: Set memory attributes not supported yet
> > RootBridge: PciRoot(0x0)
> > Support/Attr: 70001 / 70001
> > DmaAbove4G: Yes
> > NoExtConfSpace: No
> > AllocAttr: 3 (CombineMemPMem Mem64Decode)
> > Bus: 0 - FF Translation=0
> > Io: 0 - FFFF Translation=0
> > Mem: 40000000 - 7FFFFFFF Translation=0
> > MemAbove4G: 400000000 - 7FFFFFFFF Translation=0
> > PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
> > PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
> > CpuSetMemoryAttributes: Set memory attributes not supported yet
> >
> > ASSERT_EFI_ERROR (Status = Not Found)
> > ASSERT [PciHostBridgeDxe] /edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c(332): !EFI_ERROR (CheckStatus)
> > QEMU: Terminated
>
> Change works on QEMU 5.2 and 6.0.
>
> Cc: Abner Chang <abner.chang@hpe.com>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
>
> Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
> ---
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c
> index 6641e10f2e..9a2cb9413c 100644
> --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c
> +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c
> @@ -1,7 +1,7 @@
> /**@file
> Platform PEI driver
>
> - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> + Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
>
> @@ -199,7 +199,7 @@ MiscInitialization (
> // of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during
> // S3 resume as well, so we build it unconditionally.)
> //
> - BuildCpuHob (32, 32);
> + BuildCpuHob (48, 32);
This is fine for now. But I think this should be found dynamically
instead of hard coding. Do you know if there is any way in RISC-V to
find out the physical address bits implemented? I am thinking some thing
similar to ArmGetPhysicalAddressBits().
Otherwise, looks fine to me.
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Thanks
Sunil
> }
>
> /**
> --
> 2.33.0
>
next prev parent reply other threads:[~2021-10-04 11:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-03 17:23 [PATCH v1 0/5] Improvements for booting to Linux on RISC-V Daniel Schaefer
2021-10-03 17:23 ` [PATCH v1 1/5] U540, U500: Add filesystem drivers Daniel Schaefer
2021-10-04 10:19 ` Sunil V L
2021-10-03 17:23 ` [PATCH v1 2/5] RISC-V/CpuDxe: Ignore set memory attributes failure Daniel Schaefer
2021-10-04 10:39 ` Sunil V L
2021-10-03 17:23 ` [PATCH v1 3/5] U540, U500: Add initrd command to boot Linux Daniel Schaefer
2021-10-04 10:45 ` Sunil V L
2021-10-04 11:07 ` Daniel Schaefer
2021-10-03 17:23 ` [PATCH v1 4/5] U540: BuildCpuHob with 48 to indicate size memory space Daniel Schaefer
2021-10-04 11:02 ` Sunil V L [this message]
2021-10-04 11:26 ` Abner Chang
2021-10-03 17:23 ` [PATCH v1 5/5] Signal EndOfDxe in boot manager Daniel Schaefer
2021-10-04 11:07 ` Sunil V L
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211004110224.GD83401@sunil-ThinkPad-T490 \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox