From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f47.google.com (mail-pj1-f47.google.com [209.85.216.47]) by mx.groups.io with SMTP id smtpd.web11.7734.1633345350400037711 for ; Mon, 04 Oct 2021 04:02:30 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=mnv6zzOD; spf=pass (domain: ventanamicro.com, ip: 209.85.216.47, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pj1-f47.google.com with SMTP id pf6-20020a17090b1d8600b0019fa884ab85so3234262pjb.5 for ; Mon, 04 Oct 2021 04:02:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=2RYHfCzvuARkwM4+SnRcCnk3fZeG21pgFx+EevnwRkU=; b=mnv6zzOD8MLLGIuUu4A6xcZyicofxE54ScAq1/4TsrpiIfX7p0i1K4pD5uV56eZBs8 OGoHdHJwPArbtTvEMqx8Tl0ZIQiBnEB78B3iI+AJbnFCdbNqOxbxIJngePSNxb9YSvGd ihHIlwLWVUeLLZR4oJICrxZtY++78bv6hWax9qaXtBF6nySxsG0QXJ0glxDsX4Q6WIDW ZqQ8fSyW8uUix+AF679eBSxWWx9L3ty+oxd2nNuOYObgtKK8d0heinnMW7b8yaI9yB8b mi+N+ntJWg+ODW2OylYBiqPAj9bJP9BV8Az8dpymu7rrnQtlsGYIqeOm9m37cFwrNxf/ c/FA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=2RYHfCzvuARkwM4+SnRcCnk3fZeG21pgFx+EevnwRkU=; b=0gLRiRS8fhTroSna5Ym/wbH50OKAIx2mu4l9o/oXCAqTunXKtzQzY7w3xtvmh4R864 gOh+RMnfJdMfm1vJpF63yTL3rgT6GOnn8qqXW4QhGqyT0nJtYr8Fv6IQivZyetRMG7cG Pi8wffsOlMS16CSi8K2YK/OmfFvYRfQNgX370qH5MKOEYSExYHCeWPWCc3YZO6UHzXmD psQikVqKVXxT57Q/JdtkXblMuhcsCiuGzfBE6hZEdx59y1dKthAshq8sVRZWiRUTajSI mg7vrSV8b26hJ1vMd6C4ycn2qt2Li1pJCDHFbAKuRAsetJUc9MXEptkwzgkNfPHBK0qM CN6g== X-Gm-Message-State: AOAM532FjABEwHZ+Vc1FAyybncYD+hjADr4wnwbLUUElLHMa+tOeWIAe j3PWtUiEGWRPPViAFOwUWE9DHQ== X-Google-Smtp-Source: ABdhPJxcAJydeKX7w6z2FIo1KzLdwfIHqVRz+iUqcX7/qOKcLE/doxhsH/uoKffY68FxUVKYVqnfIA== X-Received: by 2002:a17:90b:3693:: with SMTP id mj19mr12736457pjb.85.1633345349793; Mon, 04 Oct 2021 04:02:29 -0700 (PDT) Return-Path: Received: from sunil-ThinkPad-T490 ([49.206.3.187]) by smtp.gmail.com with ESMTPSA id l11sm14677574pjg.22.2021.10.04.04.02.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 04:02:29 -0700 (PDT) Date: Mon, 4 Oct 2021 16:32:24 +0530 From: Sunil V L To: Daniel Schaefer Cc: devel@edk2.groups.io, Abner Chang , Leif Lindholm Subject: Re: [PATCH v1 4/5] U540: BuildCpuHob with 48 to indicate size memory space Message-ID: <20211004110224.GD83401@sunil-ThinkPad-T490> References: <20211003172359.1622768-1-daniel.schaefer@hpe.com> <20211003172359.1622768-5-daniel.schaefer@hpe.com> MIME-Version: 1.0 In-Reply-To: <20211003172359.1622768-5-daniel.schaefer@hpe.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Oct 04, 2021 at 01:23:58AM +0800, Daniel Schaefer wrote: > Otherwise it will crash on QEMU 6.0 with: > > > Loading driver at 0x000BF814000 EntryPoint=0x000BF81428A PciHostBridgeDxe.efi > > InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF BF351F98 > > ProtectUefiImageCommon - 0xBF365BC0 > > - 0x00000000BF814000 - 0x00000000000124C0 > > PROGRESS CODE: V03040002 I0 > > ProcessPciHost: Config[0x30000000+0x10000000) Bus[0x0..0xFF] Io[0x0+0x10000)@0x3000000 Mem32[0x40000000+0x40000000)@0x0 Mem64[0x400000000+0x400000000)@0x0 > > CpuSetMemoryAttributes: Set memory attributes not supported yet > > CpuSetMemoryAttributes: Set memory attributes not supported yet > > RootBridge: PciRoot(0x0) > > Support/Attr: 70001 / 70001 > > DmaAbove4G: Yes > > NoExtConfSpace: No > > AllocAttr: 3 (CombineMemPMem Mem64Decode) > > Bus: 0 - FF Translation=0 > > Io: 0 - FFFF Translation=0 > > Mem: 40000000 - 7FFFFFFF Translation=0 > > MemAbove4G: 400000000 - 7FFFFFFFF Translation=0 > > PMem: FFFFFFFFFFFFFFFF - 0 Translation=0 > > PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0 > > CpuSetMemoryAttributes: Set memory attributes not supported yet > > > > ASSERT_EFI_ERROR (Status = Not Found) > > ASSERT [PciHostBridgeDxe] /edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c(332): !EFI_ERROR (CheckStatus) > > QEMU: Terminated > > Change works on QEMU 5.2 and 6.0. > > Cc: Abner Chang > Cc: Sunil V L > Cc: Leif Lindholm > > Signed-off-by: Daniel Schaefer > --- > Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c > index 6641e10f2e..9a2cb9413c 100644 > --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c > +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c > @@ -1,7 +1,7 @@ > /**@file > Platform PEI driver > > - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> + Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
> Copyright (c) 2011, Andrei Warkentin > > @@ -199,7 +199,7 @@ MiscInitialization ( > // of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during > // S3 resume as well, so we build it unconditionally.) > // > - BuildCpuHob (32, 32); > + BuildCpuHob (48, 32); This is fine for now. But I think this should be found dynamically instead of hard coding. Do you know if there is any way in RISC-V to find out the physical address bits implemented? I am thinking some thing similar to ArmGetPhysicalAddressBits(). Otherwise, looks fine to me. Reviewed-by: Sunil V L Thanks Sunil > } > > /** > -- > 2.33.0 >