[edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC

["Daniel Schaefer" <daniel.schaefer@hpe.com>]

OpenSBI uses the device tree for platform specific initialization, so we
need to have it already in SEC.

Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>

Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
 Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec                    |  4 ++
 Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S        | 22 ---------
 Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c                 | 49 ++++++++++++++++++++
 Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf               |  2 +
 Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h |  1 +
 5 files changed, 56 insertions(+), 22 deletions(-)

diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
index 48aeb97431..ad15a155fe 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
@@ -31,6 +31,8 @@
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize|0x0|UINT32|0x00001003
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|0x0|UINT32|0x00001004
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize|0x0|UINT32|0x00001005
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|0x0|UINT32|0x00001016
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize|0x0|UINT32|0x00001017
 
 #
 # Definition of EFI Variable region
@@ -66,6 +68,8 @@
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize|0|UINT32|0x00001104
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode|0|UINT32|0x00001105
 
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress|0|UINT32|0x00001106
+
 [PcdsPatchableInModule]
 
 [PcdsFeatureFlag]
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 8434d1a4e0..0e3940180d 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -75,11 +75,6 @@ _scratch_init:
   sd    a4, SBI_SCRATCH_FW_START_OFFSET(tp)
   sd    a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
 
-  /*
-   * Note: fw_next_arg1() uses a0, a1, and ra
-  */
-  call  fw_next_arg1
-  sd    a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp) /* Save agr1 in scratch buffer*/
   /*
    Note: fw_next_addr()uses a0, a1, and ra
   */
@@ -500,23 +495,6 @@ _reset_regs:
   csrw  CSR_MSCRATCH, 0
   ret
 
-  .align 3
-  .section .entry, "ax", %progbits
-  .global fw_prev_arg1
-fw_prev_arg1:
-
-  /* We return previous arg1 in 'a0' */
-  add   a0, zero, zero
-  ret
-
-  .align 3
-  .section .entry, "ax", %progbits
-  .global fw_next_arg1
-fw_next_arg1:
-  /* We return next arg1 in 'a0' */
-  li    a0, FixedPcdGet32(PcdRiscVPeiFvBase)
-  ret
-
   .align 3
   .section .entry, "ax", %progbits
   .global fw_next_addr
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index fa9ecd789a..0af0b4bac8 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -557,6 +557,12 @@ VOID EFIAPI PeiCore (
              &FirmwareContext
              ));
   ThisSbiPlatform->firmware_context = (unsigned long)&FirmwareContext;
+
+  //
+  // Save Flattened Device tree in firmware context
+  //
+  FirmwareContext.FlattenedDeviceTree = FuncArg1;
+
   //
   // Set firmware context Hart-specific pointer
   //
@@ -647,6 +653,42 @@ RiscVOpenSbiHartSwitchMode (
   sbi_hart_switch_mode(FuncArg0, FuncArg1, NextAddr, NextMode, NextVirt);
 }
 
+/**
+  Get device tree address
+
+  @retval The address of Device Tree binary.
+**/
+VOID *
+EFIAPI
+GetDeviceTreeAddress (
+  VOID
+  )
+{
+  EFI_STATUS Status;
+  EFI_COMMON_SECTION_HEADER *FoundSection;
+
+  if (FixedPcdGet32 (PcdDeviceTreeAddress)) {
+      return (VOID *)*((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddress));
+  } else if (FixedPcdGet32 (PcdRiscVDtbFvBase)) {
+      Status = FindFfsFileAndSection (
+                 (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32 (PcdRiscVDtbFvBase),
+                 EFI_FV_FILETYPE_FREEFORM,
+                 EFI_SECTION_RAW,
+                 &FoundSection
+               );
+      if (EFI_ERROR(Status)) {
+        DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found from FV.\n"));
+        return NULL;
+      }
+      FoundSection ++;
+      return (VOID *)FoundSection;
+  } else {
+      DEBUG ((DEBUG_ERROR, "Must use DTB either from memory or compiled in FW. PCDs configured incorrectly.\n"));
+      ASSERT (FALSE);
+  }
+  return NULL;
+}
+
 /**
   This function initilizes hart specific information and SBI.
   For the boot hart, it boots system through PEI core and initial SBI in the DXE IPL.
@@ -686,6 +728,13 @@ VOID EFIAPI SecCoreStartUpWithStack(
   UINT64 NonBootHartMessageLockValue;
   EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext;
 
+  Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
+  if (Scratch->next_arg1 == (unsigned long)NULL) {
+    DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+    ASSERT (FALSE);
+  }
+  DEBUG ((DEBUG_INFO, "DTB address: 0x%08x\n", Scratch->next_arg1));
+
   //
   // Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart.
   //
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index 89bcb039a6..78bd75e3ac 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -57,6 +57,8 @@
 [FixedPcd]
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress
 
 [Pcd]
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
index 2dab696af8..e7ac6d26ee 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
@@ -47,6 +47,7 @@ typedef struct {
 
 typedef struct {
   VOID            *PeiServiceTable;       // PEI Service table
+  UINT64           FlattenedDeviceTree;   // Pointer to Flattened Device tree
   EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC  *HartSpecific[RISC_V_MAX_HART_SUPPORTED];
 } EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
 
-- 
2.33.0