* [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC
2021-10-06 11:56 [edk2-platforms][PATCH v2 00/14] Use generic OpenSBI platform Daniel Schaefer
@ 2021-10-06 11:56 ` Daniel Schaefer
0 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:56 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
OpenSBI uses the device tree for platform specific initialization, so we
need to have it already in SEC.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 4 ++
Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S | 22 ---------
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c | 49 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 2 +
Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h | 1 +
5 files changed, 56 insertions(+), 22 deletions(-)
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
index 48aeb97431..ad15a155fe 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
@@ -31,6 +31,8 @@
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize|0x0|UINT32|0x00001003
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|0x0|UINT32|0x00001004
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize|0x0|UINT32|0x00001005
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|0x0|UINT32|0x00001016
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize|0x0|UINT32|0x00001017
#
# Definition of EFI Variable region
@@ -66,6 +68,8 @@
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize|0|UINT32|0x00001104
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode|0|UINT32|0x00001105
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress|0|UINT32|0x00001106
+
[PcdsPatchableInModule]
[PcdsFeatureFlag]
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 8434d1a4e0..0e3940180d 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -75,11 +75,6 @@ _scratch_init:
sd a4, SBI_SCRATCH_FW_START_OFFSET(tp)
sd a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
- /*
- * Note: fw_next_arg1() uses a0, a1, and ra
- */
- call fw_next_arg1
- sd a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp) /* Save agr1 in scratch buffer*/
/*
Note: fw_next_addr()uses a0, a1, and ra
*/
@@ -500,23 +495,6 @@ _reset_regs:
csrw CSR_MSCRATCH, 0
ret
- .align 3
- .section .entry, "ax", %progbits
- .global fw_prev_arg1
-fw_prev_arg1:
-
- /* We return previous arg1 in 'a0' */
- add a0, zero, zero
- ret
-
- .align 3
- .section .entry, "ax", %progbits
- .global fw_next_arg1
-fw_next_arg1:
- /* We return next arg1 in 'a0' */
- li a0, FixedPcdGet32(PcdRiscVPeiFvBase)
- ret
-
.align 3
.section .entry, "ax", %progbits
.global fw_next_addr
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index fa9ecd789a..0af0b4bac8 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -557,6 +557,12 @@ VOID EFIAPI PeiCore (
&FirmwareContext
));
ThisSbiPlatform->firmware_context = (unsigned long)&FirmwareContext;
+
+ //
+ // Save Flattened Device tree in firmware context
+ //
+ FirmwareContext.FlattenedDeviceTree = FuncArg1;
+
//
// Set firmware context Hart-specific pointer
//
@@ -647,6 +653,42 @@ RiscVOpenSbiHartSwitchMode (
sbi_hart_switch_mode(FuncArg0, FuncArg1, NextAddr, NextMode, NextVirt);
}
+/**
+ Get device tree address
+
+ @retval The address of Device Tree binary.
+**/
+VOID *
+EFIAPI
+GetDeviceTreeAddress (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_COMMON_SECTION_HEADER *FoundSection;
+
+ if (FixedPcdGet32 (PcdDeviceTreeAddress)) {
+ return (VOID *)*((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddress));
+ } else if (FixedPcdGet32 (PcdRiscVDtbFvBase)) {
+ Status = FindFfsFileAndSection (
+ (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32 (PcdRiscVDtbFvBase),
+ EFI_FV_FILETYPE_FREEFORM,
+ EFI_SECTION_RAW,
+ &FoundSection
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found from FV.\n"));
+ return NULL;
+ }
+ FoundSection ++;
+ return (VOID *)FoundSection;
+ } else {
+ DEBUG ((DEBUG_ERROR, "Must use DTB either from memory or compiled in FW. PCDs configured incorrectly.\n"));
+ ASSERT (FALSE);
+ }
+ return NULL;
+}
+
/**
This function initilizes hart specific information and SBI.
For the boot hart, it boots system through PEI core and initial SBI in the DXE IPL.
@@ -686,6 +728,13 @@ VOID EFIAPI SecCoreStartUpWithStack(
UINT64 NonBootHartMessageLockValue;
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext;
+ Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
+ if (Scratch->next_arg1 == (unsigned long)NULL) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+ ASSERT (FALSE);
+ }
+ DEBUG ((DEBUG_INFO, "DTB address: 0x%08x\n", Scratch->next_arg1));
+
//
// Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart.
//
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index 89bcb039a6..78bd75e3ac 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -57,6 +57,8 @@
[FixedPcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress
[Pcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
index 2dab696af8..e7ac6d26ee 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
@@ -47,6 +47,7 @@ typedef struct {
typedef struct {
VOID *PeiServiceTable; // PEI Service table
+ UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartSpecific[RISC_V_MAX_HART_SUPPORTED];
} EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC
@ 2021-10-06 11:58 Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Daniel Schaefer
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
OpenSBI uses the device tree for platform specific initialization, so we
need to have it already in SEC.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 4 ++
Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S | 22 ---------
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c | 49 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 2 +
Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h | 1 +
5 files changed, 56 insertions(+), 22 deletions(-)
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
index 48aeb97431..ad15a155fe 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
@@ -31,6 +31,8 @@
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize|0x0|UINT32|0x00001003
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|0x0|UINT32|0x00001004
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize|0x0|UINT32|0x00001005
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|0x0|UINT32|0x00001016
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize|0x0|UINT32|0x00001017
#
# Definition of EFI Variable region
@@ -66,6 +68,8 @@
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize|0|UINT32|0x00001104
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode|0|UINT32|0x00001105
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress|0|UINT32|0x00001106
+
[PcdsPatchableInModule]
[PcdsFeatureFlag]
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 8434d1a4e0..0e3940180d 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -75,11 +75,6 @@ _scratch_init:
sd a4, SBI_SCRATCH_FW_START_OFFSET(tp)
sd a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
- /*
- * Note: fw_next_arg1() uses a0, a1, and ra
- */
- call fw_next_arg1
- sd a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp) /* Save agr1 in scratch buffer*/
/*
Note: fw_next_addr()uses a0, a1, and ra
*/
@@ -500,23 +495,6 @@ _reset_regs:
csrw CSR_MSCRATCH, 0
ret
- .align 3
- .section .entry, "ax", %progbits
- .global fw_prev_arg1
-fw_prev_arg1:
-
- /* We return previous arg1 in 'a0' */
- add a0, zero, zero
- ret
-
- .align 3
- .section .entry, "ax", %progbits
- .global fw_next_arg1
-fw_next_arg1:
- /* We return next arg1 in 'a0' */
- li a0, FixedPcdGet32(PcdRiscVPeiFvBase)
- ret
-
.align 3
.section .entry, "ax", %progbits
.global fw_next_addr
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index fa9ecd789a..0af0b4bac8 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -557,6 +557,12 @@ VOID EFIAPI PeiCore (
&FirmwareContext
));
ThisSbiPlatform->firmware_context = (unsigned long)&FirmwareContext;
+
+ //
+ // Save Flattened Device tree in firmware context
+ //
+ FirmwareContext.FlattenedDeviceTree = FuncArg1;
+
//
// Set firmware context Hart-specific pointer
//
@@ -647,6 +653,42 @@ RiscVOpenSbiHartSwitchMode (
sbi_hart_switch_mode(FuncArg0, FuncArg1, NextAddr, NextMode, NextVirt);
}
+/**
+ Get device tree address
+
+ @retval The address of Device Tree binary.
+**/
+VOID *
+EFIAPI
+GetDeviceTreeAddress (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_COMMON_SECTION_HEADER *FoundSection;
+
+ if (FixedPcdGet32 (PcdDeviceTreeAddress)) {
+ return (VOID *)*((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddress));
+ } else if (FixedPcdGet32 (PcdRiscVDtbFvBase)) {
+ Status = FindFfsFileAndSection (
+ (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32 (PcdRiscVDtbFvBase),
+ EFI_FV_FILETYPE_FREEFORM,
+ EFI_SECTION_RAW,
+ &FoundSection
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found from FV.\n"));
+ return NULL;
+ }
+ FoundSection ++;
+ return (VOID *)FoundSection;
+ } else {
+ DEBUG ((DEBUG_ERROR, "Must use DTB either from memory or compiled in FW. PCDs configured incorrectly.\n"));
+ ASSERT (FALSE);
+ }
+ return NULL;
+}
+
/**
This function initilizes hart specific information and SBI.
For the boot hart, it boots system through PEI core and initial SBI in the DXE IPL.
@@ -686,6 +728,13 @@ VOID EFIAPI SecCoreStartUpWithStack(
UINT64 NonBootHartMessageLockValue;
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext;
+ Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
+ if (Scratch->next_arg1 == (unsigned long)NULL) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+ ASSERT (FALSE);
+ }
+ DEBUG ((DEBUG_INFO, "DTB address: 0x%08x\n", Scratch->next_arg1));
+
//
// Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart.
//
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index 89bcb039a6..78bd75e3ac 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -57,6 +57,8 @@
[FixedPcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress
[Pcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
index 2dab696af8..e7ac6d26ee 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
@@ -47,6 +47,7 @@ typedef struct {
typedef struct {
VOID *PeiServiceTable; // PEI Service table
+ UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartSpecific[RISC_V_MAX_HART_SUPPORTED];
} EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [edk2-platforms][PATCH v2 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB
2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
@ 2021-10-06 11:58 ` Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Daniel Schaefer
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: daniel.schaefer, Abner Chang, Sunil V L
From: Abner Chang <abner.chang@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c | 70 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf | 49 ++++++++++++++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 5 ++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 1 +
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi | 2 +-
5 files changed, 126 insertions(+), 1 deletion(-)
diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c
new file mode 100644
index 0000000000..7052957003
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c
@@ -0,0 +1,70 @@
+/** @file
+The module to pass the device tree to DXE via HOB.
+
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/RiscVFirmwareContextLib.h>
+
+#include <libfdt.h>
+
+#include <Guid/FdtHob.h>
+
+/**
+ The entrypoint of the module, it will pass the FDT via a HOB.
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval TODO
+**/
+EFI_STATUS
+EFIAPI
+PeimPassFdt (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ VOID *FdtPointer;
+ VOID *Base;
+ VOID *NewBase;
+ UINTN FdtSize;
+ UINTN FdtPages;
+ UINT64 *FdtHobData;
+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
+
+ FirmwareContext = NULL;
+ GetFirmwareContextPointer (&FirmwareContext);
+
+ if (FirmwareContext == NULL) {
+ DEBUG((DEBUG_ERROR, "%a: OpenSBI Firmware Context is NULL\n", __FUNCTION__));
+ return EFI_UNSUPPORTED;
+ }
+ FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree;
+ if (FdtPointer == NULL) {
+ DEBUG((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__));
+ return EFI_UNSUPPORTED;
+ }
+ DEBUG((DEBUG_ERROR, "%a: Build FDT HOB - FDT at address: 0x%x \n", __FUNCTION__, FdtPointer));
+ Base = FdtPointer;
+ ASSERT (Base != NULL);
+ ASSERT (fdt_check_header (Base) == 0);
+
+ FdtSize = fdt_totalsize (Base);
+ FdtPages = EFI_SIZE_TO_PAGES (FdtSize);
+ NewBase = AllocatePages (FdtPages);
+ ASSERT (NewBase != NULL);
+ fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));
+
+ FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData);
+ ASSERT (FdtHobData != NULL);
+ *FdtHobData = (UINTN)NewBase;
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
new file mode 100644
index 0000000000..2dbeca70c5
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
@@ -0,0 +1,49 @@
+## @file
+# The FDT Peim driver is used to pass the device tree to DXE phase.
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Developmente LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = FdtPei
+ MODULE_UNI_FILE = FdtPei.uni
+ FILE_GUID = 724FD5E9-F35E-4386-B1E1-2ADA6103C4F9
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = PeimPassFdt
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ FdtPeim.c
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ DebugLib
+ HobLib
+ FdtLib
+ PcdLib
+ PeiServicesLib
+ PeimEntryPoint
+ RiscVFirmwareContextLib
+
+[Guids]
+ gFdtHobGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index e971993b7b..4fab3c4bdc 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -150,6 +150,10 @@
RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf
CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
+
+ # Flattened Device Tree (FDT) access library
+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+
[LibraryClasses.common.SEC]
!ifdef $(DEBUG_ON_SERIAL_PORT)
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
@@ -400,6 +404,7 @@
<LibraryClasses>
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
}
+ Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
#
# DXE Phase modules
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index 820e19d113..f0bd65fad6 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -101,6 +101,7 @@ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
# RISC-V Platform PEI Driver
INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
+INF Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
################################################################################
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
index 937caee083..a731c7e369 160000
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
@@ -1 +1 @@
-Subproject commit 937caee0833115f69d697ca190001ba0aa5c7368
+Subproject commit a731c7e36988c3308e1978ecde491f2f6182d490
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [edk2-platforms][PATCH v2 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table
2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Daniel Schaefer
@ 2021-10-06 11:58 ` Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 11/14] U5SeriesPkg: Switch to generic OpenSBI platform Daniel Schaefer
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
The Linux EFISTUB reads the FDT from the EFI system configuration
table. Before installing the FDT needs to be patched with the booting
hartid, because the kernel in S-Mode cannot determine it.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 1 +
Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 3 +-
Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c | 116 ++++++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf | 53 +++++++++
5 files changed, 174 insertions(+), 1 deletion(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 4fab3c4bdc..cc62ad0521 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -516,6 +516,8 @@
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
+
#
# FAT filesystem + GPT/MBR partitioning + UDF filesystem
#
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index f0bd65fad6..c58fa63574 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -182,6 +182,7 @@ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
INF FatPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf
+INF Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
!ifndef $(SOURCE_DEBUG_ENABLE)
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
index 1292ba1bea..531319322c 100644
--- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
+++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
@@ -1,7 +1,7 @@
#/** @file
# RISC-V processor package.
#
-# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -102,3 +102,4 @@
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+ Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c
new file mode 100644
index 0000000000..22b12027d3
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c
@@ -0,0 +1,116 @@
+/** @file
+ RISC-V Flattened Device Tree DXE module
+
+ The Linux booting protocol on RISC-V requires the id of the booting hart to
+ be passed as a0. Therefore the EFISTUB needs to get this information. Because
+ it runs in S-Mode, it cannot get this information from mhartid. Instead we
+ insert the id into the device tree, that the EFIFSTUB can read from the config table.
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PcdLib.h>
+#include <libfdt.h>
+
+/**
+ Fix up the device tree with booting hartid for the kernel
+
+ @param DtbBlob The device tree. Is extended to fit the hart id.
+
+ @retval EFI_SUCCESS The device tree was success fixed up with the hart id.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+**/
+EFI_STATUS
+EFIAPI
+FixDtb (
+ IN OUT VOID *DtbBlob,
+ IN UINTN BootingHartId
+ )
+{
+ fdt32_t Size;
+ UINT32 ChosenOffset, Err;
+
+ DEBUG ((DEBUG_INFO, "Fixing up device tree with boot hart id: %d\n",
+ BootingHartId));
+
+ Size = fdt_totalsize(DtbBlob);
+ Err = fdt_open_into(DtbBlob, DtbBlob, Size + 32);
+ if (Err < 0) {
+ DEBUG ((DEBUG_ERROR,
+ "Device Tree can't be expanded to accommodate new node\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+ ChosenOffset = fdt_path_offset(DtbBlob, "/chosen");
+ fdt_setprop_u32(DtbBlob, ChosenOffset, "boot-hartid", BootingHartId);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Install the FDT passed in HOB into EFI system configuration table.
+
+ @retval EFI_SUCCESS Successfully installed fixed up FDT in config table.
+ @retval EFI_NOT_FOUND Did not find FDT HOB.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+**/
+EFI_STATUS
+EFIAPI
+InstallFdtFromHob (VOID)
+{
+ EFI_STATUS Status;
+ EFI_HOB_GUID_TYPE *GuidHob;
+ VOID *DataInHob;
+ UINTN DataSize;
+
+ GuidHob = GetFirstGuidHob (&gFdtHobGuid);
+ if (GuidHob == NULL) {
+ DEBUG ((DEBUG_ERROR, "Failed to find RISC-V DTB Hob\n",
+ __FUNCTION__));
+ return EFI_NOT_FOUND;
+ }
+ DataInHob = (VOID *) *((UINTN *) GET_GUID_HOB_DATA (GuidHob));
+ DataSize = GET_GUID_HOB_DATA_SIZE (GuidHob);
+
+ Status = FixDtb (DataInHob, PcdGet32(PcdBootHartId));
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = gBS->InstallConfigurationTable (&gFdtTableGuid, DataInHob);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: failed to install FDT configuration table\n",
+ __FUNCTION__));
+ }
+ return Status;
+}
+
+/**
+ Install the FDT from the HOB into the EFI system configuration table.
+
+ @param ImageHandle Image handle of this driver.
+ @param SystemTable Pointer to the System Table.
+
+ @retval EFI_SUCCESS FDT successfully installed into config table.
+ @retval EFI_NOT_FOUND Did not find FDT HOB.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+EFI_STATUS
+EFIAPI
+InstallFdt (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = InstallFdtFromHob ();
+
+ return Status;
+}
diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
new file mode 100644
index 0000000000..ae6468f9f5
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
@@ -0,0 +1,53 @@
+## @file
+# RISC-V Flattened Device Tree DXE module.
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = FdtDxe
+ FILE_GUID = a7d8f3f7-d8a7-47df-b3ec-9E5A693C380C
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = InstallFdt
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ FdtLib
+ HobLib
+ MemoryAllocationLib
+ RiscVCpuLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Sources]
+ FdtDxe.c
+
+[Guids]
+ gFdtHobGuid
+ gFdtTableGuid
+
+[Pcd]
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId ## CONSUMES
+
+[Depex]
+ TRUE
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [edk2-platforms][PATCH v2 11/14] U5SeriesPkg: Switch to generic OpenSBI platform
2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Daniel Schaefer
@ 2021-10-06 11:58 ` Daniel Schaefer
2021-10-06 11:58 ` [[edk2-platforms] PATCH v2 12/14] RISC-V: Switch to latest OpenSBI Daniel Schaefer
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
New platform files require more space in SEC.
Behavior is determined not by source code but by device tree.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc | 6 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 2 +
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c | 350 ++++++++++----------
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h | 27 ++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c | 47 +++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc | 6 +-
6 files changed, 261 insertions(+), 177 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
index 13c14a4a2c..e88aee8c02 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
@@ -23,10 +23,10 @@ DEFINE CODE_BLOCKS = 0x7E0
DEFINE VARS_BLOCKS = 0x20
DEFINE SECFV_OFFSET = 0x00000000
-DEFINE SECFV_SIZE = 0x00020000
-DEFINE PEIFV_OFFSET = 0x00020000
+DEFINE SECFV_SIZE = 0x00030000
+DEFINE PEIFV_OFFSET = 0x00030000
DEFINE PEIFV_SIZE = 0x00080000
-DEFINE SCRATCH_OFFSET = 0x000a0000
+DEFINE SCRATCH_OFFSET = 0x000b0000
DEFINE SCRATCH_SIZE = 0x00010000
DEFINE FVMAIN_OFFSET = 0x00100000 # Must be power of 2 for PMP setting
DEFINE FVMAIN_SIZE = 0x0018C000
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
index 317aaceb25..f9f2073a5b 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
@@ -25,6 +25,8 @@
[Sources]
Platform.c
+ SifiveFu540.c
+ PlatformOverride.h
[Packages]
EmbeddedPkg/EmbeddedPkg.dec
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
index aa6274be96..4deb048566 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
@@ -1,216 +1,224 @@
/*
- *
- * Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- *
* SPDX-License-Identifier: BSD-2-Clause
*
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
*
* Authors:
- * Atish Patra <atish.patra@wdc.com>
+ * Anup Patel <anup.patel@wdc.com>
*/
#include <libfdt.h>
+#include <PlatformOverride.h>
#include <sbi/riscv_asm.h>
-#include <sbi/riscv_io.h>
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_const.h>
+#include <sbi/sbi_hartmask.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
#include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/sifive-uart.h>
-#include <sbi_utils/sys/clint.h>
-#include <U5Clint.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/reset/fdt_reset.h>
-#define U540_HART_COUNT FixedPcdGet32(PcdHartCount)
-#define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)
-#define U540_HART_STACK_SIZE FixedPcdGet32(PcdOpenSbiStackSize)
-#define U540_BOOT_HART_ID FixedPcdGet32(PcdBootHartId)
+extern const struct platform_override sifive_fu540;
-#define U540_SYS_CLK FixedPcdGet32(PcdU5PlatformSystemClock)
+static const struct platform_override *special_platforms[] = {
+ &sifive_fu540,
+};
-#define U540_PLIC_ADDR 0xc000000
-#define U540_PLIC_NUM_SOURCES 0x35
-#define U540_PLIC_NUM_PRIORITIES 7
+static const struct platform_override *generic_plat = NULL;
+static const struct fdt_match *generic_plat_match = NULL;
-#define U540_UART_ADDR FixedPcdGet32(PcdU5UartBase)
+static void fw_platform_lookup_special(void *fdt, int root_offset)
+{
+ int pos, noff;
+ const struct platform_override *plat;
+ const struct fdt_match *match;
-#define U540_UART_BAUDRATE 115200
+ for (pos = 0; pos < array_size(special_platforms); pos++) {
+ plat = special_platforms[pos];
+ if (!plat->match_table)
+ continue;
-/* PRCI clock related macros */
-//TODO: Do we need a separate driver for this ?
-#define U540_PRCI_BASE_ADDR 0x10000000
-#define U540_PRCI_CLKMUXSTATUSREG 0x002C
-#define U540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1)
+ noff = fdt_find_match(fdt, -1, plat->match_table, &match);
+ if (noff < 0)
+ continue;
-/* Full tlb flush always */
-#define U540_TLB_RANGE_FLUSH_LIMIT 0
+ generic_plat = plat;
+ generic_plat_match = match;
+ break;
+ }
+}
-unsigned long log2roundup(unsigned long x);
+extern struct sbi_platform platform;
+static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
-static struct plic_data plic = {
- .addr = U540_PLIC_ADDR,
- .num_src = U540_PLIC_NUM_SOURCES,
-};
+/*
+ * The fw_platform_init() function is called very early on the boot HART
+ * OpenSBI reference firmwares so that platform specific code get chance
+ * to update "platform" instance before it is used.
+ *
+ * The arguments passed to fw_platform_init() function are boot time state
+ * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
+ * be address of FDT passed by previous booting stage.
+ *
+ * The return value of fw_platform_init() function is the FDT location. If
+ * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()
+ * can always return the original FDT location (i.e. 'arg1') unmodified.
+ */
+unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
+ unsigned long arg2, unsigned long arg3,
+ unsigned long arg4)
+{
+ const char *model, *mmu_type;
+ void *fdt = (void *)arg1;
+ u32 hartid, hart_count = 0;
+ int rc, root_offset, cpus_offset, cpu_offset, len;
-static struct clint_data clint = {
- .addr = CLINT_REG_BASE_ADDR,
- .first_hartid = 0,
- .hart_count = U540_HART_COUNT,
- .has_64bit_mmio = TRUE,
-};
+ root_offset = fdt_path_offset(fdt, "/");
+ if (root_offset < 0)
+ goto fail;
+
+ fw_platform_lookup_special(fdt, root_offset);
+
+ model = fdt_getprop(fdt, root_offset, "model", &len);
+ if (model)
+ sbi_strncpy(platform.name, model, sizeof(platform.name));
+
+ if (generic_plat && generic_plat->features)
+ platform.features = generic_plat->features(generic_plat_match);
+
+ cpus_offset = fdt_path_offset(fdt, "/cpus");
+ if (cpus_offset < 0)
+ goto fail;
+
+ fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+ rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+ if (rc)
+ continue;
+
+ if (SBI_HARTMASK_MAX_BITS <= hartid)
+ continue;
+
+ mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
+ if (!mmu_type || !len)
+ hartid = -1U;
+
+ generic_hart_index2id[hart_count++] = hartid;
+ }
-static void U540_modify_dt(void *fdt)
+ platform.hart_count = hart_count;
+
+ /* Return original FDT pointer */
+ return arg1;
+
+fail:
+ while (1)
+ wfi();
+}
+
+static int generic_early_init(bool cold_boot)
+{
+ int rc;
+
+ if (generic_plat && generic_plat->early_init) {
+ rc = generic_plat->early_init(cold_boot, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ if (!cold_boot)
+ return 0;
+
+ return fdt_reset_init();
+}
+
+static int generic_final_init(bool cold_boot)
{
+ void *fdt;
+ int rc;
+
+ if (generic_plat && generic_plat->final_init) {
+ rc = generic_plat->final_init(cold_boot, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ if (!cold_boot)
+ return 0;
+
+ fdt = sbi_scratch_thishart_arg1_ptr();
+
fdt_cpu_fixup(fdt);
-
fdt_fixups(fdt);
- /*
- * SiFive Freedom U540 has an erratum that prevents S-mode software
- * to access a PMP protected region using 1GB page table mapping, so
- * always add the no-map attribute on this platform.
- */
- fdt_reserved_memory_nomap_fixup(fdt);
-}
-
-static int U540_final_init(bool cold_boot)
-{
- void *fdt;
- struct sbi_scratch *ThisScratch;
-
- if (!cold_boot)
- return 0;
-
- fdt = sbi_scratch_thishart_arg1_ptr();
- U540_modify_dt(fdt);
- //
- // Set PMP of firmware regions to R and X. We will lock this in the end of PEI.
- // This region only protects SEC, PEI and Scratch buffer.
- //
- ThisScratch = sbi_scratch_thishart_ptr ();
- pmp_set(0, PMP_R | PMP_X | PMP_W, ThisScratch->fw_start, log2roundup (ThisScratch->fw_size));
- return 0;
-}
-
-static u32 U540_pmp_region_count(u32 hartid)
-{
- return 1;
-}
-
-static int U540_pmp_region_info(u32 hartid, u32 index,
- ulong *prot, ulong *addr, ulong *log2size)
-{
- int ret = 0;
-
- switch (index) {
- case 0:
- *prot = PMP_R | PMP_W | PMP_X;
- *addr = 0;
- *log2size = __riscv_xlen;
- break;
- default:
- ret = -1;
- break;
- };
-
- return ret;
-}
-
-static int U540_console_init(void)
-{
- unsigned long peri_in_freq;
+ if (generic_plat && generic_plat->fdt_fixup) {
+ rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
+ if (rc)
+ return rc;
+ }
- peri_in_freq = U540_SYS_CLK/2;
- return sifive_uart_init(U540_UART_ADDR, peri_in_freq, U540_UART_BAUDRATE);
+ return 0;
}
-static int U540_irqchip_init(bool cold_boot)
+static void generic_early_exit(void)
{
- int rc;
- u32 hartid = current_hartid();
-
- if (cold_boot) {
- rc = plic_cold_irqchip_init(&plic);
- if (rc)
- return rc;
- }
-
- return plic_warm_irqchip_init(&plic,
- (hartid) ? (2 * hartid - 1) : 0,
- (hartid) ? (2 * hartid) : -1);
+ if (generic_plat && generic_plat->early_exit)
+ generic_plat->early_exit(generic_plat_match);
}
-static int U540_ipi_init(bool cold_boot)
+static void generic_final_exit(void)
{
- int rc;
-
- if (cold_boot) {
- rc = clint_cold_ipi_init(&clint);
- if (rc)
- return rc;
-
- }
-
- return clint_warm_ipi_init();
-}
-
-static u64 U540_get_tlbr_flush_limit(void)
-{
- return U540_TLB_RANGE_FLUSH_LIMIT;
+ if (generic_plat && generic_plat->final_exit)
+ generic_plat->final_exit(generic_plat_match);
}
-static int U540_timer_init(bool cold_boot)
+static u64 generic_tlbr_flush_limit(void)
{
- int rc;
-
- if (cold_boot) {
- rc = clint_cold_timer_init(&clint, NULL);
- if (rc)
- return rc;
- }
-
- return clint_warm_timer_init();
+ if (generic_plat && generic_plat->tlbr_flush_limit)
+ return generic_plat->tlbr_flush_limit(generic_plat_match);
+ return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
}
-/**
- * The U540 SoC has 5 HARTs, Boot HART ID is determined by
- * PcdBootHartId.
- */
-static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] = {1, 2, 3, 4};
-static int U540_system_reset(u32 type)
+static int generic_system_reset(u32 reset_type)
{
- /* For now nothing to do. */
- return 0;
+ if (generic_plat && generic_plat->system_reset)
+ return generic_plat->system_reset(reset_type,
+ generic_plat_match);
+ return fdt_system_reset(reset_type);
}
const struct sbi_platform_operations platform_ops = {
- .pmp_region_count = U540_pmp_region_count,
- .pmp_region_info = U540_pmp_region_info,
- .final_init = U540_final_init,
- .console_putc = sifive_uart_putc,
- .console_getc = sifive_uart_getc,
- .console_init = U540_console_init,
- .irqchip_init = U540_irqchip_init,
- .ipi_send = clint_ipi_send,
- .ipi_clear = clint_ipi_clear,
- .ipi_init = U540_ipi_init,
- .get_tlbr_flush_limit = U540_get_tlbr_flush_limit,
- .timer_value = clint_timer_value,
- .timer_event_stop = clint_timer_event_stop,
- .timer_event_start = clint_timer_event_start,
- .timer_init = U540_timer_init,
- .system_reset = U540_system_reset
+ .early_init = generic_early_init,
+ .final_init = generic_final_init,
+ .early_exit = generic_early_exit,
+ .final_exit = generic_final_exit,
+ .console_putc = fdt_serial_putc,
+ .console_getc = fdt_serial_getc,
+ .console_init = fdt_serial_init,
+ .irqchip_init = fdt_irqchip_init,
+ .irqchip_exit = fdt_irqchip_exit,
+ .ipi_send = fdt_ipi_send,
+ .ipi_clear = fdt_ipi_clear,
+ .ipi_init = fdt_ipi_init,
+ .ipi_exit = fdt_ipi_exit,
+ .get_tlbr_flush_limit = generic_tlbr_flush_limit,
+ .timer_value = fdt_timer_value,
+ .timer_event_stop = fdt_timer_event_stop,
+ .timer_event_start = fdt_timer_event_start,
+ .timer_init = fdt_timer_init,
+ .timer_exit = fdt_timer_exit,
+ .system_reset = generic_system_reset,
};
-const struct sbi_platform platform = {
- .opensbi_version = OPENSBI_VERSION, // The OpenSBI version this platform table is built bassed on.
- .platform_version = SBI_PLATFORM_VERSION(0x0001, 0x0000), // SBI Platform version 1.0
- .name = "SiFive Freedom U540",
- .features = SBI_PLATFORM_DEFAULT_FEATURES,
- .hart_count = U540_BOOTABLE_HART_COUNT,
- .hart_index2id = U540_hart_index2id,
- .hart_stack_size = U540_HART_STACK_SIZE,
- .platform_ops_addr = (unsigned long)&platform_ops
+struct sbi_platform platform = {
+ .opensbi_version = OPENSBI_VERSION,
+ .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+ .name = "Generic",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = SBI_HARTMASK_MAX_BITS,
+ .hart_index2id = generic_hart_index2id,
+ .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+ .platform_ops_addr = (unsigned long)&platform_ops
};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
new file mode 100644
index 0000000000..8a53cdf9ac
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
@@ -0,0 +1,27 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __PLATFORM_OVERRIDE_H__
+#define __PLATFORM_OVERRIDE_H__
+
+#include <sbi/sbi_types.h>
+
+struct platform_override {
+ const struct fdt_match *match_table;
+ u64 (*features)(const struct fdt_match *match);
+ u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+ int (*early_init)(bool cold_boot, const struct fdt_match *match);
+ int (*final_init)(bool cold_boot, const struct fdt_match *match);
+ void (*early_exit)(const struct fdt_match *match);
+ void (*final_exit)(const struct fdt_match *match);
+ int (*system_reset)(u32 reset_type, const struct fdt_match *match);
+ int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
+};
+
+#endif
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c
new file mode 100644
index 0000000000..b7d935e95e
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <PlatformOverride.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+
+static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
+{
+ /*
+ * The sfence.vma by virtual address does not work on
+ * SiFive FU540 so we return remote TLB flush limit as zero.
+ */
+ return 0;
+}
+
+static int sifive_fu540_fdt_fixup(void *fdt, const struct fdt_match *match)
+{
+ /*
+ * SiFive Freedom U540 has an erratum that prevents S-mode software
+ * to access a PMP protected region using 1GB page table mapping, so
+ * always add the no-map attribute on this platform.
+ */
+ fdt_reserved_memory_nomap_fixup(fdt);
+
+ return 0;
+}
+
+static const struct fdt_match sifive_fu540_match[] = {
+ { .compatible = "sifive,fu540" },
+ { .compatible = "sifive,fu540g" },
+ { .compatible = "sifive,fu540-c000" },
+ { .compatible = "sifive,hifive-unleashed-a00" },
+ { },
+};
+
+const struct platform_override sifive_fu540 = {
+ .match_table = sifive_fu540_match,
+ .tlbr_flush_limit = sifive_fu540_tlbr_flush_limit,
+ .fdt_fixup = sifive_fu540_fdt_fixup,
+};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
index 723632dc79..8e7afc2d82 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
@@ -23,10 +23,10 @@ DEFINE CODE_BLOCKS = 0x7E0
DEFINE VARS_BLOCKS = 0x20
DEFINE SECFV_OFFSET = 0x00000000
-DEFINE SECFV_SIZE = 0x00020000
-DEFINE PEIFV_OFFSET = 0x00020000
+DEFINE SECFV_SIZE = 0x00030000
+DEFINE PEIFV_OFFSET = 0x00030000
DEFINE PEIFV_SIZE = 0x00080000
-DEFINE SCRATCH_OFFSET = 0x000a0000
+DEFINE SCRATCH_OFFSET = 0x000b0000
DEFINE SCRATCH_SIZE = 0x00010000
DEFINE FVMAIN_OFFSET = 0x00100000 # Must be power of 2 for PMP setting
DEFINE FVMAIN_SIZE = 0x0018C000
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [[edk2-platforms] PATCH v2 12/14] RISC-V: Switch to latest OpenSBI
2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
` (2 preceding siblings ...)
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 11/14] U5SeriesPkg: Switch to generic OpenSBI platform Daniel Schaefer
@ 2021-10-06 11:58 ` Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 13/14] RISC-V: Implement ResetSystem RT call Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg Daniel Schaefer
5 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c | 27 ++++---
Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S | 2 +
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c | 5 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c | 29 +------
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c | 31 +++-----
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h | 5 +-
Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c | 81 +++++++++++++++++++-
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h | 1 +
Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h | 1 +
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf | 13 +++-
10 files changed, 128 insertions(+), 67 deletions(-)
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
index e78d811f4c..b7e39d19c1 100644
--- a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
@@ -14,31 +14,38 @@
#include <sbi/sbi_platform.h>
const struct sbi_platform_operations platform_ops = {
- .pmp_region_count = NULL,
- .pmp_region_info = NULL,
+ .early_init = NULL,
.final_init = NULL,
+ .early_exit = NULL,
+ .final_exit = NULL,
+ .domains_root_regions = NULL,
+ .domains_init = NULL,
.console_putc = NULL,
.console_getc = NULL,
.console_init = NULL,
.irqchip_init = NULL,
+ .irqchip_exit = NULL,
.ipi_send = NULL,
.ipi_clear = NULL,
.ipi_init = NULL,
+ .ipi_exit = NULL,
+ .get_tlbr_flush_limit = NULL,
.timer_value = NULL,
.timer_event_stop = NULL,
.timer_event_start = NULL,
.timer_init = NULL,
- .system_reboot = NULL,
- .system_shutdown = NULL
+ .timer_exit = NULL,
+ .system_reset_check = NULL,
+ .system_reset = NULL,
};
-const struct sbi_platform platform = {
- .opensbi_version = OPENSBI_VERSION, // The OpenSBI version this platform table is built bassed on.
- .platform_version = SBI_PLATFORM_VERSION(0x0000, 0x0000), // SBI Platform version 1.0
- .name = "NULL platform",
+struct sbi_platform platform = {
+ .opensbi_version = OPENSBI_VERSION,
+ .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+ .name = "NULL Platform",
.features = 0,
.hart_count = 0,
+ .hart_index2id = 0,
.hart_stack_size = 0,
- .disabled_hart_mask = 0,
- .platform_ops_addr = 0
+ .platform_ops_addr = 0,
};
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 0e3940180d..a8157c896e 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -21,6 +21,8 @@
.text
.align 3
+ .globl _start_warm
+
ASM_FUNC (_ModuleEntryPoint)
/*
* Jump to warm-boot if this is not the selected core booting,
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index 0af0b4bac8..e9f030f352 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -21,6 +21,7 @@
#include <sbi/sbi_platform.h> // Reference to header file in opensbi
#include <sbi/sbi_init.h> // Reference to header file in opensbi
#include <sbi/sbi_ecall.h> // Reference to header file in opensbi
+#include <sbi/sbi_trap.h> // Reference to header file in opensbi
//
// Indicates the boot hart (PcdBootHartId) OpenSBI initialization is done.
@@ -434,7 +435,7 @@ EFI_STATUS EFIAPI TemporaryRamDone (
STATIC int SbiEcallFirmwareHandler (
IN unsigned long ExtId,
IN unsigned long FuncId,
- IN unsigned long *Args,
+ IN CONST struct sbi_trap_regs *TrapRegs,
OUT unsigned long *OutVal,
OUT struct sbi_trap_info *OutTrap
)
@@ -446,7 +447,7 @@ STATIC int SbiEcallFirmwareHandler (
*OutVal = (unsigned long) sbi_scratch_thishart_ptr();
break;
case SBI_EXT_FW_MSCRATCH_HARTID_FUNC:
- *OutVal = (unsigned long) sbi_hartid_to_scratch (Args[0]);
+ *OutVal = (unsigned long) sbi_hartid_to_scratch (TrapRegs->a0);
break;
default:
Ret = SBI_ENOTSUPP;
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c
index ed4b1550bc..b346eccaf0 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c
@@ -111,30 +111,6 @@ static int U500_final_init(bool cold_boot)
return 0;
}
-static u32 U500_pmp_region_count(u32 hartid)
-{
- return 1;
-}
-
-static int U500_pmp_region_info(u32 hartid, u32 index,
- ulong *prot, ulong *addr, ulong *log2size)
-{
- int ret = 0;
-
- switch (index) {
- case 0:
- *prot = PMP_R | PMP_W | PMP_X;
- *addr = 0;
- *log2size = __riscv_xlen;
- break;
- default:
- ret = -1;
- break;
- };
-
- return ret;
-}
-
static int U500_console_init(void)
{
unsigned long peri_in_freq;
@@ -196,15 +172,12 @@ static int U500_timer_init(bool cold_boot)
*/
static u32 u500_hart_index2id[U500_BOOTABLE_HART_COUNT] = {0, 1, 2, 3};
-static int U500_system_reset(u32 type)
+static void U500_system_reset(u32 type, u32 second_param)
{
/* For now nothing to do. */
- return 0;
}
const struct sbi_platform_operations platform_ops = {
- .pmp_region_count = U500_pmp_region_count,
- .pmp_region_info = U500_pmp_region_info,
.final_init = U500_final_init,
.console_putc = sifive_uart_putc,
.console_getc = sifive_uart_getc,
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
index 4deb048566..2f51e45d58 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
@@ -13,6 +13,8 @@
#include <sbi/sbi_hartmask.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_string.h>
+#include <sbi/sbi_math.h>
+#include <sbi_utils/fdt/fdt_domain.h>
#include <sbi_utils/fdt/fdt_fixup.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/irqchip/fdt_irqchip.h>
@@ -71,7 +73,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
unsigned long arg2, unsigned long arg3,
unsigned long arg4)
{
- const char *model, *mmu_type;
+ const char *model;
void *fdt = (void *)arg1;
u32 hartid, hart_count = 0;
int rc, root_offset, cpus_offset, cpu_offset, len;
@@ -101,10 +103,6 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
if (SBI_HARTMASK_MAX_BITS <= hartid)
continue;
- mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
- if (!mmu_type || !len)
- hartid = -1U;
-
generic_hart_index2id[hart_count++] = hartid;
}
@@ -152,6 +150,7 @@ static int generic_final_init(bool cold_boot)
fdt_cpu_fixup(fdt);
fdt_fixups(fdt);
+ fdt_domain_fixup(fdt);
if (generic_plat && generic_plat->fdt_fixup) {
rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
@@ -174,6 +173,11 @@ static void generic_final_exit(void)
generic_plat->final_exit(generic_plat_match);
}
+static int generic_domains_init(void)
+{
+ return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
+}
+
static u64 generic_tlbr_flush_limit(void)
{
if (generic_plat && generic_plat->tlbr_flush_limit)
@@ -181,35 +185,20 @@ static u64 generic_tlbr_flush_limit(void)
return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
}
-static int generic_system_reset(u32 reset_type)
-{
- if (generic_plat && generic_plat->system_reset)
- return generic_plat->system_reset(reset_type,
- generic_plat_match);
- return fdt_system_reset(reset_type);
-}
-
const struct sbi_platform_operations platform_ops = {
.early_init = generic_early_init,
.final_init = generic_final_init,
.early_exit = generic_early_exit,
.final_exit = generic_final_exit,
- .console_putc = fdt_serial_putc,
- .console_getc = fdt_serial_getc,
+ .domains_init = generic_domains_init,
.console_init = fdt_serial_init,
.irqchip_init = fdt_irqchip_init,
.irqchip_exit = fdt_irqchip_exit,
- .ipi_send = fdt_ipi_send,
- .ipi_clear = fdt_ipi_clear,
.ipi_init = fdt_ipi_init,
.ipi_exit = fdt_ipi_exit,
.get_tlbr_flush_limit = generic_tlbr_flush_limit,
- .timer_value = fdt_timer_value,
- .timer_event_stop = fdt_timer_event_stop,
- .timer_event_start = fdt_timer_event_start,
.timer_init = fdt_timer_init,
.timer_exit = fdt_timer_exit,
- .system_reset = generic_system_reset,
};
struct sbi_platform platform = {
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
index 8a53cdf9ac..77a90d645e 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
@@ -20,7 +20,10 @@ struct platform_override {
int (*final_init)(bool cold_boot, const struct fdt_match *match);
void (*early_exit)(const struct fdt_match *match);
void (*final_exit)(const struct fdt_match *match);
- int (*system_reset)(u32 reset_type, const struct fdt_match *match);
+ int (*system_reset_check)(u32 reset_type, u32 reset_reason,
+ const struct fdt_match *match);
+ void (*system_reset)(u32 reset_type, u32 reset_reason,
+ const struct fdt_match *match);
int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
};
diff --git a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
index e98c8523a3..7bc73a0b82 100644
--- a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
+++ b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
@@ -19,6 +19,21 @@
#define UART_REG_IP 5
#define UART_IP_RXWM 0x02
+
+#define UART_REG_TXFIFO 0
+#define UART_REG_RXFIFO 1
+#define UART_REG_TXCTRL 2
+#define UART_REG_RXCTRL 3
+#define UART_REG_IE 4
+#define UART_REG_IP 5
+#define UART_REG_DIV 6
+
+#define UART_TXFIFO_FULL 0x80000000
+#define UART_RXFIFO_EMPTY 0x80000000
+#define UART_RXFIFO_DATA 0x000000ff
+#define UART_TXCTRL_TXEN 0x1
+#define UART_RXCTRL_RXEN 0x1
+
//---------------------------------------------
// UART Settings
//---------------------------------------------
@@ -28,6 +43,68 @@
BOOLEAN Initiated = FALSE;
+/**
+ Get value from serial port register.
+
+ @param RegIndex Register index
+
+ @retval Vale returned from from serial port.
+
+**/
+UINT32 GetReg (
+ IN UINT32 RegIndex
+ )
+{
+ return MmioRead32 (FixedPcdGet32(PcdU5UartBase) + (RegIndex * 0x4));
+}
+
+/**
+ Set serial port register.
+
+ @param RegIndex Register index
+ @param Value Value write to Register
+
+**/
+VOID SetReg (
+ IN UINT32 RegIndex,
+ IN UINT32 Value
+ )
+{
+ MmioWrite32 (Value, FixedPcdGet32(PcdU5UartBase) + (RegIndex * 0x4));
+}
+
+/**
+ Character output to serial port.
+
+ @param Ch The character to serial port.
+
+**/
+VOID SifiveUartPutChar (
+ IN UINT8 Ch
+ )
+{
+ while (GetReg (UART_REG_TXFIFO) & UART_TXFIFO_FULL);
+
+ SetReg (UART_REG_TXFIFO, Ch);
+}
+
+/**
+ Get character from serial port.
+
+ @retval character The character from serial port.
+
+**/
+UINT32 SifiveUartGetChar (VOID)
+{
+ UINT32 Ret;
+
+ Ret = GetReg (UART_REG_RXFIFO);
+ if (!(Ret & UART_RXFIFO_EMPTY)) {
+ return Ret & UART_RXFIFO_DATA;
+ }
+ return -1;
+}
+
/**
Initialize the serial device hardware.
@@ -88,7 +165,7 @@ SerialPortWrite (
}
for(Index = 0; Index < NumberOfBytes; Index ++) {
- sifive_uart_putc (Buffer [Index]);
+ SifiveUartPutChar (Buffer [Index]);
}
return Index;
@@ -119,7 +196,7 @@ SerialPortRead (
}
for (Index = 0; Index < NumberOfBytes; Index ++) {
- Buffer [Index] = (UINT8)sifive_uart_getc ();
+ Buffer [Index] = (UINT8)SifiveUartGetChar ();
}
return Index;
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
index f81ea06b05..66a87cb8c3 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
@@ -16,6 +16,7 @@
#include <IndustryStandard/RiscVOpensbi.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_ecall.h>
//
// EDK2 OpenSBI Firmware extension.
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h b/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
index 00c374f24a..bbf74e2a82 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
@@ -49,6 +49,7 @@ typedef UINT64 physical_size_t;
#define __packed __attribute__((packed))
#define __noreturn __attribute__((noreturn))
+#define __aligned(x) __attribute__((aligned(x)))
#if defined(__GNUC__) || defined(__clang__)
#define likely(x) __builtin_expect((x), 1)
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
index 71cc76444e..e40a797896 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
@@ -23,6 +23,7 @@
opensbi/lib/sbi/sbi_bitmap.c
opensbi/lib/sbi/sbi_bitops.c
opensbi/lib/sbi/sbi_console.c
+ opensbi/lib/sbi/sbi_domain.c
opensbi/lib/sbi/sbi_ecall.c
opensbi/lib/sbi/sbi_ecall_base.c
opensbi/lib/sbi/sbi_ecall_hsm.c
@@ -51,27 +52,33 @@
opensbi/lib/utils/fdt/fdt_helper.c
opensbi/lib/utils/fdt/fdt_fixup.c
+ opensbi/lib/utils/fdt/fdt_domain.c
opensbi/lib/utils/ipi/fdt_ipi.c
- opensbi/lib/utils/ipi/fdt_ipi_clint.c
+ opensbi/lib/utils/ipi/aclint_mswi.c
+ opensbi/lib/utils/ipi/fdt_ipi_mswi.c
opensbi/lib/utils/irqchip/fdt_irqchip.c
opensbi/lib/utils/irqchip/fdt_irqchip_plic.c
opensbi/lib/utils/irqchip/plic.c
opensbi/lib/utils/reset/fdt_reset.c
opensbi/lib/utils/reset/fdt_reset_htif.c
opensbi/lib/utils/reset/fdt_reset_sifive.c
+ opensbi/lib/utils/reset/fdt_reset_thead.c
+ opensbi/lib/utils/reset/fdt_reset_thead_asm.S
opensbi/lib/utils/serial/fdt_serial.c
opensbi/lib/utils/serial/fdt_serial_htif.c
opensbi/lib/utils/serial/fdt_serial_shakti.c
opensbi/lib/utils/serial/fdt_serial_sifive.c
opensbi/lib/utils/serial/fdt_serial_uart8250.c
+ opensbi/lib/utils/serial/fdt_serial_gaisler.c
+ opensbi/lib/utils/serial/gaisler-uart.c
opensbi/lib/utils/serial/shakti-uart.c
opensbi/lib/utils/serial/sifive-uart.c
opensbi/lib/utils/serial/uart8250.c
- opensbi/lib/utils/sys/clint.c
opensbi/lib/utils/sys/htif.c
opensbi/lib/utils/sys/sifive_test.c
opensbi/lib/utils/timer/fdt_timer.c
- opensbi/lib/utils/timer/fdt_timer_clint.c
+ opensbi/lib/utils/timer/aclint_mtimer.c
+ opensbi/lib/utils/timer/fdt_timer_mtimer.c
[Packages]
EmbeddedPkg/EmbeddedPkg.dec # For libfdt.
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [edk2-platforms][PATCH v2 13/14] RISC-V: Implement ResetSystem RT call
2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
` (3 preceding siblings ...)
2021-10-06 11:58 ` [[edk2-platforms] PATCH v2 12/14] RISC-V: Switch to latest OpenSBI Daniel Schaefer
@ 2021-10-06 11:58 ` Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg Daniel Schaefer
5 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 128 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 33 +++++
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 12 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 12 +-
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h | 38 +++++-
Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c | 44 ++++++-
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi | 2 +-
7 files changed, 256 insertions(+), 13 deletions(-)
diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
new file mode 100644
index 0000000000..646073c106
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -0,0 +1,128 @@
+/** @file
+ Reset System Library functions for RISC-V
+
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/ResetSystemLib.h>
+#include <Library/RiscVEdk2SbiLib.h>
+
+/**
+ This function causes a system-wide reset (cold reset), in which
+ all circuitry within the system returns to its initial state. This type of reset
+ is asynchronous to system operation and operates without regard to
+ cycle boundaries.
+
+ If this function returns, it means that the system does not support cold reset.
+**/
+VOID
+EFIAPI
+ResetCold (
+ VOID
+ )
+{
+ // Warm Reset via SBI ecall
+ SbiSystemReset (SBI_SRST_RESET_TYPE_COLD_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+ This function causes a system-wide initialization (warm reset), in which all processors
+ are set to their initial state. Pending cycles are not corrupted.
+
+ If this function returns, it means that the system does not support warm reset.
+**/
+VOID
+EFIAPI
+ResetWarm (
+ VOID
+ )
+{
+ // Warm Reset via SBI ecall
+ SbiSystemReset (SBI_SRST_RESET_TYPE_WARM_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+ This function causes the system to enter a power state equivalent
+ to the ACPI G2/S5 or G3 states.
+
+ If this function returns, it means that the system does not support shutdown reset.
+**/
+VOID
+EFIAPI
+ResetShutdown (
+ VOID
+ )
+{
+ // Shut down via SBI ecall
+ SbiSystemReset (SBI_SRST_RESET_TYPE_SHUTDOWN, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+ This function causes a systemwide reset. The exact type of the reset is
+ defined by the EFI_GUID that follows the Null-terminated Unicode string passed
+ into ResetData. If the platform does not recognize the EFI_GUID in ResetData
+ the platform must pick a supported reset type to perform. The platform may
+ optionally log the parameters from any non-normal reset that occurs.
+
+ @param[in] DataSize The size, in bytes, of ResetData.
+ @param[in] ResetData The data buffer starts with a Null-terminated string,
+ followed by the EFI_GUID.
+**/
+VOID
+EFIAPI
+ResetPlatformSpecific (
+ IN UINTN DataSize,
+ IN VOID *ResetData
+ )
+{
+ //
+ // Can map to OpenSBI vendor or platform specific reset type.
+ //
+ return;
+}
+
+/**
+ The ResetSystem function resets the entire platform.
+
+ @param[in] ResetType The type of reset to perform.
+ @param[in] ResetStatus The status code for the reset.
+ @param[in] DataSize The size, in bytes, of ResetData.
+ @param[in] ResetData For a ResetType of EfiResetCold, EfiResetWarm, or EfiResetShutdown
+ the data buffer starts with a Null-terminated string, optionally
+ followed by additional binary data. The string is a description
+ that the caller may use to further indicate the reason for the
+ system reset.
+**/
+VOID
+EFIAPI
+ResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN VOID *ResetData OPTIONAL
+ )
+{
+ switch (ResetType) {
+ case EfiResetWarm:
+ ResetWarm ();
+ break;
+
+ case EfiResetCold:
+ ResetCold ();
+ break;
+
+ case EfiResetShutdown:
+ ResetShutdown ();
+ return;
+
+ case EfiResetPlatformSpecific:
+ ResetPlatformSpecific (DataSize, ResetData);
+ return;
+
+ default:
+ return;
+ }
+}
diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
new file mode 100644
index 0000000000..33db9fb6d8
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -0,0 +1,33 @@
+## @file
+# Library instance for ResetSystem library class for RISC-V using SBI ecalls
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetSystemLib
+ FILE_GUID = 3eff6057-1116-4dcb-837e-c0ef1a120ab1
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ResetSystemLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ ResetSystemLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ RiscVEdk2SbiLib
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index 1dc6405a20..f14511120e 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -237,12 +237,13 @@
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
-!ifdef $(DEBUG_ON_SERIAL_PORT)
- DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
-!else
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
-!endif
+ ResetSystemLib|Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
!if $(SECURE_BOOT_ENABLE) == TRUE
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
!endif
@@ -452,6 +453,7 @@
#
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index cc62ad0521..18a482aba6 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -244,12 +244,13 @@
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
-!ifdef $(DEBUG_ON_SERIAL_PORT)
- DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
-!else
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
-!endif
+ ResetSystemLib|Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
!if $(SECURE_BOOT_ENABLE) == TRUE
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
!endif
@@ -458,6 +459,7 @@
#
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
index 66a87cb8c3..88d957f002 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
@@ -1,7 +1,7 @@
/** @file
Library to call the RISC-V SBI ecalls
- Copyright (c) 2020, Hewlett Packard Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -474,6 +474,42 @@ SbiRemoteHfenceVvma (
IN UINTN Size
);
+///
+/// Firmware System Reset (SRST) Extension
+///
+
+/**
+ Reset the system
+
+ The System Reset Extension provides a function that allow the supervisor
+ software to request system-level reboot or shutdown. The term "system" refers
+ to the world-view of supervisor software and the underlying SBI
+ implementation could be machine mode firmware or hypervisor.
+
+ Valid parameters for ResetType and ResetReason are defined in sbi_ecall_interface.h
+
+ #define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+ #define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+ #define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+
+ #define SBI_SRST_RESET_REASON_NONE 0x0
+ #define SBI_SRST_RESET_REASON_SYSFAIL 0x1
+
+ When the call is successful, it will not return.
+
+ @param[in] ResetType Typ of reset: Shutdown, cold-, or warm-reset.
+ @param[in] ResetReason Why the system resets. No reason or system failure.
+ @retval EFI_INVALID_PARAMETER Either ResetType or ResetReason is invalid.
+ @retval EFI_UNSUPPORTED ResetType is valid but not implemented on the platform.
+ @retval EFI_DEVICE_ERROR Unknown error.
+**/
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+ IN UINTN ResetType,
+ IN UINTN ResetReason
+ );
+
///
/// Vendor Specific extension space: Extension Ids 0x09000000 through 0x09FFFFFF
///
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
index 9bbeaaec3f..319526ed8f 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
@@ -15,7 +15,7 @@
- SbiLegacyRemoteSfenceVmaAsid -> Use SbiRemoteSfenceVmaAsid
- SbiLegacyShutdown -> Wait for new System Reset extension
- Copyright (c) 2020, Hewlett Packard Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
@@ -715,6 +715,48 @@ SbiRemoteHFenceVvma (
return TranslateError (Ret.Error);
}
+/**
+ Reset the system
+
+ The System Reset Extension provides a function that allow the supervisor
+ software to request system-level reboot or shutdown. The term "system" refers
+ to the world-view of supervisor software and the underlying SBI
+ implementation could be machine mode firmware or hypervisor.
+
+ Valid parameters for ResetType and ResetReason are defined in sbi_ecall_interface.h
+
+ #define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+ #define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+ #define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+
+ #define SBI_SRST_RESET_REASON_NONE 0x0
+ #define SBI_SRST_RESET_REASON_SYSFAIL 0x1
+
+ When the call is successful, it will not return.
+
+ @param[in] ResetType Typ of reset: Shutdown, cold-, or warm-reset.
+ @param[in] ResetReason Why the system resets. No reason or system failure.
+ @retval EFI_INVALID_PARAMETER Either ResetType or ResetReason is invalid.
+ @retval EFI_UNSUPPORTED ResetType is valid but not implemented on the platform.
+ @retval EFI_DEVICE_ERROR Unknown error.
+**/
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+ IN UINTN ResetType,
+ IN UINTN ResetReason
+ )
+{
+ SbiRet Ret = SbiCall (
+ SBI_EXT_SRST,
+ SBI_EXT_SRST_RESET,
+ 2,
+ ResetType,
+ ResetReason
+ );
+ return TranslateError (Ret.Error);
+}
+
//
// SBI interface function for the vendor extension
//
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
index a731c7e369..937caee083 160000
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
@@ -1 +1 @@
-Subproject commit a731c7e36988c3308e1978ecde491f2f6182d490
+Subproject commit 937caee0833115f69d697ca190001ba0aa5c7368
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [edk2-platforms][PATCH v2 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg
2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
` (4 preceding siblings ...)
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 13/14] RISC-V: Implement ResetSystem RT call Daniel Schaefer
@ 2021-10-06 11:58 ` Daniel Schaefer
5 siblings, 0 replies; 8+ messages in thread
From: Daniel Schaefer @ 2021-10-06 11:58 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L
It's a generic platform file. Only the device tree decides what happens.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 0
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/Platform.c | 13 ++++++++++++-
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/PlatformOverride.h | 0
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/SifiveFu540.c | 0
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +-
5 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
similarity index 87%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
index 2f51e45d58..db0c19915f 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
@@ -201,13 +201,24 @@ const struct sbi_platform_operations platform_ops = {
.timer_exit = fdt_timer_exit,
};
+#if FixedPcdGet32(PcdBootableHartNumber) == 4
+#define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)
+static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] = {1, 2, 3, 4};
+#endif
+
struct sbi_platform platform = {
.opensbi_version = OPENSBI_VERSION,
.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
.name = "Generic",
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = SBI_HARTMASK_MAX_BITS,
+// TODO: Workaround for U540. Not sure why we need this. OpenSBI doesn't need it.
+#if FixedPcdGet32(PcdBootableHartNumber) == 4
+ .hart_index2id = U540_hart_index2id,
+#else
.hart_index2id = generic_hart_index2id,
- .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+#endif
+ // TODO: Any reason why it shouldn't just be SBI_PLATFORM_DEFAULT_HART_STACK_SIZE?
+ .hart_stack_size = FixedPcdGet32(PcdOpenSbiStackSize),
.platform_ops_addr = (unsigned long)&platform_ops
};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 18a482aba6..5d2ccafaca 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -173,7 +173,7 @@
#
# OpenSBi Platform Library
#
- RiscVOpensbiPlatformLib|Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
+ RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
[LibraryClasses.common.PEI_CORE]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-10-06 11:59 UTC | newest]
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2021-10-06 11:58 [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 11/14] U5SeriesPkg: Switch to generic OpenSBI platform Daniel Schaefer
2021-10-06 11:58 ` [[edk2-platforms] PATCH v2 12/14] RISC-V: Switch to latest OpenSBI Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 13/14] RISC-V: Implement ResetSystem RT call Daniel Schaefer
2021-10-06 11:58 ` [edk2-platforms][PATCH v2 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg Daniel Schaefer
-- strict thread matches above, loose matches on Subject: below --
2021-10-06 11:56 [edk2-platforms][PATCH v2 00/14] Use generic OpenSBI platform Daniel Schaefer
2021-10-06 11:56 ` [edk2-platforms][PATCH v2 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
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