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Behavior is determined not by source code but by device tree. Cc: Daniel Schaefer Cc: Abner Chang Cc: Sunil V L Signed-off-by: Daniel Schaefer --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc = | 6 +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/Opensb= iPlatformLib/OpensbiPlatformLib.inf | 2 + Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/Opensb= iPlatformLib/Platform.c | 350 ++++++++++---------- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/Opensb= iPlatformLib/PlatformOverride.h | 27 ++ Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/Opensb= iPlatformLib/SifiveFu540.c | 47 +++ Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc = | 6 +- 6 files changed, 261 insertions(+), 177 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc= b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc index 13c14a4a2c..e88aee8c02 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc @@ -23,10 +23,10 @@ DEFINE CODE_BLOCKS =3D 0x7E0 DEFINE VARS_BLOCKS =3D 0x20=0D =0D DEFINE SECFV_OFFSET =3D 0x00000000=0D -DEFINE SECFV_SIZE =3D 0x00020000=0D -DEFINE PEIFV_OFFSET =3D 0x00020000=0D +DEFINE SECFV_SIZE =3D 0x00030000=0D +DEFINE PEIFV_OFFSET =3D 0x00030000=0D DEFINE PEIFV_SIZE =3D 0x00080000=0D -DEFINE SCRATCH_OFFSET =3D 0x000a0000=0D +DEFINE SCRATCH_OFFSET =3D 0x000b0000=0D DEFINE SCRATCH_SIZE =3D 0x00010000=0D DEFINE FVMAIN_OFFSET =3D 0x00100000 # Must be power of 2 for PMP setti= ng=0D DEFINE FVMAIN_SIZE =3D 0x0018C000=0D diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Li= brary/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/SiFive/U5SeriesP= kg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatfo= rmLib.inf index 317aaceb25..f9f2073a5b 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/OpensbiPlatformLib.inf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/OpensbiPlatformLib.inf @@ -25,6 +25,8 @@ =0D [Sources]=0D Platform.c=0D + SifiveFu540.c=0D + PlatformOverride.h=0D =0D [Packages]=0D EmbeddedPkg/EmbeddedPkg.dec=0D diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Li= brary/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU5= 40HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c index aa6274be96..4deb048566 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/Platform.c +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/Platform.c @@ -1,216 +1,224 @@ /*=0D - *=0D - * Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D - *=0D * SPDX-License-Identifier: BSD-2-Clause=0D *=0D - * Copyright (c) 2019 Western Digital Corporation or its affiliates.=0D + * Copyright (c) 2020 Western Digital Corporation or its affiliates.=0D *=0D * Authors:=0D - * Atish Patra =0D + * Anup Patel =0D */=0D =0D #include =0D +#include =0D #include =0D -#include =0D -#include =0D -#include =0D -#include =0D +#include =0D #include =0D +#include =0D #include =0D -#include =0D -#include =0D -#include =0D -#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D =0D -#define U540_HART_COUNT FixedPcdGet32(PcdHartCount)=0D -#define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)=0D -#define U540_HART_STACK_SIZE FixedPcdGet32(PcdOpenSbiStackSize)=0D -#define U540_BOOT_HART_ID FixedPcdGet32(PcdBootHartId)=0D +extern const struct platform_override sifive_fu540;=0D =0D -#define U540_SYS_CLK FixedPcdGet32(PcdU5PlatformSystemClock)= =0D +static const struct platform_override *special_platforms[] =3D {=0D + &sifive_fu540,=0D +};=0D =0D -#define U540_PLIC_ADDR 0xc000000=0D -#define U540_PLIC_NUM_SOURCES 0x35=0D -#define U540_PLIC_NUM_PRIORITIES 7=0D +static const struct platform_override *generic_plat =3D NULL;=0D +static const struct fdt_match *generic_plat_match =3D NULL;=0D =0D -#define U540_UART_ADDR FixedPcdGet32(PcdU5UartBase)=0D +static void fw_platform_lookup_special(void *fdt, int root_offset)=0D +{=0D + int pos, noff;=0D + const struct platform_override *plat;=0D + const struct fdt_match *match;=0D =0D -#define U540_UART_BAUDRATE 115200=0D + for (pos =3D 0; pos < array_size(special_platforms); pos++) {=0D + plat =3D special_platforms[pos];=0D + if (!plat->match_table)=0D + continue;=0D =0D -/* PRCI clock related macros */=0D -//TODO: Do we need a separate driver for this ?=0D -#define U540_PRCI_BASE_ADDR 0x10000000=0D -#define U540_PRCI_CLKMUXSTATUSREG 0x002C=0D -#define U540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1)=0D + noff =3D fdt_find_match(fdt, -1, plat->match_table, &match);=0D + if (noff < 0)=0D + continue;=0D =0D -/* Full tlb flush always */=0D -#define U540_TLB_RANGE_FLUSH_LIMIT 0=0D + generic_plat =3D plat;=0D + generic_plat_match =3D match;=0D + break;=0D + }=0D +}=0D =0D -unsigned long log2roundup(unsigned long x);=0D +extern struct sbi_platform platform;=0D +static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] =3D { 0 };=0D =0D -static struct plic_data plic =3D {=0D - .addr =3D U540_PLIC_ADDR,=0D - .num_src =3D U540_PLIC_NUM_SOURCES,=0D -};=0D +/*=0D + * The fw_platform_init() function is called very early on the boot HART=0D + * OpenSBI reference firmwares so that platform specific code get chance=0D + * to update "platform" instance before it is used.=0D + *=0D + * The arguments passed to fw_platform_init() function are boot time state= =0D + * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will=0D + * be address of FDT passed by previous booting stage.=0D + *=0D + * The return value of fw_platform_init() function is the FDT location. If= =0D + * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()= =0D + * can always return the original FDT location (i.e. 'arg1') unmodified.=0D + */=0D +unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,=0D + unsigned long arg2, unsigned long arg3,=0D + unsigned long arg4)=0D +{=0D + const char *model, *mmu_type;=0D + void *fdt =3D (void *)arg1;=0D + u32 hartid, hart_count =3D 0;=0D + int rc, root_offset, cpus_offset, cpu_offset, len;=0D =0D -static struct clint_data clint =3D {=0D - .addr =3D CLINT_REG_BASE_ADDR,=0D - .first_hartid =3D 0,=0D - .hart_count =3D U540_HART_COUNT,=0D - .has_64bit_mmio =3D TRUE,=0D -};=0D + root_offset =3D fdt_path_offset(fdt, "/");=0D + if (root_offset < 0)=0D + goto fail;=0D +=0D + fw_platform_lookup_special(fdt, root_offset);=0D +=0D + model =3D fdt_getprop(fdt, root_offset, "model", &len);=0D + if (model)=0D + sbi_strncpy(platform.name, model, sizeof(platform.name));=0D +=0D + if (generic_plat && generic_plat->features)=0D + platform.features =3D generic_plat->features(generic_plat_match);=0D +=0D + cpus_offset =3D fdt_path_offset(fdt, "/cpus");=0D + if (cpus_offset < 0)=0D + goto fail;=0D +=0D + fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {=0D + rc =3D fdt_parse_hart_id(fdt, cpu_offset, &hartid);=0D + if (rc)=0D + continue;=0D +=0D + if (SBI_HARTMASK_MAX_BITS <=3D hartid)=0D + continue;=0D +=0D + mmu_type =3D fdt_getprop(fdt, cpu_offset, "mmu-type", &len);=0D + if (!mmu_type || !len)=0D + hartid =3D -1U;=0D +=0D + generic_hart_index2id[hart_count++] =3D hartid;=0D + }=0D =0D -static void U540_modify_dt(void *fdt)=0D + platform.hart_count =3D hart_count;=0D +=0D + /* Return original FDT pointer */=0D + return arg1;=0D +=0D +fail:=0D + while (1)=0D + wfi();=0D +}=0D +=0D +static int generic_early_init(bool cold_boot)=0D +{=0D + int rc;=0D +=0D + if (generic_plat && generic_plat->early_init) {=0D + rc =3D generic_plat->early_init(cold_boot, generic_plat_match);=0D + if (rc)=0D + return rc;=0D + }=0D +=0D + if (!cold_boot)=0D + return 0;=0D +=0D + return fdt_reset_init();=0D +}=0D +=0D +static int generic_final_init(bool cold_boot)=0D {=0D + void *fdt;=0D + int rc;=0D +=0D + if (generic_plat && generic_plat->final_init) {=0D + rc =3D generic_plat->final_init(cold_boot, generic_plat_match);=0D + if (rc)=0D + return rc;=0D + }=0D +=0D + if (!cold_boot)=0D + return 0;=0D +=0D + fdt =3D sbi_scratch_thishart_arg1_ptr();=0D +=0D fdt_cpu_fixup(fdt);=0D -=0D fdt_fixups(fdt);=0D =0D - /*=0D - * SiFive Freedom U540 has an erratum that prevents S-mode software=0D - * to access a PMP protected region using 1GB page table mapping, so=0D - * always add the no-map attribute on this platform.=0D - */=0D - fdt_reserved_memory_nomap_fixup(fdt);=0D -}=0D -=0D -static int U540_final_init(bool cold_boot)=0D -{=0D - void *fdt;=0D - struct sbi_scratch *ThisScratch;=0D -=0D - if (!cold_boot)=0D - return 0;=0D -=0D - fdt =3D sbi_scratch_thishart_arg1_ptr();=0D - U540_modify_dt(fdt);=0D - //=0D - // Set PMP of firmware regions to R and X. We will lock this in the en= d of PEI.=0D - // This region only protects SEC, PEI and Scratch buffer.=0D - //=0D - ThisScratch =3D sbi_scratch_thishart_ptr ();=0D - pmp_set(0, PMP_R | PMP_X | PMP_W, ThisScratch->fw_start, log2roundup (= ThisScratch->fw_size));=0D - return 0;=0D -}=0D -=0D -static u32 U540_pmp_region_count(u32 hartid)=0D -{=0D - return 1;=0D -}=0D -=0D -static int U540_pmp_region_info(u32 hartid, u32 index,=0D - ulong *prot, ulong *addr, ulong *log2size)=0D -{=0D - int ret =3D 0;=0D -=0D - switch (index) {=0D - case 0:=0D - *prot =3D PMP_R | PMP_W | PMP_X;=0D - *addr =3D 0;=0D - *log2size =3D __riscv_xlen;=0D - break;=0D - default:=0D - ret =3D -1;=0D - break;=0D - };=0D -=0D - return ret;=0D -}=0D -=0D -static int U540_console_init(void)=0D -{=0D - unsigned long peri_in_freq;=0D + if (generic_plat && generic_plat->fdt_fixup) {=0D + rc =3D generic_plat->fdt_fixup(fdt, generic_plat_match);=0D + if (rc)=0D + return rc;=0D + }=0D =0D - peri_in_freq =3D U540_SYS_CLK/2;=0D - return sifive_uart_init(U540_UART_ADDR, peri_in_freq, U540_UART_BAUDRA= TE);=0D + return 0;=0D }=0D =0D -static int U540_irqchip_init(bool cold_boot)=0D +static void generic_early_exit(void)=0D {=0D - int rc;=0D - u32 hartid =3D current_hartid();=0D -=0D - if (cold_boot) {=0D - rc =3D plic_cold_irqchip_init(&plic);=0D - if (rc)=0D - return rc;=0D - }=0D -=0D - return plic_warm_irqchip_init(&plic,=0D - (hartid) ? (2 * hartid - 1) : 0,=0D - (hartid) ? (2 * hartid) : -1);=0D + if (generic_plat && generic_plat->early_exit)=0D + generic_plat->early_exit(generic_plat_match);=0D }=0D =0D -static int U540_ipi_init(bool cold_boot)=0D +static void generic_final_exit(void)=0D {=0D - int rc;=0D -=0D - if (cold_boot) {=0D - rc =3D clint_cold_ipi_init(&clint);=0D - if (rc)=0D - return rc;=0D -=0D - }=0D -=0D - return clint_warm_ipi_init();=0D -}=0D -=0D -static u64 U540_get_tlbr_flush_limit(void)=0D -{=0D - return U540_TLB_RANGE_FLUSH_LIMIT;=0D + if (generic_plat && generic_plat->final_exit)=0D + generic_plat->final_exit(generic_plat_match);=0D }=0D =0D -static int U540_timer_init(bool cold_boot)=0D +static u64 generic_tlbr_flush_limit(void)=0D {=0D - int rc;=0D -=0D - if (cold_boot) {=0D - rc =3D clint_cold_timer_init(&clint, NULL);=0D - if (rc)=0D - return rc;=0D - }=0D -=0D - return clint_warm_timer_init();=0D + if (generic_plat && generic_plat->tlbr_flush_limit)=0D + return generic_plat->tlbr_flush_limit(generic_plat_match);=0D + return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;=0D }=0D -/**=0D - * The U540 SoC has 5 HARTs, Boot HART ID is determined by=0D - * PcdBootHartId.=0D - */=0D -static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] =3D {1, 2, 3, 4};= =0D =0D -static int U540_system_reset(u32 type)=0D +static int generic_system_reset(u32 reset_type)=0D {=0D - /* For now nothing to do. */=0D - return 0;=0D + if (generic_plat && generic_plat->system_reset)=0D + return generic_plat->system_reset(reset_type,=0D + generic_plat_match);=0D + return fdt_system_reset(reset_type);=0D }=0D =0D const struct sbi_platform_operations platform_ops =3D {=0D - .pmp_region_count =3D U540_pmp_region_count,=0D - .pmp_region_info =3D U540_pmp_region_info,=0D - .final_init =3D U540_final_init,=0D - .console_putc =3D sifive_uart_putc,=0D - .console_getc =3D sifive_uart_getc,=0D - .console_init =3D U540_console_init,=0D - .irqchip_init =3D U540_irqchip_init,=0D - .ipi_send =3D clint_ipi_send,=0D - .ipi_clear =3D clint_ipi_clear,=0D - .ipi_init =3D U540_ipi_init,=0D - .get_tlbr_flush_limit =3D U540_get_tlbr_flush_limit,=0D - .timer_value =3D clint_timer_value,=0D - .timer_event_stop =3D clint_timer_event_stop,=0D - .timer_event_start =3D clint_timer_event_start,=0D - .timer_init =3D U540_timer_init,=0D - .system_reset =3D U540_system_reset=0D + .early_init =3D generic_early_init,=0D + .final_init =3D generic_final_init,=0D + .early_exit =3D generic_early_exit,=0D + .final_exit =3D generic_final_exit,=0D + .console_putc =3D fdt_serial_putc,=0D + .console_getc =3D fdt_serial_getc,=0D + .console_init =3D fdt_serial_init,=0D + .irqchip_init =3D fdt_irqchip_init,=0D + .irqchip_exit =3D fdt_irqchip_exit,=0D + .ipi_send =3D fdt_ipi_send,=0D + .ipi_clear =3D fdt_ipi_clear,=0D + .ipi_init =3D fdt_ipi_init,=0D + .ipi_exit =3D fdt_ipi_exit,=0D + .get_tlbr_flush_limit =3D generic_tlbr_flush_limit,=0D + .timer_value =3D fdt_timer_value,=0D + .timer_event_stop =3D fdt_timer_event_stop,=0D + .timer_event_start =3D fdt_timer_event_start,=0D + .timer_init =3D fdt_timer_init,=0D + .timer_exit =3D fdt_timer_exit,=0D + .system_reset =3D generic_system_reset,=0D };=0D =0D -const struct sbi_platform platform =3D {=0D - .opensbi_version =3D OPENSBI_VERSION, // The O= penSBI version this platform table is built bassed on.=0D - .platform_version =3D SBI_PLATFORM_VERSION(0x0001, 0x0000), // SBI P= latform version 1.0=0D - .name =3D "SiFive Freedom U540",=0D - .features =3D SBI_PLATFORM_DEFAULT_FEATURES,=0D - .hart_count =3D U540_BOOTABLE_HART_COUNT,=0D - .hart_index2id =3D U540_hart_index2id,=0D - .hart_stack_size =3D U540_HART_STACK_SIZE,=0D - .platform_ops_addr =3D (unsigned long)&platform_ops=0D +struct sbi_platform platform =3D {=0D + .opensbi_version =3D OPENSBI_VERSION,=0D + .platform_version =3D SBI_PLATFORM_VERSION(0x0, 0x01),=0D + .name =3D "Generic",=0D + .features =3D SBI_PLATFORM_DEFAULT_FEATURES,=0D + .hart_count =3D SBI_HARTMASK_MAX_BITS,=0D + .hart_index2id =3D generic_hart_index2id,=0D + .hart_stack_size =3D SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,=0D + .platform_ops_addr =3D (unsigned long)&platform_ops=0D };=0D diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Li= brary/OpensbiPlatformLib/PlatformOverride.h b/Platform/SiFive/U5SeriesPkg/F= reedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h new file mode 100644 index 0000000000..8a53cdf9ac --- /dev/null +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/PlatformOverride.h @@ -0,0 +1,27 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel + */ + +#ifndef __PLATFORM_OVERRIDE_H__ +#define __PLATFORM_OVERRIDE_H__ + +#include + +struct platform_override { + const struct fdt_match *match_table; + u64 (*features)(const struct fdt_match *match); + u64 (*tlbr_flush_limit)(const struct fdt_match *match); + int (*early_init)(bool cold_boot, const struct fdt_match *match); + int (*final_init)(bool cold_boot, const struct fdt_match *match); + void (*early_exit)(const struct fdt_match *match); + void (*final_exit)(const struct fdt_match *match); + int (*system_reset)(u32 reset_type, const struct fdt_match *match); + int (*fdt_fixup)(void *fdt, const struct fdt_match *match); +}; + +#endif diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Li= brary/OpensbiPlatformLib/SifiveFu540.c b/Platform/SiFive/U5SeriesPkg/Freedo= mU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c new file mode 100644 index 0000000000..b7d935e95e --- /dev/null +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/SifiveFu540.c @@ -0,0 +1,47 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel + */ + +#include +#include +#include + +static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match) +{ + /* + * The sfence.vma by virtual address does not work on + * SiFive FU540 so we return remote TLB flush limit as zero. + */ + return 0; +} + +static int sifive_fu540_fdt_fixup(void *fdt, const struct fdt_match *match) +{ + /* + * SiFive Freedom U540 has an erratum that prevents S-mode software + * to access a PMP protected region using 1GB page table mapping, so + * always add the no-map attribute on this platform. + */ + fdt_reserved_memory_nomap_fixup(fdt); + + return 0; +} + +static const struct fdt_match sifive_fu540_match[] =3D { + { .compatible =3D "sifive,fu540" }, + { .compatible =3D "sifive,fu540g" }, + { .compatible =3D "sifive,fu540-c000" }, + { .compatible =3D "sifive,hifive-unleashed-a00" }, + { }, +}; + +const struct platform_override sifive_fu540 =3D { + .match_table =3D sifive_fu540_match, + .tlbr_flush_limit =3D sifive_fu540_tlbr_flush_limit, + .fdt_fixup =3D sifive_fu540_fdt_fixup, +}; diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf.inc index 723632dc79..8e7afc2d82 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.= inc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.= inc @@ -23,10 +23,10 @@ DEFINE CODE_BLOCKS =3D 0x7E0 DEFINE VARS_BLOCKS =3D 0x20=0D =0D DEFINE SECFV_OFFSET =3D 0x00000000=0D -DEFINE SECFV_SIZE =3D 0x00020000=0D -DEFINE PEIFV_OFFSET =3D 0x00020000=0D +DEFINE SECFV_SIZE =3D 0x00030000=0D +DEFINE PEIFV_OFFSET =3D 0x00030000=0D DEFINE PEIFV_SIZE =3D 0x00080000=0D -DEFINE SCRATCH_OFFSET =3D 0x000a0000=0D +DEFINE SCRATCH_OFFSET =3D 0x000b0000=0D DEFINE SCRATCH_SIZE =3D 0x00010000=0D DEFINE FVMAIN_OFFSET =3D 0x00100000 # Must be power of 2 for PMP setti= ng=0D DEFINE FVMAIN_SIZE =3D 0x0018C000=0D --=20 2.33.0