From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web09.4072.1633660763018722729 for ; Thu, 07 Oct 2021 19:39:30 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: chasel.chiu@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10130"; a="287301070" X-IronPort-AV: E=Sophos;i="5.85,356,1624345200"; d="scan'208";a="287301070" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2021 19:39:29 -0700 X-IronPort-AV: E=Sophos;i="5.85,356,1624345200"; d="scan'208";a="657644463" Received: from cchiu4-mobl.gar.corp.intel.com ([10.252.188.53]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2021 19:39:28 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-platforms: PATCH 5/9] KabylakeOpenBoardPkg/KabylakeRvp3: Use same variable name for FspNvsHob. Date: Fri, 8 Oct 2021 10:38:58 +0800 Message-Id: <20211008023902.1066-6-chasel.chiu@intel.com> X-Mailer: git-send-email 2.28.0.windows.1 In-Reply-To: <20211008023902.1066-1-chasel.chiu@intel.com> References: <20211008023902.1066-1-chasel.chiu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3678 To simplify the implementation the variable Name/GUID has been changed to "FspNvsBuffer" and gFspNvsBufferVariableGuid regardless it stores the data from FSP_NON_VOLATILE_STORAGE_HOB2 or FSP_NON_VOLATILE_STORAGE_HOB. Cc: Nate DeSimone Signed-off-by: Chasel Chiu --- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSil= iconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 25 ++++++++++----= ----------- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilicon= PolicyUpdateLib/PeiSiliconPolicyUpdateLib.c | 23 +++++++++-----= --------- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSil= iconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 5 ++--- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilicon= PolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 2 +- 4 files changed, 22 insertions(+), 33 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Li= brary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Inte= l/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpda= teLibFsp/PeiFspMiscUpdUpdateLib.c index d8aff1960f..699f4297fa 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -1,7 +1,7 @@ /** @file=0D Implementation of Fsp Misc UPD Initialization.=0D =0D -Copyright (c) 2017, Intel Corporation. All rights reserved.
=0D +Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -16,7 +16,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D =0D -#include =0D #include =0D #include =0D #include =0D @@ -38,25 +37,21 @@ PeiFspMiscUpdUpdatePreMem ( {=0D EFI_STATUS Status;=0D UINTN VariableSize;=0D - VOID *MemorySavedData;=0D + VOID *FspNvsBufferPtr;=0D UINT8 MorControl;=0D VOID *MorControlPtr;=0D =0D //=0D // Initialize S3 Data variable (S3DataPtr). It may be used for warm and = fast boot paths.=0D //=0D - VariableSize =3D 0;=0D - MemorySavedData =3D NULL;=0D - Status =3D PeiGetVariable (=0D - L"MemoryConfig",=0D - &gFspNonVolatileStorageHobGuid,=0D - &MemorySavedData,=0D - &VariableSize=0D - );=0D - DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid= - %r\n", Status));=0D - DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));=0D - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData;=0D -=0D + FspNvsBufferPtr =3D NULL;=0D + VariableSize =3D 0;=0D + Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableG= uid, &FspNvsBufferPtr, &VariableSize);=0D + if (Status =3D=3D EFI_SUCCESS) {=0D + DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGuid -= %r\n", Status));=0D + DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", VariableSize));=0D + FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;=0D + }=0D if (FspmUpd->FspmArchUpd.NvsBufferPtr !=3D NULL) {=0D //=0D // Set the DISB bit in PCH (DRAM Initialization Scratchpad Bit - GEN_P= MCON_A[23]),=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Librar= y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Intel/Ka= bylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/Pe= iSiliconPolicyUpdateLib.c index 2dce9be63c..22aadc0221 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c @@ -398,8 +398,8 @@ SiliconPolicyUpdatePreMem ( SA_MISC_PEI_PREMEM_CONFIG *MiscPeiPreMemConfig;=0D MEMORY_CONFIG_NO_CRC *MemConfigNoCrc;=0D VOID *Buffer;=0D - UINTN VariableSize;=0D - VOID *MemorySavedData;=0D + UINTN FspNvsBufferSize;=0D + VOID *FspNvsBufferPtr;=0D UINT8 SpdAddressTable[4];=0D =0D DEBUG((DEBUG_INFO, "\nUpdating Policy in Pre-Mem\n"));=0D @@ -430,18 +430,13 @@ SiliconPolicyUpdatePreMem ( // Note: AmberLake FSP does not implement the FSPM_ARCH_CONFIG_PPI a= dded in FSP 2.1, hence=0D // the platform specific S3DataPtr must be used instead.=0D //=0D - VariableSize =3D 0;=0D - MemorySavedData =3D NULL;=0D - Status =3D PeiGetVariable (=0D - L"MemoryConfig",=0D - &gFspNonVolatileStorageHobGuid,=0D - &MemorySavedData,=0D - &VariableSize=0D - );=0D - DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHob= Guid - %r\n", Status));=0D - DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));=0D - if (!EFI_ERROR (Status)) {=0D - MiscPeiPreMemConfig->S3DataPtr =3D MemorySavedData;=0D + FspNvsBufferPtr =3D NULL;=0D + FspNvsBufferSize =3D 0;=0D + Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVaria= bleGuid, &FspNvsBufferPtr, &FspNvsBufferSize);=0D + if (Status =3D=3D EFI_SUCCESS) {=0D + DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGu= id - %r\n", Status));=0D + DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", FspNvsBufferSize= ));=0D + MiscPeiPreMemConfig->S3DataPtr =3D FspNvsBufferPtr;=0D }=0D =0D //=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Li= brary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf b/Platf= orm/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPo= licyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf index f8bec0c852..dacec18cd9 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf @@ -1,7 +1,7 @@ ## @file=0D # Provide FSP wrapper platform related function.=0D #=0D -# Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.
=0D +# Copyright (c) 2017 - 2021 Intel Corporation. All rights reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -80,7 +80,6 @@ PchInfoLib=0D PchHsioLib=0D PchPcieRpLib=0D - MemoryAllocationLib=0D CpuMailboxLib=0D DebugPrintErrorLevelLib=0D SiPolicyLib=0D @@ -141,7 +140,7 @@ gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid=0D =0D [Guids]=0D - gFspNonVolatileStorageHobGuid ## CONSUMES=0D + gFspNvsBufferVariableGuid ## CONSUMES=0D gTianoLogoGuid ## CONSUMES=0D gEfiMemoryOverwriteControlDataGuid=0D =0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Librar= y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/= KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/= PeiSiliconPolicyUpdateLib.inf index 5c2da68bf9..4b30ba02ea 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf @@ -50,7 +50,7 @@ gHsioPciePreMemConfigGuid ## CONSUMES=0D gHsioSataPreMemConfigGuid ## CONSUMES=0D gSaMiscPeiPreMemConfigGuid ## CONSUMES=0D - gFspNonVolatileStorageHobGuid ## CONSUMES=0D + gFspNvsBufferVariableGuid ## CONSUMES=0D =0D [Pcd]=0D gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize=0D --=20 2.28.0.windows.1