[PATCH edk2-platforms 1/1] Silicon/Qemu: don't advertise GICC legacy mmio interface in SbsaQamu MADT

["Leif Lindholm" <leif@nuviainc.com>]

The MADT GICC structure contains the field PhysicalBaseAddress, which
is needed for a GICv1/v2 implementation, or to indicate legacy
compatibility in modern GICs.

Linux commit 9739f6ef053f1, included in v5.12, adds a warning message
when this field is populated but invalid:
  [Firmware Bug]: CPU interface incapable of MMIO access

As it happens, we currently initialize this to PcdGicDistributorBase
instead of PcdGicInterruptInterfaceBase, and as a result we now trigger
this warning.

Since this is an SBSA reference implementation, and legacy GIC support
has never worked for this port, set the field to 0.

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Graeme Gregory <graeme@nuviainc.com>
Cc: Radoslaw Biernacki <rad@semihalf.com>
---
 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index b8901030ecd0..dbc5e9475358 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -71,7 +71,7 @@ AddMadtTable (
     0,                                     /* Mpidr */
     EFI_ACPI_6_0_GIC_ENABLED,              /* Flags */
     SBSAQEMU_MADT_GIC_PMU_IRQ,             /* PMU Irq */
-    FixedPcdGet32 (PcdGicDistributorBase), /* PhysicalBaseAddress */
+    0,                                     /* PhysicalBaseAddress */
     SBSAQEMU_MADT_GIC_VBASE,               /* GicVBase */
     SBSAQEMU_MADT_GIC_HBASE,               /* GicHBase */
     25,                                    /* GsivId */
-- 
2.30.2