From: "Khasim Mohammed" <khasim.mohammed@arm.com>
To: devel@edk2.groups.io
Cc: nd@arm.com, Khasim Syed Mohammed <khasim.mohammed@arm.com>
Subject: [PATCH v2 1/7] Silicon/ARM/NeoverseN1Soc: Fix missing function documentation
Date: Sun, 10 Oct 2021 23:59:50 +0530 [thread overview]
Message-ID: <20211010182956.13526-2-khasim.mohammed@arm.com> (raw)
In-Reply-To: <20211010182956.13526-1-khasim.mohammed@arm.com>
This patch adds missing documentation for few of the functions
and fixes few formatting changes.
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@arm.com>
---
.../PciHostBridgeLib/PciHostBridgeLib.c | 18 ++++----
.../Library/PlatformLib/PlatformLib.c | 43 ++++++++++++++++---
2 files changed, 47 insertions(+), 14 deletions(-)
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
index 9332939f63..ac88415fd2 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -1,10 +1,10 @@
/** @file
-* PCI Host Bridge Library instance for ARM Neoverse N1 platform
-*
-* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved.
-*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
-*
+ PCI Host Bridge Library instance for ARM Neoverse N1 platform
+
+ Copyright (c) 2019 - 2021, ARM Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
**/
#include <PiDxe.h>
@@ -96,7 +96,7 @@ STATIC PCI_ROOT_BRIDGE mPciRootBridge[] = {
/**
Return all the root bridge instances in an array.
- @param Count Return the count of root bridge instances.
+ @param Count Return the count of root bridge instances.
@return All the root bridge instances in an array.
The array should be passed into PciHostBridgeFreeRootBridges()
@@ -115,8 +115,8 @@ PciHostBridgeGetRootBridges (
/**
Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
- @param Bridges The root bridge instances array.
- @param Count The count of the array.
+ @param Bridges The root bridge instances array.
+ @param Count The count of the array.
**/
VOID
EFIAPI
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
index f722080e56..d5ec0ff30d 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
@@ -1,9 +1,9 @@
/** @file
-*
-* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
-*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
-*
+
+ Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
**/
#include <Library/ArmPlatformLib.h>
@@ -17,6 +17,12 @@ STATIC ARM_CORE_INFO mCoreInfoTable[] = {
{ 0x1, 0x1 } // Cluster 1, Core 1
};
+/**
+ Return the current Boot Mode.
+
+ This function returns the boot reason on the platform.
+
+**/
EFI_BOOT_MODE
ArmPlatformGetBootMode (
VOID
@@ -25,6 +31,15 @@ ArmPlatformGetBootMode (
return BOOT_WITH_FULL_CONFIGURATION;
}
+/**
+ Initialize controllers that must be setup in the normal world.
+
+ This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
+ in the PEI phase.
+
+ @param[in] MpId Processor ID
+
+**/
RETURN_STATUS
ArmPlatformInitialize (
IN UINTN MpId
@@ -33,6 +48,15 @@ ArmPlatformInitialize (
return RETURN_SUCCESS;
}
+/**
+ Populate the Platform core information.
+
+ This function populates the ARM_MP_CORE_INFO_PPI with information about the cores.
+
+ @param[out] CoreCount Number of cores
+ @param[out] ArmCoreTable Table containing information about the cores
+
+**/
EFI_STATUS
PrePeiCoreGetMpCoreInfo (
OUT UINTN *CoreCount,
@@ -56,6 +80,15 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
}
};
+/**
+ Return the Platform specific PPIs
+
+ This function exposes the N1Sdp Specific PPIs.
+
+ @param[out] PpiListSize Size in Bytes of the Platform PPI List
+ @param[out] PpiList Platform PPI List
+
+**/
VOID
ArmPlatformGetPlatformPpiList (
OUT UINTN *PpiListSize,
--
2.17.1
next prev parent reply other threads:[~2021-10-10 18:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-10 18:29 [PATCH v2 0/7] N1Sdp ACPI table and configuration manager support Khasim Mohammed
2021-10-10 18:29 ` Khasim Mohammed [this message]
2021-10-13 9:30 ` [edk2-devel] [PATCH v2 1/7] Silicon/ARM/NeoverseN1Soc: Fix missing function documentation PierreGondois
2021-10-10 18:29 ` [PATCH v2 2/7] Silicon/ARM/NeoverseN1Soc: Define new PCDs and configure memory map Khasim Mohammed
2021-10-13 9:31 ` [edk2-devel] " PierreGondois
2021-10-10 18:29 ` [PATCH v2 3/7] Platform/ARM/N1Sdp: Introduce platform DXE driver Khasim Mohammed
2021-10-13 9:32 ` [edk2-devel] " PierreGondois
2021-10-10 18:29 ` [PATCH v2 4/7] Platform/ARM/N1Sdp: Enable N1Sdp platform specific configurations Khasim Mohammed
2021-10-13 9:42 ` [edk2-devel] " PierreGondois
2021-10-20 17:36 ` Khasim Mohammed
2021-10-10 18:29 ` [PATCH v2 5/7] Platform/ARM/N1Sdp: Introduce platform specific asl tables Khasim Mohammed
2021-10-19 8:14 ` [edk2-devel] " PierreGondois
2021-10-26 17:46 ` Khasim Mohammed
2021-10-10 18:29 ` [PATCH v2 6/7] Platform/ARM/N1Sdp: Configuration Manager for N1Sdp Khasim Mohammed
2021-10-19 8:40 ` [edk2-devel] " PierreGondois
2021-10-10 18:29 ` [PATCH v2 7/7] Platform/ARM/N1Sdp: Enable ACPI tables and configuration manager Khasim Mohammed
2021-10-19 8:42 ` [edk2-devel] " PierreGondois
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